arch/arm/boot/dts/exynos5410.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5410 SoC device tree source
   3  *
   4  * Copyright (c) 2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5410 SoC device nodes are listed in this file.
   8  * EXYNOS5410 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include "skeleton.dtsi"
  17 #include <dt-bindings/clock/exynos5410.h>
  18
  19 / {
  20         compatible = "samsung,exynos5410", "samsung,exynos5";
  21         interrupt-parent = <&gic>;
  22
  23         aliases {
  24                 pinctrl0 = &pinctrl_0;
  25                 pinctrl1 = &pinctrl_1;
  26                 pinctrl2 = &pinctrl_2;
  27                 pinctrl3 = &pinctrl_3;
  28                 serial0 = &uart0;
  29                 serial1 = &uart1;
  30                 serial2 = &uart2;
  31         };
  32
  33         cpus {
  34                 #address-cells = <1>;
  35                 #size-cells = <0>;
  36
  37                 CPU0: cpu@0 {
  38                         device_type = "cpu";
  39                         compatible = "arm,cortex-a15";
  40                         reg = <0x0>;
  41                         clock-frequency = <1600000000>;
  42                 };
  43
  44                 CPU1: cpu@1 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a15";
  47                         reg = <0x1>;
  48                         clock-frequency = <1600000000>;
  49                 };
  50
  51                 CPU2: cpu@2 {
  52                         device_type = "cpu";
  53                         compatible = "arm,cortex-a15";
  54                         reg = <0x2>;
  55                         clock-frequency = <1600000000>;
  56                 };
  57
  58                 CPU3: cpu@3 {
  59                         device_type = "cpu";
  60                         compatible = "arm,cortex-a15";
  61                         reg = <0x3>;
  62                         clock-frequency = <1600000000>;
  63                 };
  64         };
  65
  66         soc: soc {
  67                 compatible = "simple-bus";
  68                 #address-cells = <1>;
  69                 #size-cells = <1>;
  70                 ranges;
  71
  72                 combiner: interrupt-controller@10440000 {
  73                         compatible = "samsung,exynos4210-combiner";
  74                         #interrupt-cells = <2>;
  75                         interrupt-controller;
  76                         samsung,combiner-nr = <32>;
  77                         reg = <0x10440000 0x1000>;
  78                         interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  79                                         <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  80                                         <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  81                                         <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  82                                         <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  83                                         <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  84                                         <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  85                                         <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  86                 };
  87
  88                 gic: interrupt-controller@10481000 {
  89                         compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  90                         #interrupt-cells = <3>;
  91                         interrupt-controller;
  92                         reg =   <0x10481000 0x1000>,
  93                                 <0x10482000 0x1000>,
  94                                 <0x10484000 0x2000>,
  95                                 <0x10486000 0x2000>;
  96                         interrupts = <1 9 0xf04>;
  97                 };
  98
  99                 chipid@10000000 {
 100                         compatible = "samsung,exynos4210-chipid";
 101                         reg = <0x10000000 0x100>;
 102                 };
 103
 104                 sromc: sromc@12250000 {
 105                         compatible = "samsung,exynos-srom";
 106                         reg = <0x12250000 0x14>;
 107                         #address-cells = <2>;
 108                         #size-cells = <1>;
 109                         ranges = <0 0 0x04000000 0x20000
 110                                   1 0 0x05000000 0x20000
 111                                   2 0 0x06000000 0x20000
 112                                   3 0 0x07000000 0x20000>;
 113                 };
 114
 115                 pmu_system_controller: system-controller@10040000 {
 116                         compatible = "samsung,exynos5410-pmu", "syscon";
 117                         reg = <0x10040000 0x5000>;
 118                 };
 119
 120                 poweroff: syscon-poweroff {
 121                         compatible = "syscon-poweroff";
 122                         regmap = <&pmu_system_controller>;
 123                         offset = <0x330C>; /* PS_HOLD_CONTROL */
 124                         mask = <0x5200>; /* reset value */
 125                 };
 126
 127                 reboot: syscon-reboot {
 128                         compatible = "syscon-reboot";
 129                         regmap = <&pmu_system_controller>;
 130                         offset = <0x0400>; /* SWRESET */
 131                         mask = <0x1>;
 132                 };
 133
 134                 mct: mct@101C0000 {
 135                         compatible = "samsung,exynos4210-mct";
 136                         reg = <0x101C0000 0xB00>;
 137                         interrupt-parent = <&interrupt_map>;
 138                         interrupts = <0>, <1>, <2>, <3>,
 139                                 <4>, <5>, <6>, <7>,
 140                                 <8>, <9>, <10>, <11>;
 141                         clocks = <&fin_pll>, <&clock CLK_MCT>;
 142                         clock-names = "fin_pll", "mct";
 143
 144                         interrupt_map: interrupt-map {
 145                                 #interrupt-cells = <1>;
 146                                 #address-cells = <0>;
 147                                 #size-cells = <0>;
 148                                 interrupt-map = <0 &combiner 23 3>,
 149                                                 <1 &combiner 23 4>,
 150                                                 <2 &combiner 25 2>,
 151                                                 <3 &combiner 25 3>,
 152                                                 <4 &gic 0 120 0>,
 153                                                 <5 &gic 0 121 0>,
 154                                                 <6 &gic 0 122 0>,
 155                                                 <7 &gic 0 123 0>,
 156                                                 <8 &gic 0 128 0>,
 157                                                 <9 &gic 0 129 0>,
 158                                                 <10 &gic 0 130 0>,
 159                                                 <11 &gic 0 131 0>;
 160                         };
 161                 };
 162
 163                 sysram@02020000 {
 164                         compatible = "mmio-sram";
 165                         reg = <0x02020000 0x54000>;
 166                         #address-cells = <1>;
 167                         #size-cells = <1>;
 168                         ranges = <0 0x02020000 0x54000>;
 169
 170                         smp-sysram@0 {
 171                                 compatible = "samsung,exynos4210-sysram";
 172                                 reg = <0x0 0x1000>;
 173                         };
 174
 175                         smp-sysram@53000 {
 176                                 compatible = "samsung,exynos4210-sysram-ns";
 177                                 reg = <0x53000 0x1000>;
 178                         };
 179                 };
 180
 181                 clock: clock-controller@10010000 {
 182                         compatible = "samsung,exynos5410-clock";
 183                         reg = <0x10010000 0x30000>;
 184                         #clock-cells = <1>;
 185                 };
 186
 187                 mmc_0: mmc@12200000 {
 188                         compatible = "samsung,exynos5250-dw-mshc";
 189                         reg = <0x12200000 0x1000>;
 190                         interrupts = <0 75 0>;
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193                         clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
 194                         clock-names = "biu", "ciu";
 195                         fifo-depth = <0x80>;
 196                         status = "disabled";
 197                 };
 198
 199                 mmc_1: mmc@12210000 {
 200                         compatible = "samsung,exynos5250-dw-mshc";
 201                         reg = <0x12210000 0x1000>;
 202                         interrupts = <0 76 0>;
 203                         #address-cells = <1>;
 204                         #size-cells = <0>;
 205                         clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
 206                         clock-names = "biu", "ciu";
 207                         fifo-depth = <0x80>;
 208                         status = "disabled";
 209                 };
 210
 211                 mmc_2: mmc@12220000 {
 212                         compatible = "samsung,exynos5250-dw-mshc";
 213                         reg = <0x12220000 0x1000>;
 214                         interrupts = <0 77 0>;
 215                         #address-cells = <1>;
 216                         #size-cells = <0>;
 217                         clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
 218                         clock-names = "biu", "ciu";
 219                         fifo-depth = <0x80>;
 220                         status = "disabled";
 221                 };
 222
 223                 pinctrl_0: pinctrl@13400000 {
 224                         compatible = "samsung,exynos5410-pinctrl";
 225                         reg = <0x13400000 0x1000>;
 226                         interrupts = <0 45 0>;
 227
 228                         wakeup-interrupt-controller {
 229                                 compatible = "samsung,exynos4210-wakeup-eint";
 230                                 interrupt-parent = <&gic>;
 231                                 interrupts = <0 32 0>;
 232                         };
 233                 };
 234
 235                 pinctrl_1: pinctrl@14000000 {
 236                         compatible = "samsung,exynos5410-pinctrl";
 237                         reg = <0x14000000 0x1000>;
 238                         interrupts = <0 46 0>;
 239                 };
 240
 241                 pinctrl_2: pinctrl@10d10000 {
 242                         compatible = "samsung,exynos5410-pinctrl";
 243                         reg = <0x10d10000 0x1000>;
 244                         interrupts = <0 50 0>;
 245                 };
 246
 247                 pinctrl_3: pinctrl@03860000 {
 248                         compatible = "samsung,exynos5410-pinctrl";
 249                         reg = <0x03860000 0x1000>;
 250                         interrupts = <0 47 0>;
 251                 };
 252
 253                 uart0: serial@12C00000 {
 254                         compatible = "samsung,exynos4210-uart";
 255                         reg = <0x12C00000 0x100>;
 256                         interrupts = <0 51 0>;
 257                         clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 258                         clock-names = "uart", "clk_uart_baud0";
 259                         status = "disabled";
 260                 };
 261
 262                 uart1: serial@12C10000 {
 263                         compatible = "samsung,exynos4210-uart";
 264                         reg = <0x12C10000 0x100>;
 265                         interrupts = <0 52 0>;
 266                         clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 267                         clock-names = "uart", "clk_uart_baud0";
 268                         status = "disabled";
 269                 };
 270
 271                 uart2: serial@12C20000 {
 272                         compatible = "samsung,exynos4210-uart";
 273                         reg = <0x12C20000 0x100>;
 274                         interrupts = <0 53 0>;
 275                         clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 276                         clock-names = "uart", "clk_uart_baud0";
 277                         status = "disabled";
 278                 };
 279         };
 280 };
 281
 282 #include "exynos5410-pinctrl.dtsi"