2 * Hardkernel Odroid XU3 board device tree source
4 * Copyright (c) 2014 Collabora Ltd.
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/sound/samsung-i2s.h>
17 #include "exynos5800.dtsi"
18 #include "exynos5422-cpus.dtsi"
19 #include "exynos5422-cpu-thermal.dtsi"
23 reg = <0x40000000 0x7EA00000>;
27 linux,stdout-path = &serial_2;
31 compatible = "samsung,secure-firmware";
32 reg = <0x02073000 0x1000>;
37 compatible = "samsung,exynos5420-oscclk";
38 clock-frequency = <24000000>;
43 pinctrl-0 = <&emmc_nrst_pin>;
44 pinctrl-names = "default";
45 compatible = "mmc-pwrseq-emmc";
46 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
50 compatible = "pwm-fan";
51 pwms = <&pwm 0 20972 0>;
52 cooling-min-state = <0>;
53 cooling-max-state = <3>;
55 cooling-levels = <0 130 170 230>;
60 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
61 <&clock_audss EXYNOS_MOUT_I2S>,
62 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
63 assigned-clock-parents = <&clock CLK_FIN_PLL>,
64 <&clock_audss EXYNOS_MOUT_AUDSS>;
65 assigned-clock-rates = <0>,
71 cpu-supply = <&buck6_reg>;
75 cpu-supply = <&buck2_reg>;
80 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&hdmi_hpd_irq>;
84 vdd_osc-supply = <&ldo7_reg>;
85 vdd_pll-supply = <&ldo6_reg>;
86 vdd-supply = <&ldo6_reg>;
93 compatible = "samsung,s2mps11-pmic";
95 s2mps11,buck2-ramp-delay = <12>;
96 s2mps11,buck34-ramp-delay = <12>;
97 s2mps11,buck16-ramp-delay = <12>;
98 s2mps11,buck6-ramp-enable = <1>;
99 s2mps11,buck2-ramp-enable = <1>;
100 s2mps11,buck3-ramp-enable = <1>;
101 s2mps11,buck4-ramp-enable = <1>;
102 samsung,s2mps11-acokb-ground;
104 interrupt-parent = <&gpx0>;
105 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&s2mps11_irq>;
109 s2mps11_osc: clocks {
111 clock-output-names = "s2mps11_ap",
112 "s2mps11_cp", "s2mps11_bt";
117 regulator-name = "vdd_ldo1";
118 regulator-min-microvolt = <1000000>;
119 regulator-max-microvolt = <1000000>;
124 regulator-name = "vdd_ldo3";
125 regulator-min-microvolt = <1800000>;
126 regulator-max-microvolt = <1800000>;
131 regulator-name = "vdd_ldo5";
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <1800000>;
138 regulator-name = "vdd_ldo6";
139 regulator-min-microvolt = <1000000>;
140 regulator-max-microvolt = <1000000>;
145 regulator-name = "vdd_ldo7";
146 regulator-min-microvolt = <1800000>;
147 regulator-max-microvolt = <1800000>;
152 regulator-name = "vdd_ldo8";
153 regulator-min-microvolt = <1800000>;
154 regulator-max-microvolt = <1800000>;
159 regulator-name = "vdd_ldo9";
160 regulator-min-microvolt = <3000000>;
161 regulator-max-microvolt = <3000000>;
166 regulator-name = "vdd_ldo10";
167 regulator-min-microvolt = <1800000>;
168 regulator-max-microvolt = <1800000>;
173 regulator-name = "vdd_ldo11";
174 regulator-min-microvolt = <1000000>;
175 regulator-max-microvolt = <1000000>;
180 regulator-name = "vdd_ldo12";
181 regulator-min-microvolt = <1800000>;
182 regulator-max-microvolt = <1800000>;
187 regulator-name = "vdd_ldo13";
188 regulator-min-microvolt = <2800000>;
189 regulator-max-microvolt = <2800000>;
194 regulator-name = "vdd_ldo15";
195 regulator-min-microvolt = <3100000>;
196 regulator-max-microvolt = <3100000>;
201 regulator-name = "vdd_ldo16";
202 regulator-min-microvolt = <2200000>;
203 regulator-max-microvolt = <2200000>;
208 regulator-name = "tsp_avdd";
209 regulator-min-microvolt = <3300000>;
210 regulator-max-microvolt = <3300000>;
215 regulator-name = "vdd_sd";
216 regulator-min-microvolt = <2800000>;
217 regulator-max-microvolt = <2800000>;
222 regulator-name = "tsp_io";
223 regulator-min-microvolt = <2800000>;
224 regulator-max-microvolt = <2800000>;
229 regulator-name = "vdd_ldo26";
230 regulator-min-microvolt = <3000000>;
231 regulator-max-microvolt = <3000000>;
236 regulator-name = "vdd_mif";
237 regulator-min-microvolt = <800000>;
238 regulator-max-microvolt = <1300000>;
244 regulator-name = "vdd_arm";
245 regulator-min-microvolt = <800000>;
246 regulator-max-microvolt = <1500000>;
252 regulator-name = "vdd_int";
253 regulator-min-microvolt = <800000>;
254 regulator-max-microvolt = <1400000>;
260 regulator-name = "vdd_g3d";
261 regulator-min-microvolt = <800000>;
262 regulator-max-microvolt = <1400000>;
268 regulator-name = "vdd_mem";
269 regulator-min-microvolt = <800000>;
270 regulator-max-microvolt = <1400000>;
276 regulator-name = "vdd_kfc";
277 regulator-min-microvolt = <800000>;
278 regulator-max-microvolt = <1500000>;
284 regulator-name = "vdd_1.0v_ldo";
285 regulator-min-microvolt = <800000>;
286 regulator-max-microvolt = <1500000>;
292 regulator-name = "vdd_1.8v_ldo";
293 regulator-min-microvolt = <800000>;
294 regulator-max-microvolt = <1500000>;
300 regulator-name = "vdd_2.8v_ldo";
301 regulator-min-microvolt = <3000000>;
302 regulator-max-microvolt = <3750000>;
308 regulator-name = "vdd_vmem";
309 regulator-min-microvolt = <2850000>;
310 regulator-max-microvolt = <2850000>;
319 samsung,i2c-sda-delay = <100>;
320 samsung,i2c-max-bus-freq = <66000>;
324 compatible = "samsung,exynos4210-hdmiddc";
330 samsung,mfc-r = <0x43000000 0x800000>;
331 samsung,mfc-l = <0x51000000 0x800000>;
336 mmc-pwrseq = <&emmc_pwrseq>;
337 cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
338 card-detect-delay = <200>;
339 samsung,dw-mshc-ciu-div = <3>;
340 samsung,dw-mshc-sdr-timing = <0 4>;
341 samsung,dw-mshc-ddr-timing = <0 2>;
342 samsung,dw-mshc-hs400-timing = <0 2>;
343 samsung,read-strobe-delay = <90>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
354 card-detect-delay = <200>;
355 samsung,dw-mshc-ciu-div = <3>;
356 samsung,dw-mshc-sdr-timing = <0 4>;
357 samsung,dw-mshc-ddr-timing = <0 2>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
365 hdmi_hpd_irq: hdmi-hpd-irq {
366 samsung,pins = "gpx3-7";
367 samsung,pin-function = <0>;
368 samsung,pin-pud = <1>;
369 samsung,pin-drv = <0>;
372 s2mps11_irq: s2mps11-irq {
373 samsung,pins = "gpx0-4";
374 samsung,pin-function = <0xf>;
375 samsung,pin-pud = <0>;
376 samsung,pin-drv = <0>;
381 emmc_nrst_pin: emmc-nrst {
382 samsung,pins = "gpd1-0";
383 samsung,pin-function = <0>;
384 samsung,pin-pud = <0>;
385 samsung,pin-drv = <0>;
390 vtmu-supply = <&ldo7_reg>;
395 vtmu-supply = <&ldo7_reg>;
400 vtmu-supply = <&ldo7_reg>;
405 vtmu-supply = <&ldo7_reg>;
410 vtmu-supply = <&ldo7_reg>;
416 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
417 clock-names = "rtc", "rtc_src";
424 /* usbdrd_dwc3_1 mode customized in each board */
427 vdd33-supply = <&ldo9_reg>;
428 vdd10-supply = <&ldo11_reg>;
432 vdd33-supply = <&ldo9_reg>;
433 vdd10-supply = <&ldo11_reg>;