2 * SAMSUNG EXYNOS5440 SoC device tree source
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 /include/ "skeleton.dtsi"
15 compatible = "samsung,exynos5440";
17 interrupt-parent = <&gic>;
19 clock: clock-controller@0x160000 {
20 compatible = "samsung,exynos5440-clock";
21 reg = <0x160000 0x1000>;
25 gic:interrupt-controller@2E0000 {
26 compatible = "arm,cortex-a15-gic";
27 #interrupt-cells = <3>;
29 reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
37 compatible = "arm,cortex-a15";
41 compatible = "arm,cortex-a15";
45 compatible = "arm,cortex-a15";
49 compatible = "arm,cortex-a15";
55 compatible = "arm,cortex-a15-timer",
57 interrupts = <1 13 0xf08>,
61 clock-frequency = <50000000>;
65 compatible = "samsung,exynos4210-uart";
66 reg = <0xB0000 0x1000>;
68 clocks = <&clock 21>, <&clock 21>;
69 clock-names = "uart", "clk_uart_baud0";
73 compatible = "samsung,exynos4210-uart";
74 reg = <0xC0000 0x1000>;
76 clocks = <&clock 21>, <&clock 21>;
77 clock-names = "uart", "clk_uart_baud0";
81 compatible = "samsung,exynos4210-spi";
82 reg = <0xD0000 0x1000>;
84 tx-dma-channel = <&pdma0 5>; /* preliminary */
85 rx-dma-channel = <&pdma0 4>; /* preliminary */
88 clocks = <&clock 21>, <&clock 16>;
89 clock-names = "spi", "spi_busclk0";
93 compatible = "samsung,exynos5440-pinctrl";
94 reg = <0xE0000 0x1000>;
96 #interrupt-cells = <2>;
100 samsung,exynos5440-pin-function = <1>;
104 samsung,exynos5440-pin-function = <2>;
108 samsung,exynos5440-pin-function = <3>;
112 samsung,exynos5440-pin-function = <4>;
117 compatible = "samsung,exynos5440-i2c";
118 reg = <0xF0000 0x1000>;
119 interrupts = <0 5 0>;
120 #address-cells = <1>;
122 clocks = <&clock 21>;
127 compatible = "samsung,exynos5440-i2c";
128 reg = <0x100000 0x1000>;
129 interrupts = <0 6 0>;
130 #address-cells = <1>;
132 clocks = <&clock 21>;
137 compatible = "samsung,s3c2410-wdt";
138 reg = <0x110000 0x1000>;
139 interrupts = <0 1 0>;
140 clocks = <&clock 21>;
141 clock-names = "watchdog";
145 #address-cells = <1>;
147 compatible = "arm,amba-bus";
148 interrupt-parent = <&gic>;
151 pdma0: pdma@121A0000 {
152 compatible = "arm,pl330", "arm,primecell";
153 reg = <0x120000 0x1000>;
154 interrupts = <0 34 0>;
155 clocks = <&clock 21>;
156 clock-names = "apb_pclk";
159 #dma-requests = <32>;
162 pdma1: pdma@121B0000 {
163 compatible = "arm,pl330", "arm,primecell";
164 reg = <0x121000 0x1000>;
165 interrupts = <0 35 0>;
166 clocks = <&clock 21>;
167 clock-names = "apb_pclk";
170 #dma-requests = <32>;
175 compatible = "samsung,s3c6410-rtc";
176 reg = <0x130000 0x1000>;
177 interrupts = <0 17 0>, <0 16 0>;
178 clocks = <&clock 21>;