2 * SAMSUNG EXYNOS5440 SoC device tree source
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <dt-bindings/clock/exynos5440.h>
13 #include "skeleton.dtsi"
16 compatible = "samsung,exynos5440", "samsung,exynos5";
18 interrupt-parent = <&gic>;
24 tmuctrl0 = &tmuctrl_0;
25 tmuctrl1 = &tmuctrl_1;
26 tmuctrl2 = &tmuctrl_2;
29 clock: clock-controller@160000 {
30 compatible = "samsung,exynos5440-clock";
31 reg = <0x160000 0x1000>;
35 gic: interrupt-controller@2E0000 {
36 compatible = "arm,cortex-a15-gic";
37 #interrupt-cells = <3>;
39 reg = <0x2E1000 0x1000>,
43 interrupts = <1 9 0xf04>;
52 compatible = "arm,cortex-a15";
57 compatible = "arm,cortex-a15";
62 compatible = "arm,cortex-a15";
67 compatible = "arm,cortex-a15";
73 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
74 interrupts = <0 52 4>,
81 compatible = "arm,cortex-a15-timer",
83 interrupts = <1 13 0xf08>,
87 clock-frequency = <50000000>;
91 compatible = "samsung,exynos5440-cpufreq";
92 reg = <0x160000 0x1000>;
93 interrupts = <0 57 0>;
107 serial_0: serial@B0000 {
108 compatible = "samsung,exynos4210-uart";
109 reg = <0xB0000 0x1000>;
110 interrupts = <0 2 0>;
111 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
112 clock-names = "uart", "clk_uart_baud0";
115 serial_1: serial@C0000 {
116 compatible = "samsung,exynos4210-uart";
117 reg = <0xC0000 0x1000>;
118 interrupts = <0 3 0>;
119 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
120 clock-names = "uart", "clk_uart_baud0";
124 compatible = "samsung,exynos5440-spi";
125 reg = <0xD0000 0x100>;
126 interrupts = <0 4 0>;
127 #address-cells = <1>;
129 samsung,spi-src-clk = <0>;
131 clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
132 clock-names = "spi", "spi_busclk0";
136 compatible = "samsung,exynos5440-pinctrl";
137 reg = <0xE0000 0x1000>;
138 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
139 <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
140 interrupt-controller;
141 #interrupt-cells = <2>;
145 samsung,exynos5440-pin-function = <1>;
149 samsung,exynos5440-pin-function = <2>;
153 samsung,exynos5440-pin-function = <3>;
157 samsung,exynos5440-pin-function = <4>;
162 compatible = "samsung,exynos5440-i2c";
163 reg = <0xF0000 0x1000>;
164 interrupts = <0 5 0>;
165 #address-cells = <1>;
167 clocks = <&clock CLK_B_125>;
172 compatible = "samsung,exynos5440-i2c";
173 reg = <0x100000 0x1000>;
174 interrupts = <0 6 0>;
175 #address-cells = <1>;
177 clocks = <&clock CLK_B_125>;
182 compatible = "samsung,s3c2410-wdt";
183 reg = <0x110000 0x1000>;
184 interrupts = <0 1 0>;
185 clocks = <&clock CLK_B_125>;
186 clock-names = "watchdog";
189 gmac: ethernet@00230000 {
190 compatible = "snps,dwmac-3.70a";
191 reg = <0x00230000 0x8000>;
192 interrupt-parent = <&gic>;
193 interrupts = <0 31 4>;
194 interrupt-names = "macirq";
196 clocks = <&clock CLK_GMAC0>;
197 clock-names = "stmmaceth";
201 #address-cells = <1>;
203 compatible = "arm,amba-bus";
204 interrupt-parent = <&gic>;
209 compatible = "samsung,s3c6410-rtc";
210 reg = <0x130000 0x1000>;
211 interrupts = <0 17 0>, <0 16 0>;
212 clocks = <&clock CLK_B_125>;
216 tmuctrl_0: tmuctrl@160118 {
217 compatible = "samsung,exynos5440-tmu";
218 reg = <0x160118 0x230>, <0x160368 0x10>;
219 interrupts = <0 58 0>;
220 clocks = <&clock CLK_B_125>;
221 clock-names = "tmu_apbif";
224 tmuctrl_1: tmuctrl@16011C {
225 compatible = "samsung,exynos5440-tmu";
226 reg = <0x16011C 0x230>, <0x160368 0x10>;
227 interrupts = <0 58 0>;
228 clocks = <&clock CLK_B_125>;
229 clock-names = "tmu_apbif";
232 tmuctrl_2: tmuctrl@160120 {
233 compatible = "samsung,exynos5440-tmu";
234 reg = <0x160120 0x230>, <0x160368 0x10>;
235 interrupts = <0 58 0>;
236 clocks = <&clock CLK_B_125>;
237 clock-names = "tmu_apbif";
241 compatible = "snps,exynos5440-ahci";
242 reg = <0x210000 0x10000>;
243 interrupts = <0 30 0>;
244 clocks = <&clock CLK_SATA>;
245 clock-names = "sata";
249 compatible = "samsung,exynos5440-ohci";
250 reg = <0x220000 0x1000>;
251 interrupts = <0 29 0>;
252 clocks = <&clock CLK_USB>;
253 clock-names = "usbhost";
257 compatible = "samsung,exynos5440-ehci";
258 reg = <0x221000 0x1000>;
259 interrupts = <0 29 0>;
260 clocks = <&clock CLK_USB>;
261 clock-names = "usbhost";
265 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
266 reg = <0x290000 0x1000
269 interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
270 clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
271 clock-names = "pcie", "pcie_bus";
272 #address-cells = <3>;
275 ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */
276 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
277 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
278 #interrupt-cells = <1>;
279 interrupt-map-mask = <0 0 0 0>;
280 interrupt-map = <0x0 0 &gic 53>;
286 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
287 reg = <0x2a0000 0x1000
290 interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
291 clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
292 clock-names = "pcie", "pcie_bus";
293 #address-cells = <3>;
296 ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */
297 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
298 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
299 #interrupt-cells = <1>;
300 interrupt-map-mask = <0 0 0 0>;
301 interrupt-map = <0x0 0 &gic 56>;