arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts

   1 /*
   2  * Copyright 2012 Markus Pargmann, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "imx27-phytec-phycard-s-som.dts"
  13
  14 / {
  15         model = "Phytec pca100 rapid development kit";
  16         compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
  17
  18         display: display {
  19                 model = "Primeview-PD050VL1";
  20                 native-mode = <&timing0>;
  21                 bits-per-pixel = <16>;  /* non-standard but required */
  22                 fsl,pcr = <0xf0c88080>; /* non-standard but required */
  23                 display-timings {
  24                         timing0: 640x480 {
  25                                 hactive = <640>;
  26                                 vactive = <480>;
  27                                 hback-porch = <112>;
  28                                 hfront-porch = <36>;
  29                                 hsync-len = <32>;
  30                                 vback-porch = <33>;
  31                                 vfront-porch = <33>;
  32                                 vsync-len = <2>;
  33                                 clock-frequency = <25000000>;
  34                         };
  35                 };
  36         };
  37
  38         regulators {
  39                 compatible = "simple-bus";
  40
  41                 reg_3v3: 3v3 {
  42                         compatible = "regulator-fixed";
  43                         regulator-name = "3V3";
  44                         regulator-min-microvolt = <3300000>;
  45                         regulator-max-microvolt = <3300000>;
  46                         regulator-always-on;
  47                 };
  48         };
  49 };
  50
  51 &fb {
  52         display = <&display>;
  53         status = "okay";
  54 };
  55
  56 &i2c1 {
  57         status = "okay";
  58
  59         rtc@51 {
  60                 compatible = "nxp,pcf8563";
  61                 reg = <0x51>;
  62         };
  63
  64         adc@64 {
  65                 compatible = "maxim,max1037";
  66                 vcc-supply = <&reg_3v3>;
  67                 reg = <0x64>;
  68         };
  69 };
  70
  71 &owire {
  72         status = "okay";
  73 };
  74
  75 &sdhci2 {
  76         cd-gpios = <&gpio3 29 0>;
  77         status = "okay";
  78 };
  79
  80 &uart1 {
  81         fsl,uart-has-rtscts;
  82         status = "okay";
  83 };
  84
  85 &uart2 {
  86         fsl,uart-has-rtscts;
  87         status = "okay";
  88 };
  89
  90 &uart3 {
  91         fsl,uart-has-rtscts;
  92         status = "okay";
  93 };