2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
13 #include "imx28-pinfunc.h"
16 interrupt-parent = <&icoll>;
42 compatible = "arm,arm926ej-s";
48 compatible = "simple-bus";
51 reg = <0x80000000 0x80000>;
55 compatible = "simple-bus";
58 reg = <0x80000000 0x3c900>;
61 icoll: interrupt-controller@80000000 {
62 compatible = "fsl,imx28-icoll", "fsl,icoll";
64 #interrupt-cells = <1>;
65 reg = <0x80000000 0x2000>;
68 hsadc: hsadc@80002000 {
69 reg = <0x80002000 0x2000>;
71 dmas = <&dma_apbh 12>;
76 dma_apbh: dma-apbh@80004000 {
77 compatible = "fsl,imx28-dma-apbh";
78 reg = <0x80004000 0x2000>;
79 interrupts = <82 83 84 85
83 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
84 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
85 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
86 "hsadc", "lcdif", "empty", "empty";
92 perfmon: perfmon@80006000 {
93 reg = <0x80006000 0x800>;
98 gpmi: gpmi-nand@8000c000 {
99 compatible = "fsl,imx28-gpmi-nand";
100 #address-cells = <1>;
102 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
103 reg-names = "gpmi-nand", "bch";
105 interrupt-names = "bch";
107 clock-names = "gpmi_io";
108 dmas = <&dma_apbh 4>;
114 #address-cells = <1>;
116 reg = <0x80010000 0x2000>;
119 dmas = <&dma_apbh 0>;
125 #address-cells = <1>;
127 reg = <0x80012000 0x2000>;
130 dmas = <&dma_apbh 1>;
136 #address-cells = <1>;
138 reg = <0x80014000 0x2000>;
141 dmas = <&dma_apbh 2>;
147 #address-cells = <1>;
149 reg = <0x80016000 0x2000>;
152 dmas = <&dma_apbh 3>;
157 pinctrl: pinctrl@80018000 {
158 #address-cells = <1>;
160 compatible = "fsl,imx28-pinctrl", "simple-bus";
161 reg = <0x80018000 0x2000>;
164 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
168 interrupt-controller;
169 #interrupt-cells = <2>;
173 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
177 interrupt-controller;
178 #interrupt-cells = <2>;
182 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
186 interrupt-controller;
187 #interrupt-cells = <2>;
191 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
195 interrupt-controller;
196 #interrupt-cells = <2>;
200 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
204 interrupt-controller;
205 #interrupt-cells = <2>;
208 duart_pins_a: duart@0 {
211 MX28_PAD_PWM0__DUART_RX
212 MX28_PAD_PWM1__DUART_TX
214 fsl,drive-strength = <MXS_DRIVE_4mA>;
215 fsl,voltage = <MXS_VOLTAGE_HIGH>;
216 fsl,pull-up = <MXS_PULL_DISABLE>;
219 duart_pins_b: duart@1 {
222 MX28_PAD_AUART0_CTS__DUART_RX
223 MX28_PAD_AUART0_RTS__DUART_TX
225 fsl,drive-strength = <MXS_DRIVE_4mA>;
226 fsl,voltage = <MXS_VOLTAGE_HIGH>;
227 fsl,pull-up = <MXS_PULL_DISABLE>;
230 duart_4pins_a: duart-4pins@0 {
233 MX28_PAD_AUART0_CTS__DUART_RX
234 MX28_PAD_AUART0_RTS__DUART_TX
235 MX28_PAD_AUART0_RX__DUART_CTS
236 MX28_PAD_AUART0_TX__DUART_RTS
238 fsl,drive-strength = <MXS_DRIVE_4mA>;
239 fsl,voltage = <MXS_VOLTAGE_HIGH>;
240 fsl,pull-up = <MXS_PULL_DISABLE>;
243 gpmi_pins_a: gpmi-nand@0 {
246 MX28_PAD_GPMI_D00__GPMI_D0
247 MX28_PAD_GPMI_D01__GPMI_D1
248 MX28_PAD_GPMI_D02__GPMI_D2
249 MX28_PAD_GPMI_D03__GPMI_D3
250 MX28_PAD_GPMI_D04__GPMI_D4
251 MX28_PAD_GPMI_D05__GPMI_D5
252 MX28_PAD_GPMI_D06__GPMI_D6
253 MX28_PAD_GPMI_D07__GPMI_D7
254 MX28_PAD_GPMI_CE0N__GPMI_CE0N
255 MX28_PAD_GPMI_RDY0__GPMI_READY0
256 MX28_PAD_GPMI_RDN__GPMI_RDN
257 MX28_PAD_GPMI_WRN__GPMI_WRN
258 MX28_PAD_GPMI_ALE__GPMI_ALE
259 MX28_PAD_GPMI_CLE__GPMI_CLE
260 MX28_PAD_GPMI_RESETN__GPMI_RESETN
262 fsl,drive-strength = <MXS_DRIVE_4mA>;
263 fsl,voltage = <MXS_VOLTAGE_HIGH>;
264 fsl,pull-up = <MXS_PULL_DISABLE>;
267 gpmi_status_cfg: gpmi-status-cfg {
269 MX28_PAD_GPMI_RDN__GPMI_RDN
270 MX28_PAD_GPMI_WRN__GPMI_WRN
271 MX28_PAD_GPMI_RESETN__GPMI_RESETN
273 fsl,drive-strength = <MXS_DRIVE_12mA>;
276 auart0_pins_a: auart0@0 {
279 MX28_PAD_AUART0_RX__AUART0_RX
280 MX28_PAD_AUART0_TX__AUART0_TX
281 MX28_PAD_AUART0_CTS__AUART0_CTS
282 MX28_PAD_AUART0_RTS__AUART0_RTS
284 fsl,drive-strength = <MXS_DRIVE_4mA>;
285 fsl,voltage = <MXS_VOLTAGE_HIGH>;
286 fsl,pull-up = <MXS_PULL_DISABLE>;
289 auart0_2pins_a: auart0-2pins@0 {
292 MX28_PAD_AUART0_RX__AUART0_RX
293 MX28_PAD_AUART0_TX__AUART0_TX
295 fsl,drive-strength = <MXS_DRIVE_4mA>;
296 fsl,voltage = <MXS_VOLTAGE_HIGH>;
297 fsl,pull-up = <MXS_PULL_DISABLE>;
300 auart1_pins_a: auart1@0 {
303 MX28_PAD_AUART1_RX__AUART1_RX
304 MX28_PAD_AUART1_TX__AUART1_TX
305 MX28_PAD_AUART1_CTS__AUART1_CTS
306 MX28_PAD_AUART1_RTS__AUART1_RTS
308 fsl,drive-strength = <MXS_DRIVE_4mA>;
309 fsl,voltage = <MXS_VOLTAGE_HIGH>;
310 fsl,pull-up = <MXS_PULL_DISABLE>;
313 auart1_2pins_a: auart1-2pins@0 {
316 MX28_PAD_AUART1_RX__AUART1_RX
317 MX28_PAD_AUART1_TX__AUART1_TX
319 fsl,drive-strength = <MXS_DRIVE_4mA>;
320 fsl,voltage = <MXS_VOLTAGE_HIGH>;
321 fsl,pull-up = <MXS_PULL_DISABLE>;
324 auart2_2pins_a: auart2-2pins@0 {
327 MX28_PAD_SSP2_SCK__AUART2_RX
328 MX28_PAD_SSP2_MOSI__AUART2_TX
330 fsl,drive-strength = <MXS_DRIVE_4mA>;
331 fsl,voltage = <MXS_VOLTAGE_HIGH>;
332 fsl,pull-up = <MXS_PULL_DISABLE>;
335 auart2_2pins_b: auart2-2pins@1 {
338 MX28_PAD_AUART2_RX__AUART2_RX
339 MX28_PAD_AUART2_TX__AUART2_TX
341 fsl,drive-strength = <MXS_DRIVE_4mA>;
342 fsl,voltage = <MXS_VOLTAGE_HIGH>;
343 fsl,pull-up = <MXS_PULL_DISABLE>;
346 auart3_pins_a: auart3@0 {
349 MX28_PAD_AUART3_RX__AUART3_RX
350 MX28_PAD_AUART3_TX__AUART3_TX
351 MX28_PAD_AUART3_CTS__AUART3_CTS
352 MX28_PAD_AUART3_RTS__AUART3_RTS
354 fsl,drive-strength = <MXS_DRIVE_4mA>;
355 fsl,voltage = <MXS_VOLTAGE_HIGH>;
356 fsl,pull-up = <MXS_PULL_DISABLE>;
359 auart3_2pins_a: auart3-2pins@0 {
362 MX28_PAD_SSP2_MISO__AUART3_RX
363 MX28_PAD_SSP2_SS0__AUART3_TX
365 fsl,drive-strength = <MXS_DRIVE_4mA>;
366 fsl,voltage = <MXS_VOLTAGE_HIGH>;
367 fsl,pull-up = <MXS_PULL_DISABLE>;
370 auart3_2pins_b: auart3-2pins@1 {
373 MX28_PAD_AUART3_RX__AUART3_RX
374 MX28_PAD_AUART3_TX__AUART3_TX
376 fsl,drive-strength = <MXS_DRIVE_4mA>;
377 fsl,voltage = <MXS_VOLTAGE_HIGH>;
378 fsl,pull-up = <MXS_PULL_DISABLE>;
381 auart4_2pins_a: auart4@0 {
384 MX28_PAD_SSP3_SCK__AUART4_TX
385 MX28_PAD_SSP3_MOSI__AUART4_RX
387 fsl,drive-strength = <MXS_DRIVE_4mA>;
388 fsl,voltage = <MXS_VOLTAGE_HIGH>;
389 fsl,pull-up = <MXS_PULL_DISABLE>;
392 mac0_pins_a: mac0@0 {
395 MX28_PAD_ENET0_MDC__ENET0_MDC
396 MX28_PAD_ENET0_MDIO__ENET0_MDIO
397 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
398 MX28_PAD_ENET0_RXD0__ENET0_RXD0
399 MX28_PAD_ENET0_RXD1__ENET0_RXD1
400 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
401 MX28_PAD_ENET0_TXD0__ENET0_TXD0
402 MX28_PAD_ENET0_TXD1__ENET0_TXD1
403 MX28_PAD_ENET_CLK__CLKCTRL_ENET
405 fsl,drive-strength = <MXS_DRIVE_8mA>;
406 fsl,voltage = <MXS_VOLTAGE_HIGH>;
407 fsl,pull-up = <MXS_PULL_ENABLE>;
410 mac1_pins_a: mac1@0 {
413 MX28_PAD_ENET0_CRS__ENET1_RX_EN
414 MX28_PAD_ENET0_RXD2__ENET1_RXD0
415 MX28_PAD_ENET0_RXD3__ENET1_RXD1
416 MX28_PAD_ENET0_COL__ENET1_TX_EN
417 MX28_PAD_ENET0_TXD2__ENET1_TXD0
418 MX28_PAD_ENET0_TXD3__ENET1_TXD1
420 fsl,drive-strength = <MXS_DRIVE_8mA>;
421 fsl,voltage = <MXS_VOLTAGE_HIGH>;
422 fsl,pull-up = <MXS_PULL_ENABLE>;
425 mmc0_8bit_pins_a: mmc0-8bit@0 {
428 MX28_PAD_SSP0_DATA0__SSP0_D0
429 MX28_PAD_SSP0_DATA1__SSP0_D1
430 MX28_PAD_SSP0_DATA2__SSP0_D2
431 MX28_PAD_SSP0_DATA3__SSP0_D3
432 MX28_PAD_SSP0_DATA4__SSP0_D4
433 MX28_PAD_SSP0_DATA5__SSP0_D5
434 MX28_PAD_SSP0_DATA6__SSP0_D6
435 MX28_PAD_SSP0_DATA7__SSP0_D7
436 MX28_PAD_SSP0_CMD__SSP0_CMD
437 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
438 MX28_PAD_SSP0_SCK__SSP0_SCK
440 fsl,drive-strength = <MXS_DRIVE_8mA>;
441 fsl,voltage = <MXS_VOLTAGE_HIGH>;
442 fsl,pull-up = <MXS_PULL_ENABLE>;
445 mmc0_4bit_pins_a: mmc0-4bit@0 {
448 MX28_PAD_SSP0_DATA0__SSP0_D0
449 MX28_PAD_SSP0_DATA1__SSP0_D1
450 MX28_PAD_SSP0_DATA2__SSP0_D2
451 MX28_PAD_SSP0_DATA3__SSP0_D3
452 MX28_PAD_SSP0_CMD__SSP0_CMD
453 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
454 MX28_PAD_SSP0_SCK__SSP0_SCK
456 fsl,drive-strength = <MXS_DRIVE_8mA>;
457 fsl,voltage = <MXS_VOLTAGE_HIGH>;
458 fsl,pull-up = <MXS_PULL_ENABLE>;
461 mmc0_cd_cfg: mmc0-cd-cfg {
463 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
465 fsl,pull-up = <MXS_PULL_DISABLE>;
468 mmc0_sck_cfg: mmc0-sck-cfg {
470 MX28_PAD_SSP0_SCK__SSP0_SCK
472 fsl,drive-strength = <MXS_DRIVE_12mA>;
473 fsl,pull-up = <MXS_PULL_DISABLE>;
476 mmc2_4bit_pins_a: mmc2-4bit@0 {
479 MX28_PAD_SSP0_DATA4__SSP2_D0
480 MX28_PAD_SSP1_SCK__SSP2_D1
481 MX28_PAD_SSP1_CMD__SSP2_D2
482 MX28_PAD_SSP0_DATA5__SSP2_D3
483 MX28_PAD_SSP0_DATA6__SSP2_CMD
484 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
485 MX28_PAD_SSP0_DATA7__SSP2_SCK
487 fsl,drive-strength = <MXS_DRIVE_8mA>;
488 fsl,voltage = <MXS_VOLTAGE_HIGH>;
489 fsl,pull-up = <MXS_PULL_ENABLE>;
492 mmc2_cd_cfg: mmc2-cd-cfg {
494 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
496 fsl,pull-up = <MXS_PULL_DISABLE>;
499 mmc2_sck_cfg: mmc2-sck-cfg {
501 MX28_PAD_SSP0_DATA7__SSP2_SCK
503 fsl,drive-strength = <MXS_DRIVE_12mA>;
504 fsl,pull-up = <MXS_PULL_DISABLE>;
507 i2c0_pins_a: i2c0@0 {
510 MX28_PAD_I2C0_SCL__I2C0_SCL
511 MX28_PAD_I2C0_SDA__I2C0_SDA
513 fsl,drive-strength = <MXS_DRIVE_8mA>;
514 fsl,voltage = <MXS_VOLTAGE_HIGH>;
515 fsl,pull-up = <MXS_PULL_ENABLE>;
518 i2c0_pins_b: i2c0@1 {
521 MX28_PAD_AUART0_RX__I2C0_SCL
522 MX28_PAD_AUART0_TX__I2C0_SDA
524 fsl,drive-strength = <MXS_DRIVE_8mA>;
525 fsl,voltage = <MXS_VOLTAGE_HIGH>;
526 fsl,pull-up = <MXS_PULL_ENABLE>;
529 i2c1_pins_a: i2c1@0 {
532 MX28_PAD_PWM0__I2C1_SCL
533 MX28_PAD_PWM1__I2C1_SDA
535 fsl,drive-strength = <MXS_DRIVE_8mA>;
536 fsl,voltage = <MXS_VOLTAGE_HIGH>;
537 fsl,pull-up = <MXS_PULL_ENABLE>;
540 saif0_pins_a: saif0@0 {
543 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
544 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
545 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
546 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
548 fsl,drive-strength = <MXS_DRIVE_12mA>;
549 fsl,voltage = <MXS_VOLTAGE_HIGH>;
550 fsl,pull-up = <MXS_PULL_ENABLE>;
553 saif0_pins_b: saif0@1 {
556 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
557 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
558 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
560 fsl,drive-strength = <MXS_DRIVE_12mA>;
561 fsl,voltage = <MXS_VOLTAGE_HIGH>;
562 fsl,pull-up = <MXS_PULL_ENABLE>;
565 saif1_pins_a: saif1@0 {
568 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
570 fsl,drive-strength = <MXS_DRIVE_12mA>;
571 fsl,voltage = <MXS_VOLTAGE_HIGH>;
572 fsl,pull-up = <MXS_PULL_ENABLE>;
575 pwm0_pins_a: pwm0@0 {
580 fsl,drive-strength = <MXS_DRIVE_4mA>;
581 fsl,voltage = <MXS_VOLTAGE_HIGH>;
582 fsl,pull-up = <MXS_PULL_DISABLE>;
585 pwm2_pins_a: pwm2@0 {
590 fsl,drive-strength = <MXS_DRIVE_4mA>;
591 fsl,voltage = <MXS_VOLTAGE_HIGH>;
592 fsl,pull-up = <MXS_PULL_DISABLE>;
595 pwm3_pins_a: pwm3@0 {
600 fsl,drive-strength = <MXS_DRIVE_4mA>;
601 fsl,voltage = <MXS_VOLTAGE_HIGH>;
602 fsl,pull-up = <MXS_PULL_DISABLE>;
605 pwm3_pins_b: pwm3@1 {
608 MX28_PAD_SAIF0_MCLK__PWM_3
610 fsl,drive-strength = <MXS_DRIVE_4mA>;
611 fsl,voltage = <MXS_VOLTAGE_HIGH>;
612 fsl,pull-up = <MXS_PULL_DISABLE>;
615 pwm4_pins_a: pwm4@0 {
620 fsl,drive-strength = <MXS_DRIVE_4mA>;
621 fsl,voltage = <MXS_VOLTAGE_HIGH>;
622 fsl,pull-up = <MXS_PULL_DISABLE>;
625 lcdif_24bit_pins_a: lcdif-24bit@0 {
628 MX28_PAD_LCD_D00__LCD_D0
629 MX28_PAD_LCD_D01__LCD_D1
630 MX28_PAD_LCD_D02__LCD_D2
631 MX28_PAD_LCD_D03__LCD_D3
632 MX28_PAD_LCD_D04__LCD_D4
633 MX28_PAD_LCD_D05__LCD_D5
634 MX28_PAD_LCD_D06__LCD_D6
635 MX28_PAD_LCD_D07__LCD_D7
636 MX28_PAD_LCD_D08__LCD_D8
637 MX28_PAD_LCD_D09__LCD_D9
638 MX28_PAD_LCD_D10__LCD_D10
639 MX28_PAD_LCD_D11__LCD_D11
640 MX28_PAD_LCD_D12__LCD_D12
641 MX28_PAD_LCD_D13__LCD_D13
642 MX28_PAD_LCD_D14__LCD_D14
643 MX28_PAD_LCD_D15__LCD_D15
644 MX28_PAD_LCD_D16__LCD_D16
645 MX28_PAD_LCD_D17__LCD_D17
646 MX28_PAD_LCD_D18__LCD_D18
647 MX28_PAD_LCD_D19__LCD_D19
648 MX28_PAD_LCD_D20__LCD_D20
649 MX28_PAD_LCD_D21__LCD_D21
650 MX28_PAD_LCD_D22__LCD_D22
651 MX28_PAD_LCD_D23__LCD_D23
653 fsl,drive-strength = <MXS_DRIVE_4mA>;
654 fsl,voltage = <MXS_VOLTAGE_HIGH>;
655 fsl,pull-up = <MXS_PULL_DISABLE>;
658 lcdif_16bit_pins_a: lcdif-16bit@0 {
661 MX28_PAD_LCD_D00__LCD_D0
662 MX28_PAD_LCD_D01__LCD_D1
663 MX28_PAD_LCD_D02__LCD_D2
664 MX28_PAD_LCD_D03__LCD_D3
665 MX28_PAD_LCD_D04__LCD_D4
666 MX28_PAD_LCD_D05__LCD_D5
667 MX28_PAD_LCD_D06__LCD_D6
668 MX28_PAD_LCD_D07__LCD_D7
669 MX28_PAD_LCD_D08__LCD_D8
670 MX28_PAD_LCD_D09__LCD_D9
671 MX28_PAD_LCD_D10__LCD_D10
672 MX28_PAD_LCD_D11__LCD_D11
673 MX28_PAD_LCD_D12__LCD_D12
674 MX28_PAD_LCD_D13__LCD_D13
675 MX28_PAD_LCD_D14__LCD_D14
676 MX28_PAD_LCD_D15__LCD_D15
678 fsl,drive-strength = <MXS_DRIVE_4mA>;
679 fsl,voltage = <MXS_VOLTAGE_HIGH>;
680 fsl,pull-up = <MXS_PULL_DISABLE>;
683 lcdif_sync_pins_a: lcdif-sync@0 {
686 MX28_PAD_LCD_RS__LCD_DOTCLK
687 MX28_PAD_LCD_CS__LCD_ENABLE
688 MX28_PAD_LCD_RD_E__LCD_VSYNC
689 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
691 fsl,drive-strength = <MXS_DRIVE_4mA>;
692 fsl,voltage = <MXS_VOLTAGE_HIGH>;
693 fsl,pull-up = <MXS_PULL_DISABLE>;
696 can0_pins_a: can0@0 {
699 MX28_PAD_GPMI_RDY2__CAN0_TX
700 MX28_PAD_GPMI_RDY3__CAN0_RX
702 fsl,drive-strength = <MXS_DRIVE_4mA>;
703 fsl,voltage = <MXS_VOLTAGE_HIGH>;
704 fsl,pull-up = <MXS_PULL_DISABLE>;
707 can1_pins_a: can1@0 {
710 MX28_PAD_GPMI_CE2N__CAN1_TX
711 MX28_PAD_GPMI_CE3N__CAN1_RX
713 fsl,drive-strength = <MXS_DRIVE_4mA>;
714 fsl,voltage = <MXS_VOLTAGE_HIGH>;
715 fsl,pull-up = <MXS_PULL_DISABLE>;
718 spi2_pins_a: spi2@0 {
721 MX28_PAD_SSP2_SCK__SSP2_SCK
722 MX28_PAD_SSP2_MOSI__SSP2_CMD
723 MX28_PAD_SSP2_MISO__SSP2_D0
724 MX28_PAD_SSP2_SS0__SSP2_D3
726 fsl,drive-strength = <MXS_DRIVE_8mA>;
727 fsl,voltage = <MXS_VOLTAGE_HIGH>;
728 fsl,pull-up = <MXS_PULL_ENABLE>;
731 spi3_pins_a: spi3@0 {
734 MX28_PAD_AUART2_RX__SSP3_D4
735 MX28_PAD_AUART2_TX__SSP3_D5
736 MX28_PAD_SSP3_SCK__SSP3_SCK
737 MX28_PAD_SSP3_MOSI__SSP3_CMD
738 MX28_PAD_SSP3_MISO__SSP3_D0
739 MX28_PAD_SSP3_SS0__SSP3_D3
741 fsl,drive-strength = <MXS_DRIVE_8mA>;
742 fsl,voltage = <MXS_VOLTAGE_HIGH>;
743 fsl,pull-up = <MXS_PULL_DISABLE>;
746 usbphy0_pins_a: usbphy0@0 {
749 MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
751 fsl,drive-strength = <MXS_DRIVE_12mA>;
752 fsl,voltage = <MXS_VOLTAGE_HIGH>;
753 fsl,pull-up = <MXS_PULL_DISABLE>;
756 usbphy0_pins_b: usbphy0@1 {
759 MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
761 fsl,drive-strength = <MXS_DRIVE_12mA>;
762 fsl,voltage = <MXS_VOLTAGE_HIGH>;
763 fsl,pull-up = <MXS_PULL_DISABLE>;
766 usbphy1_pins_a: usbphy1@0 {
769 MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
771 fsl,drive-strength = <MXS_DRIVE_12mA>;
772 fsl,voltage = <MXS_VOLTAGE_HIGH>;
773 fsl,pull-up = <MXS_PULL_DISABLE>;
776 usb0_id_pins_a: usb0id@0 {
779 MX28_PAD_AUART1_RTS__USB0_ID
781 fsl,drive-strength = <MXS_DRIVE_12mA>;
782 fsl,voltage = <MXS_VOLTAGE_HIGH>;
783 fsl,pull-up = <MXS_PULL_ENABLE>;
787 digctl: digctl@8001c000 {
788 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
789 reg = <0x8001c000 0x2000>;
795 reg = <0x80022000 0x2000>;
799 dma_apbx: dma-apbx@80024000 {
800 compatible = "fsl,imx28-dma-apbx";
801 reg = <0x80024000 0x2000>;
802 interrupts = <78 79 66 0
806 interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
807 "saif0", "saif1", "i2c0", "i2c1",
808 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
809 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
816 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
817 reg = <0x80028000 0x2000>;
818 interrupts = <52 53 54>;
823 reg = <0x8002a000 0x2000>;
828 ocotp: ocotp@8002c000 {
829 compatible = "fsl,ocotp";
830 reg = <0x8002c000 0x2000>;
835 reg = <0x8002e000 0x2000>;
839 lcdif: lcdif@80030000 {
840 compatible = "fsl,imx28-lcdif";
841 reg = <0x80030000 0x2000>;
844 dmas = <&dma_apbh 13>;
850 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
851 reg = <0x80032000 0x2000>;
853 clocks = <&clks 58>, <&clks 58>;
854 clock-names = "ipg", "per";
859 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
860 reg = <0x80034000 0x2000>;
862 clocks = <&clks 59>, <&clks 59>;
863 clock-names = "ipg", "per";
867 simdbg: simdbg@8003c000 {
868 reg = <0x8003c000 0x200>;
872 simgpmisel: simgpmisel@8003c200 {
873 reg = <0x8003c200 0x100>;
877 simsspsel: simsspsel@8003c300 {
878 reg = <0x8003c300 0x100>;
882 simmemsel: simmemsel@8003c400 {
883 reg = <0x8003c400 0x100>;
887 gpiomon: gpiomon@8003c500 {
888 reg = <0x8003c500 0x100>;
892 simenet: simenet@8003c700 {
893 reg = <0x8003c700 0x100>;
897 armjtag: armjtag@8003c800 {
898 reg = <0x8003c800 0x100>;
904 compatible = "simple-bus";
905 #address-cells = <1>;
907 reg = <0x80040000 0x40000>;
910 clks: clkctrl@80040000 {
911 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
912 reg = <0x80040000 0x2000>;
916 saif0: saif@80042000 {
917 compatible = "fsl,imx28-saif";
918 reg = <0x80042000 0x2000>;
922 dmas = <&dma_apbx 4>;
927 power: power@80044000 {
928 reg = <0x80044000 0x2000>;
932 saif1: saif@80046000 {
933 compatible = "fsl,imx28-saif";
934 reg = <0x80046000 0x2000>;
937 dmas = <&dma_apbx 5>;
942 lradc: lradc@80050000 {
943 compatible = "fsl,imx28-lradc";
944 reg = <0x80050000 0x2000>;
945 interrupts = <10 14 15 16 17 18 19
951 spdif: spdif@80054000 {
952 reg = <0x80054000 0x2000>;
954 dmas = <&dma_apbx 2>;
959 mxs_rtc: rtc@80056000 {
960 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
961 reg = <0x80056000 0x2000>;
966 #address-cells = <1>;
968 compatible = "fsl,imx28-i2c";
969 reg = <0x80058000 0x2000>;
971 clock-frequency = <100000>;
972 dmas = <&dma_apbx 6>;
978 #address-cells = <1>;
980 compatible = "fsl,imx28-i2c";
981 reg = <0x8005a000 0x2000>;
983 clock-frequency = <100000>;
984 dmas = <&dma_apbx 7>;
990 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
991 reg = <0x80064000 0x2000>;
994 fsl,pwm-number = <8>;
998 timer: timrot@80068000 {
999 compatible = "fsl,imx28-timrot", "fsl,timrot";
1000 reg = <0x80068000 0x2000>;
1001 interrupts = <48 49 50 51>;
1002 clocks = <&clks 26>;
1005 auart0: serial@8006a000 {
1006 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1007 reg = <0x8006a000 0x2000>;
1009 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
1010 dma-names = "rx", "tx";
1011 clocks = <&clks 45>;
1012 status = "disabled";
1015 auart1: serial@8006c000 {
1016 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1017 reg = <0x8006c000 0x2000>;
1019 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
1020 dma-names = "rx", "tx";
1021 clocks = <&clks 45>;
1022 status = "disabled";
1025 auart2: serial@8006e000 {
1026 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1027 reg = <0x8006e000 0x2000>;
1029 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
1030 dma-names = "rx", "tx";
1031 clocks = <&clks 45>;
1032 status = "disabled";
1035 auart3: serial@80070000 {
1036 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1037 reg = <0x80070000 0x2000>;
1039 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
1040 dma-names = "rx", "tx";
1041 clocks = <&clks 45>;
1042 status = "disabled";
1045 auart4: serial@80072000 {
1046 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1047 reg = <0x80072000 0x2000>;
1049 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1050 dma-names = "rx", "tx";
1051 clocks = <&clks 45>;
1052 status = "disabled";
1055 duart: serial@80074000 {
1056 compatible = "arm,pl011", "arm,primecell";
1057 reg = <0x80074000 0x1000>;
1059 clocks = <&clks 45>, <&clks 26>;
1060 clock-names = "uart", "apb_pclk";
1061 status = "disabled";
1064 usbphy0: usbphy@8007c000 {
1065 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1066 reg = <0x8007c000 0x2000>;
1067 clocks = <&clks 62>;
1068 status = "disabled";
1071 usbphy1: usbphy@8007e000 {
1072 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1073 reg = <0x8007e000 0x2000>;
1074 clocks = <&clks 63>;
1075 status = "disabled";
1081 compatible = "simple-bus";
1082 #address-cells = <1>;
1084 reg = <0x80080000 0x80000>;
1087 usb0: usb@80080000 {
1088 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1089 reg = <0x80080000 0x10000>;
1091 clocks = <&clks 60>;
1092 fsl,usbphy = <&usbphy0>;
1093 status = "disabled";
1096 usb1: usb@80090000 {
1097 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1098 reg = <0x80090000 0x10000>;
1100 clocks = <&clks 61>;
1101 fsl,usbphy = <&usbphy1>;
1102 status = "disabled";
1105 dflpt: dflpt@800c0000 {
1106 reg = <0x800c0000 0x10000>;
1107 status = "disabled";
1110 mac0: ethernet@800f0000 {
1111 compatible = "fsl,imx28-fec";
1112 reg = <0x800f0000 0x4000>;
1114 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1115 clock-names = "ipg", "ahb", "enet_out";
1116 status = "disabled";
1119 mac1: ethernet@800f4000 {
1120 compatible = "fsl,imx28-fec";
1121 reg = <0x800f4000 0x4000>;
1123 clocks = <&clks 57>, <&clks 57>;
1124 clock-names = "ipg", "ahb";
1125 status = "disabled";
1128 etn_switch: switch@800f8000 {
1129 reg = <0x800f8000 0x8000>;
1130 status = "disabled";