2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
16 model = "DENX M53EVK";
17 compatible = "denx,imx53-m53evk", "fsl,imx53";
20 reg = <0x70000000 0x20000000>;
25 compatible = "fsl,imx-parallel-display";
27 interface-pix-fmt = "bgr666";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_ipu_disp1>;
34 clock-frequency = <31500000>;
50 compatible = "pwm-backlight";
51 pwms = <&pwm1 0 3000>;
52 brightness-levels = <0 4 8 16 32 64 128 255>;
53 default-brightness-level = <6>;
54 power-supply = <®_backlight>;
58 compatible = "gpio-leds";
59 pinctrl-names = "default";
60 pinctrl-0 = <&led_pin_gpio>;
65 linux,default-trigger = "heartbeat";
71 linux,default-trigger = "heartbeat";
76 compatible = "simple-bus";
80 reg_3p2v: regulator@0 {
81 compatible = "regulator-fixed";
83 regulator-name = "3P2V";
84 regulator-min-microvolt = <3200000>;
85 regulator-max-microvolt = <3200000>;
90 reg_backlight: regulator@1 {
91 compatible = "regulator-fixed";
93 regulator-name = "lcd-supply";
94 regulator-min-microvolt = <3200000>;
95 regulator-max-microvolt = <3200000>;
99 reg_usbh1_vbus: regulator@3 {
100 compatible = "regulator-fixed";
102 regulator-name = "vbus";
103 regulator-min-microvolt = <5000000>;
104 regulator-max-microvolt = <5000000>;
110 compatible = "fsl,imx53-m53evk-sgtl5000",
111 "fsl,imx-audio-sgtl5000";
112 model = "imx53-m53evk-sgtl5000";
113 ssi-controller = <&ssi2>;
114 audio-codec = <&sgtl5000>;
116 "MIC_IN", "Mic Jack",
117 "Mic Jack", "Mic Bias",
118 "LINE_IN", "Line In Jack",
119 "Headphone Jack", "HP_OUT",
120 "Ext Spk", "LINE_OUT";
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_audmux>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_can1>;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_can2>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_esdhc1>;
147 cd-gpios = <&gpio1 1 0>;
148 wp-gpios = <&gpio1 9 0>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_fec>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_i2c1>;
165 compatible = "fsl,sgtl5000";
167 VDDA-supply = <®_3p2v>;
168 VDDIO-supply = <®_3p2v>;
169 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_i2c2>;
176 clock-frequency = <400000>;
180 compatible = "st,stmpe610";
181 #address-cells = <1>;
186 interrupts = <6 0x0>;
187 interrupt-parent = <&gpio7>;
191 compatible = "stmpe,ts";
193 ts,sample-time = <4>;
198 ts,touch-det-delay = <3>;
206 compatible = "atmel,24c128";
212 compatible = "stm,m41t62";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_i2c3>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_hog>;
228 pinctrl_hog: hoggrp {
230 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
231 MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
232 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
233 MX53_PAD_GPIO_2__GPIO1_2 0x80000000
234 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000
238 led_pin_gpio: led_gpio@0 {
240 MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000
241 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000
245 pinctrl_audmux: audmuxgrp {
247 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000
248 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000
249 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000
250 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000
254 pinctrl_can1: can1grp {
256 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
257 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
261 pinctrl_can2: can2grp {
263 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
264 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
268 pinctrl_esdhc1: esdhc1grp {
270 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
271 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
272 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
273 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
274 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
275 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
279 pinctrl_fec: fecgrp {
281 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
282 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
283 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
284 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
285 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
286 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
287 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
288 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
289 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
290 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
294 pinctrl_i2c1: i2c1grp {
296 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
297 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
301 pinctrl_i2c2: i2c2grp {
303 MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000
304 MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000
308 pinctrl_i2c3: i2c3grp {
310 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
311 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
315 pinctrl_ipu_disp1: ipudisp1grp {
317 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5
318 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5
319 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5
320 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5
321 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5
322 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5
323 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5
324 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5
325 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5
326 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5
327 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5
328 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5
329 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5
330 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5
331 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5
332 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5
333 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5
334 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5
335 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5
336 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5
337 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5
338 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5
339 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5
340 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5
341 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5
342 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5
343 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5
344 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5
345 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5
346 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5
347 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5
348 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5
352 pinctrl_nand: nandgrp {
354 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
355 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
356 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
357 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
358 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
359 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
360 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
361 MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4
362 MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4
363 MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4
364 MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4
365 MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4
366 MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4
367 MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4
368 MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4
372 pinctrl_pwm1: pwm1grp {
374 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5
378 pinctrl_uart1: uart1grp {
380 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
381 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
385 pinctrl_uart2: uart2grp {
387 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
388 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
392 pinctrl_uart3: uart3grp {
394 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
395 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
396 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
397 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
404 pinctrl-names = "default";
405 pinctrl-0 = <&pinctrl_nand>;
406 nand-bus-width = <8>;
407 nand-ecc-mode = "hw";
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_pwm1>;
422 fsl,mode = "i2s-slave";
427 pinctrl-names = "default";
428 pinctrl-0 = <&pinctrl_uart1>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&pinctrl_uart2>;
439 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_uart3>;
445 vbus-supply = <®_usbh1_vbus>;
451 dr_mode = "peripheral";