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1 /*
2  * Copyright 2012 <LW@KARO-electronics.de>
3  * based on imx53-qsb.dts
4  *   Copyright 2011 Freescale Semiconductor, Inc.
5  *   Copyright 2011 Linaro Ltd.
6  *
7  * The code contained herein is licensed under the GNU General Public
8  * License. You may obtain a copy of the GNU General Public License
9  * Version 2 at the following locations:
10  *
11  * http://www.opensource.org/licenses/gpl-license.html
12  * http://www.gnu.org/copyleft/gpl.html
13  */
14
15 #include "imx53.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17
18 / {
19         model = "Ka-Ro electronics TX53 module";
20         compatible = "karo,tx53", "fsl,imx53";
21
22         aliases {
23                 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
24                 can1 = &can1;
25                 ipu = &ipu;
26                 reg_can_xcvr = &reg_can_xcvr;
27                 usbh1 = &usbh1;
28                 usbotg = &usbotg;
29         };
30
31         clocks {
32                 ckih1 {
33                         clock-frequency = <0>;
34                 };
35
36                 mclk: clock@0 {
37                         compatible = "fixed-clock";
38                         reg = <0>;
39                         #clock-cells = <0>;
40                         clock-frequency = <26000000>;
41                 };
42         };
43
44         gpio-keys {
45                 compatible = "gpio-keys";
46                 pinctrl-names = "default";
47                 pinctrl-0 = <&pinctrl_gpio_key>;
48
49                 power {
50                         label = "Power Button";
51                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
52                         linux,code = <116>; /* KEY_POWER */
53                         wakeup-source;
54                 };
55         };
56
57         leds {
58                 compatible = "gpio-leds";
59                 pinctrl-names = "default";
60                 pinctrl-0 = <&pinctrl_stk5led>;
61
62                 user {
63                         label = "Heartbeat";
64                         gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
65                         linux,default-trigger = "heartbeat";
66                 };
67         };
68
69         regulators {
70                 compatible = "simple-bus";
71                 #address-cells = <1>;
72                 #size-cells = <0>;
73
74                 reg_2v5: regulator@0 {
75                         compatible = "regulator-fixed";
76                         reg = <0>;
77                         regulator-name = "2V5";
78                         regulator-min-microvolt = <2500000>;
79                         regulator-max-microvolt = <2500000>;
80                 };
81
82                 reg_3v3: regulator@1 {
83                         compatible = "regulator-fixed";
84                         reg = <1>;
85                         regulator-name = "3V3";
86                         regulator-min-microvolt = <3300000>;
87                         regulator-max-microvolt = <3300000>;
88                 };
89
90                 reg_can_xcvr: regulator@2 {
91                         compatible = "regulator-fixed";
92                         reg = <2>;
93                         regulator-name = "CAN XCVR";
94                         regulator-min-microvolt = <3300000>;
95                         regulator-max-microvolt = <3300000>;
96                         pinctrl-names = "default";
97                         pinctrl-0 = <&pinctrl_can_xcvr>;
98                         gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
99                 };
100
101                 reg_usbh1_vbus: regulator@3 {
102                         compatible = "regulator-fixed";
103                         reg = <3>;
104                         regulator-name = "usbh1_vbus";
105                         regulator-min-microvolt = <5000000>;
106                         regulator-max-microvolt = <5000000>;
107                         pinctrl-names = "default";
108                         pinctrl-0 = <&pinctrl_usbh1_vbus>;
109                         gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
110                         enable-active-high;
111                 };
112
113                 reg_usbotg_vbus: regulator@4 {
114                         compatible = "regulator-fixed";
115                         reg = <4>;
116                         regulator-name = "usbotg_vbus";
117                         regulator-min-microvolt = <5000000>;
118                         regulator-max-microvolt = <5000000>;
119                         pinctrl-names = "default";
120                         pinctrl-0 = <&pinctrl_usbotg_vbus>;
121                         gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
122                         enable-active-high;
123                 };
124         };
125
126         sound {
127                 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
128                 model = "tx53-audio-sgtl5000";
129                 ssi-controller = <&ssi1>;
130                 audio-codec = <&sgtl5000>;
131                 audio-routing =
132                         "MIC_IN", "Mic Jack",
133                         "Mic Jack", "Mic Bias",
134                         "Headphone Jack", "HP_OUT";
135                 /* '1' based port numbers according to datasheet names */
136                 mux-int-port = <1>;
137                 mux-ext-port = <5>;
138         };
139 };
140
141 &audmux {
142         pinctrl-names = "default";
143         pinctrl-0 = <&pinctrl_ssi1>;
144         status = "okay";
145 };
146
147 &can1 {
148         pinctrl-names = "default";
149         pinctrl-0 = <&pinctrl_can1>;
150         xceiver-supply = <&reg_can_xcvr>;
151         status = "okay";
152 };
153
154 &can2 {
155         pinctrl-names = "default";
156         pinctrl-0 = <&pinctrl_can2>;
157         xceiver-supply = <&reg_can_xcvr>;
158         status = "okay";
159 };
160
161 &ecspi1 {
162         pinctrl-names = "default";
163         pinctrl-0 = <&pinctrl_ecspi1>;
164         status = "okay";
165
166         cs-gpios = <
167                 &gpio2 30 GPIO_ACTIVE_HIGH
168                 &gpio3 19 GPIO_ACTIVE_HIGH
169         >;
170
171         spidev0: spi@0 {
172                 compatible = "spidev";
173                 reg = <0>;
174                 spi-max-frequency = <54000000>;
175         };
176
177         spidev1: spi@1 {
178                 compatible = "spidev";
179                 reg = <1>;
180                 spi-max-frequency = <54000000>;
181         };
182 };
183
184 &esdhc1 {
185         cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
186         fsl,wp-controller;
187         pinctrl-names = "default";
188         pinctrl-0 = <&pinctrl_esdhc1>;
189         status = "okay";
190 };
191
192 &esdhc2 {
193         cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
194         fsl,wp-controller;
195         pinctrl-names = "default";
196         pinctrl-0 = <&pinctrl_esdhc2>;
197         status = "okay";
198 };
199
200 &fec {
201         pinctrl-names = "default";
202         pinctrl-0 = <&pinctrl_fec>;
203         phy-mode = "rmii";
204         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
205         phy-handle = <&phy0>;
206         mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
207         status = "okay";
208
209         phy0: ethernet-phy@0 {
210                 interrupt-parent = <&gpio2>;
211                 interrupts = <4>;
212                 device_type = "ethernet-phy";
213         };
214 };
215
216 &i2c1 {
217         pinctrl-names = "default";
218         pinctrl-0 = <&pinctrl_i2c1>;
219         clock-frequency = <400000>;
220         status = "okay";
221
222         rtc1: ds1339@68 {
223                 compatible = "dallas,ds1339";
224                 reg = <0x68>;
225                 pinctrl-names = "default";
226                 pinctrl-0 = <&pinctrl_ds1339>;
227                 interrupt-parent = <&gpio4>;
228                 interrupts = <20 0>;
229         };
230 };
231
232 &iomuxc {
233         pinctrl-names = "default";
234         pinctrl-0 = <&pinctrl_hog>;
235
236         imx53-tx53 {
237                 pinctrl_hog: hoggrp {
238                         /* pins not in use by any device on the Starterkit board series */
239                         fsl,pins = <
240                                 /* CMOS Sensor Interface */
241                                 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
242                                 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
243                                 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
244                                 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
245                                 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
246                                 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
247                                 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
248                                 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
249                                 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
250                                 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
251                                 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
252                                 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
253                                 /* Module Specific Signal */
254                                 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
255                                 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
256                                 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
257                                 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
258                                 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
259                                 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
260                                 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
261                                 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
262                                 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
263                                 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
264                                 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
265                                 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
266                                 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
267                                 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
268                                 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
269                                 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
270                                 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
271                                 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
272                                 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
273                                 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
274                                 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
275                                 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
276                                 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
277                                 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
278                                 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
279                                 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
280                                 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
281                                 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
282                                 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
283                                 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
284                                 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
285                                 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
286                                 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
287                                 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
288                                 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
289                                 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
290                                 >;
291                 };
292
293                 pinctrl_can1: can1grp {
294                         fsl,pins = <
295                                 MX53_PAD_GPIO_7__CAN1_TXCAN             0x80000000
296                                 MX53_PAD_GPIO_8__CAN1_RXCAN             0x80000000
297                         >;
298                 };
299
300                 pinctrl_can2: can2grp {
301                         fsl,pins = <
302                                 MX53_PAD_KEY_COL4__CAN2_TXCAN           0x80000000
303                                 MX53_PAD_KEY_ROW4__CAN2_RXCAN           0x80000000
304                         >;
305                 };
306
307                 pinctrl_can_xcvr: can-xcvrgrp {
308                         fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
309                 };
310
311                 pinctrl_ds1339: ds1339grp {
312                         fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
313                 };
314
315                 pinctrl_ecspi1: ecspi1grp {
316                         fsl,pins = <
317                                 MX53_PAD_GPIO_19__ECSPI1_RDY            0x80000000
318                                 MX53_PAD_EIM_EB2__ECSPI1_SS0            0x80000000
319                                 MX53_PAD_EIM_D16__ECSPI1_SCLK           0x80000000
320                                 MX53_PAD_EIM_D17__ECSPI1_MISO           0x80000000
321                                 MX53_PAD_EIM_D18__ECSPI1_MOSI           0x80000000
322                                 MX53_PAD_EIM_D19__ECSPI1_SS1            0x80000000
323                         >;
324                 };
325
326                 pinctrl_esdhc1: esdhc1grp {
327                         fsl,pins = <
328                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
329                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
330                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
331                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
332                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
333                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
334                                 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
335                         >;
336                 };
337
338                 pinctrl_esdhc2: esdhc2grp {
339                         fsl,pins = <
340                                 MX53_PAD_SD2_CMD__ESDHC2_CMD            0x1d5
341                                 MX53_PAD_SD2_CLK__ESDHC2_CLK            0x1d5
342                                 MX53_PAD_SD2_DATA0__ESDHC2_DAT0         0x1d5
343                                 MX53_PAD_SD2_DATA1__ESDHC2_DAT1         0x1d5
344                                 MX53_PAD_SD2_DATA2__ESDHC2_DAT2         0x1d5
345                                 MX53_PAD_SD2_DATA3__ESDHC2_DAT3         0x1d5
346                                 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
347                         >;
348                 };
349
350                 pinctrl_fec: fecgrp {
351                         fsl,pins = <
352                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
353                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
354                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
355                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
356                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
357                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
358                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
359                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
360                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
361                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
362                         >;
363                 };
364
365                 pinctrl_gpio_key: gpio-keygrp {
366                         fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
367                 };
368
369                 pinctrl_i2c1: i2c1grp {
370                         fsl,pins = <
371                                 MX53_PAD_EIM_D21__I2C1_SCL              0xc0000000
372                                 MX53_PAD_EIM_D28__I2C1_SDA              0xc0000000
373                         >;
374                 };
375
376                 pinctrl_i2c3: i2c3grp {
377                         fsl,pins = <
378                                 MX53_PAD_GPIO_3__I2C3_SCL               0xc0000000
379                                 MX53_PAD_GPIO_6__I2C3_SDA               0xc0000000
380                         >;
381                 };
382
383                 pinctrl_nand: nandgrp {
384                         fsl,pins = <
385                                 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B     0x4
386                                 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B     0x4
387                                 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE       0x4
388                                 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE       0x4
389                                 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B     0xe0
390                                 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0      0xe0
391                                 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0      0x4
392                                 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0    0xa4
393                                 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1    0xa4
394                                 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2    0xa4
395                                 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3    0xa4
396                                 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4    0xa4
397                                 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5    0xa4
398                                 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6    0xa4
399                                 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7    0xa4
400                         >;
401                 };
402
403                 pinctrl_pwm2: pwm2grp {
404                         fsl,pins = <
405                                 MX53_PAD_GPIO_1__PWM2_PWMO              0x80000000
406                         >;
407                 };
408
409                 pinctrl_ssi1: ssi1grp {
410                         fsl,pins = <
411                                 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC      0x80000000
412                                 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD      0x80000000
413                                 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS     0x80000000
414                                 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD      0x80000000
415                         >;
416                 };
417
418                 pinctrl_ssi2: ssi2grp {
419                         fsl,pins = <
420                                 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC     0x80000000
421                                 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD     0x80000000
422                                 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS    0x80000000
423                                 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD     0x80000000
424                                 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
425                         >;
426                 };
427
428                 pinctrl_stk5led: stk5ledgrp {
429                         fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
430                 };
431
432                 pinctrl_uart1: uart1grp {
433                         fsl,pins = <
434                                 MX53_PAD_PATA_DIOW__UART1_TXD_MUX       0x1e4
435                                 MX53_PAD_PATA_DMACK__UART1_RXD_MUX      0x1e4
436                                 MX53_PAD_PATA_RESET_B__UART1_CTS        0x1c5
437                                 MX53_PAD_PATA_IORDY__UART1_RTS          0x1c5
438                         >;
439                 };
440
441                 pinctrl_uart2: uart2grp {
442                         fsl,pins = <
443                                 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1c5
444                                 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1c5
445                                 MX53_PAD_PATA_DIOR__UART2_RTS           0x1c5
446                                 MX53_PAD_PATA_INTRQ__UART2_CTS          0x1c5
447                         >;
448                 };
449
450                 pinctrl_uart3: uart3grp {
451                         fsl,pins = <
452                                 MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
453                                 MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
454                                 MX53_PAD_PATA_DA_1__UART3_CTS           0x1e4
455                                 MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
456                         >;
457                 };
458
459                 pinctrl_usbh1: usbh1grp {
460                         fsl,pins = <
461                                 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
462                         >;
463                 };
464
465                 pinctrl_usbh1_vbus: usbh1-vbusgrp {
466                         fsl,pins = <
467                                 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
468                         >;
469                 };
470
471                 pinctrl_usbotg_vbus: usbotg-vbusgrp {
472                         fsl,pins = <
473                                 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
474                                 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
475                         >;
476                 };
477         };
478 };
479
480 &ipu {
481         status = "okay";
482 };
483
484 &nfc {
485         pinctrl-names = "default";
486         pinctrl-0 = <&pinctrl_nand>;
487         nand-bus-width = <8>;
488         nand-ecc-mode = "hw";
489         nand-on-flash-bbt;
490         status = "okay";
491 };
492
493 &pwm2 {
494         pinctrl-names = "default";
495         pinctrl-0 = <&pinctrl_pwm2>;
496         #pwm-cells = <3>;
497 };
498
499 &sdma {
500         fsl,sdma-ram-script-name = "sdma-imx53.bin";
501 };
502
503 &ssi1 {
504         codec-handle = <&sgtl5000>;
505         status = "okay";
506 };
507
508 &ssi2 {
509         status = "disabled";
510 };
511
512 &uart1 {
513         pinctrl-names = "default";
514         pinctrl-0 = <&pinctrl_uart1>;
515         uart-has-rtscts;
516         status = "okay";
517 };
518
519 &uart2 {
520         pinctrl-names = "default";
521         pinctrl-0 = <&pinctrl_uart2>;
522         uart-has-rtscts;
523         status = "okay";
524 };
525
526 &uart3 {
527         pinctrl-names = "default";
528         pinctrl-0 = <&pinctrl_uart3>;
529         uart-has-rtscts;
530         status = "okay";
531 };
532
533 &usbh1 {
534         pinctrl-names = "default";
535         pinctrl-0 = <&pinctrl_usbh1>;
536         phy_type = "utmi";
537         disable-over-current;
538         vbus-supply = <&reg_usbh1_vbus>;
539         status = "okay";
540 };
541
542 &usbotg {
543         phy_type = "utmi";
544         dr_mode = "peripheral";
545         disable-over-current;
546         vbus-supply = <&reg_usbotg_vbus>;
547         status = "okay";
548 };