2 * Copyright 2013 CompuLab Ltd.
3 * Copyright 2016 Christopher Spinrath
5 * Based on the devicetree distributed with the vendor kernel for the
7 * Copyright 2013 CompuLab Ltd.
8 * Author: Valentin Raevsky <valentin@compulab.co.il>
10 * This file is dual-licensed: you can use it either under the terms
11 * of the GPL or the X11 license, at your option. Note that this dual
12 * licensing only applies to this file, and not this project as a
15 * a) This file is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of the
18 * License, or (at your option) any later version.
20 * This file is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
27 * b) Permission is hereby granted, free of charge, to any person
28 * obtaining a copy of this software and associated documentation
29 * files (the "Software"), to deal in the Software without
30 * restriction, including without limitation the rights to use,
31 * copy, modify, merge, publish, distribute, sublicense, and/or
32 * sell copies of the Software, and to permit persons to whom the
33 * Software is furnished to do so, subject to the following
36 * The above copyright notice and this permission notice shall be
37 * included in all copies or substantial portions of the Software.
39 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
40 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
41 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
42 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
43 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
44 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
45 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
46 * OTHER DEALINGS IN THE SOFTWARE.
49 #include <dt-bindings/input/input.h>
50 #include "imx6q-cm-fx6.dts"
53 model = "CompuLab Utilite Pro";
54 compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
63 compatible = "ti,tfp410";
75 remote-endpoint = <¶llel_display_out>;
82 tfp410_out: endpoint {
83 remote-endpoint = <&hdmi_connector_in>;
90 compatible = "gpio-keys";
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_gpio_keys>;
95 label = "Power Button";
96 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_POWER>;
103 compatible = "hdmi-connector";
106 ddc-i2c-bus = <&i2c_dvi_ddc>;
109 hdmi_connector_in: endpoint {
110 remote-endpoint = <&tfp410_out>;
116 compatible = "i2c-mux-gpio";
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_i2c1mux>;
119 #address-cells = <1>;
122 mux-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
123 i2c-parent = <&i2c1>;
127 #address-cells = <1>;
131 compatible = "at24,24c02";
137 compatible = "emmicro,em3027";
144 #address-cells = <1>;
150 compatible = "fsl,imx-parallel-display";
151 #address-cells = <1>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_ipu1>;
156 interface-pix-fmt = "rgb24";
161 parallel_display_in: endpoint {
162 remote-endpoint = <&ipu1_di0_disp0>;
169 parallel_display_out: endpoint {
170 remote-endpoint = <&tfp410_in>;
177 * A single IPU is not able to drive both display interfaces available on the
178 * Utilite Pro at high resolution due to its bandwidth limitation. Since the
179 * tfp410 encoder is wired up to IPU1, sever the link between IPU1 and the
180 * SoC-internal Designware HDMI encoder forcing the latter to be connected to
181 * IPU2 instead of IPU1.
183 /delete-node/&ipu1_di0_hdmi;
184 /delete-node/&hdmi_mux_0;
185 /delete-node/&ipu1_di1_hdmi;
186 /delete-node/&hdmi_mux_1;
189 ddc-i2c-bus = <&i2c2>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_i2c1>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_i2c2>;
206 pinctrl_gpio_keys: gpio_keysgrp {
208 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
212 pinctrl_i2c1: i2c1grp {
214 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
215 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
219 pinctrl_i2c1mux: i2c1muxgrp {
221 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
225 pinctrl_i2c2: i2c2grp {
227 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
228 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
232 pinctrl_ipu1: ipu1grp {
234 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
235 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
236 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
237 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
238 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
239 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
240 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
241 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
242 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
243 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
244 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
245 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
246 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
247 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
248 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
249 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
250 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
251 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
252 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
253 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
254 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
255 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
256 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
257 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
258 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
259 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
260 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
261 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
265 pinctrl_uart2: uart2grp {
267 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
268 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
269 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
270 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
274 pinctrl_usdhc3: usdhc3grp {
276 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
277 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
278 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
279 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
280 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
281 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
285 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
287 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9
288 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9
289 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9
290 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9
291 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9
292 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9
296 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
298 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
299 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
300 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
301 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
302 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
303 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
309 remote-endpoint = <¶llel_display_in>;
314 reg = <0x000000 0 0 0 0>;
315 #address-cells = <3>;
318 /* non-removable i211 ethernet card */
319 eth1: intel,i211@pcie0,0 {
320 reg = <0x010000 0 0 0 0>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_uart2>;
333 pinctrl-names = "default", "state_100mhz", "state_200mhz";
334 pinctrl-0 = <&pinctrl_usdhc3>;
335 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
336 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
339 keep-power-in-suspend;