arch/arm/boot/dts/imx6qdl-sabreauto.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 / {
  14         aliases {
  15                 mxcfb0 = &mxcfb1;
  16                 mxcfb1 = &mxcfb2;
  17                 mxcfb2 = &mxcfb3;
  18                 mxcfb3 = &mxcfb4;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x80000000>;
  23         };
  24
  25         backlight {
  26                 compatible = "pwm-backlight";
  27                 pwms = <&pwm3 0 5000000>;
  28                 brightness-levels = <0 4 8 16 32 64 128 255>;
  29                 default-brightness-level = <7>;
  30         };
  31
  32         clocks {
  33                 codec_osc: anaclk2 {
  34                         compatible = "fixed-clock";
  35                         #clock-cells = <0>;
  36                         clock-frequency = <24576000>;
  37                 };
  38         };
  39
  40         gpio-keys {
  41                 compatible = "gpio-keys";
  42                 home {
  43                         label = "Home";
  44                         gpios = <&gpio1 11 1>;
  45                         linux,code = <102>; /* KEY_HOME */
  46                         gpio-key,wakeup;
  47                 };
  48
  49                 back {
  50                         label = "Back";
  51                         gpios = <&gpio1 12 1>;
  52                         linux,code = <158>; /* KEY_BACK */
  53                         gpio-key,wakeup;
  54                 };
  55
  56                 program {
  57                         label = "Program";
  58                         gpios = <&gpio2 12 1>;
  59                         linux,code = <362>; /* KEY_PROGRAM */
  60                         gpio-key,wakeup;
  61                 };
  62
  63                 volume-up {
  64                         label = "Volume Up";
  65                         gpios = <&gpio2 15 1>;
  66                         linux,code = <115>; /* KEY_VOLUMEUP */
  67                         gpio-key,wakeup;
  68                 };
  69
  70                 volume-down {
  71                         label = "Volume Down";
  72                         gpios = <&gpio5 14 1>;
  73                         linux,code = <114>; /* KEY_VOLUMEDOWN */
  74                         gpio-key,wakeup;
  75                 };
  76         };
  77
  78         hannstar_cabc {
  79                 compatible = "hannstar,cabc";
  80
  81                 lvds_share {
  82                         gpios = <&max7310_a 0 GPIO_ACTIVE_HIGH>;
  83                 };
  84         };
  85
  86         max7310_reset: max7310-reset {
  87                 compatible = "gpio-reset";
  88                 reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  89                 reset-delay-us = <1>;
  90                 #reset-cells = <0>;
  91         };
  92
  93         mxcfb1: fb@0 {
  94                 compatible = "fsl,mxc_sdc_fb";
  95                 disp_dev = "ldb";
  96                 interface_pix_fmt = "RGB666";
  97                 mode_str ="LDB-XGA";
  98                 default_bpp = <16>;
  99                 int_clk = <0>;
 100                 late_init = <0>;
 101                 status = "disabled";
 102         };
 103
 104         mxcfb2: fb@1 {
 105                 compatible = "fsl,mxc_sdc_fb";
 106                 disp_dev = "hdmi";
 107                 interface_pix_fmt = "RGB24";
 108                 mode_str ="1920x1080M@60";
 109                 default_bpp = <24>;
 110                 int_clk = <0>;
 111                 late_init = <0>;
 112                 status = "disabled";
 113         };
 114
 115         mxcfb3: fb@2 {
 116                 compatible = "fsl,mxc_sdc_fb";
 117                 disp_dev = "lcd";
 118                 interface_pix_fmt = "RGB565";
 119                 mode_str ="CLAA-WVGA";
 120                 default_bpp = <16>;
 121                 int_clk = <0>;
 122                 late_init = <0>;
 123                 status = "disabled";
 124         };
 125
 126         mxcfb4: fb@3 {
 127                 compatible = "fsl,mxc_sdc_fb";
 128                 disp_dev = "ldb";
 129                 interface_pix_fmt = "RGB666";
 130                 mode_str ="LDB-XGA";
 131                 default_bpp = <16>;
 132                 int_clk = <0>;
 133                 late_init = <0>;
 134                 status = "disabled";
 135         };
 136
 137         regulators {
 138                 compatible = "simple-bus";
 139                 reg_audio: cs42888_supply {
 140                         compatible = "regulator-fixed";
 141                         regulator-name = "cs42888_supply";
 142                         regulator-min-microvolt = <3300000>;
 143                         regulator-max-microvolt = <3300000>;
 144                         regulator-always-on;
 145                 };
 146
 147                 si4763_vio1: vio1_tnr {
 148                         compatible = "regulator-fixed";
 149                         regulator-name = "vio1";
 150                         regulator-min-microvolt = <3300000>;
 151                         regulator-max-microvolt = <3300000>;
 152                         regulator-always-on;
 153                 };
 154
 155                 si4763_vio2: vio2_tnr {
 156                         compatible = "regulator-fixed";
 157                         regulator-name = "vio2";
 158                         regulator-min-microvolt = <3300000>;
 159                         regulator-max-microvolt = <3300000>;
 160                         regulator-always-on;
 161                 };
 162
 163                 si4763_vd: f3v3_tnr {
 164                         compatible = "regulator-fixed";
 165                         regulator-name = "vd";
 166                         regulator-min-microvolt = <3300000>;
 167                         regulator-max-microvolt = <3300000>;
 168                         regulator-always-on;
 169                 };
 170
 171                 si4763_va: f5v_tnr {
 172                         compatible = "regulator-fixed";
 173                         regulator-name = "va";
 174                         regulator-min-microvolt = <5000000>;
 175                         regulator-max-microvolt = <5000000>;
 176                         regulator-always-on;
 177                 };
 178
 179                 reg_usb_h1_vbus: usb_h1_vbus {
 180                         compatible = "regulator-fixed";
 181                         regulator-name = "usb_h1_vbus";
 182                         regulator-min-microvolt = <5000000>;
 183                         regulator-max-microvolt = <5000000>;
 184                         gpio = <&max7310_b 7 GPIO_ACTIVE_HIGH>;
 185                         enable-active-high;
 186                 };
 187
 188                 reg_usb_otg_vbus: usb_otg_vbus {
 189                         compatible = "regulator-fixed";
 190                         regulator-name = "usb_otg_vbus";
 191                         regulator-min-microvolt = <5000000>;
 192                         regulator-max-microvolt = <5000000>;
 193                         gpio = <&max7310_c 1 GPIO_ACTIVE_HIGH>;
 194                         enable-active-high;
 195                 };
 196
 197                 reg_3p3v: 3p3v {
 198                         compatible = "regulator-fixed";
 199                         regulator-name = "3P3V";
 200                         regulator-min-microvolt = <3300000>;
 201                         regulator-max-microvolt = <3300000>;
 202                         regulator-always-on;
 203                 };
 204
 205                 reg_sd3_vmmc: sd3_vmmc{
 206                         compatible = "regulator-fixed";
 207                         regulator-name = "P3V3_SDa_SWITCHED";
 208                         regulator-min-microvolt = <3300000>;
 209                         regulator-max-microvolt = <3300000>;
 210                         gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
 211                         enable-active-high;
 212                         /* remove below line to enable this regulator */
 213                         status="disabled";
 214                 };
 215         };
 216
 217         sound-cs42888 {
 218                 compatible = "fsl,imx6-sabreauto-cs42888",
 219                                 "fsl,imx-audio-cs42888";
 220                 model = "imx-cs42888";
 221                 esai-controller = <&esai>;
 222                 asrc-controller = <&asrc_p2p>;
 223                 audio-codec = <&codec>;
 224         };
 225
 226         sound-fm {
 227                 compatible = "fsl,imx-audio-si476x",
 228                            "fsl,imx-tuner-si476x";
 229                 model = "imx-radio-si4763";
 230
 231                 ssi-controller = <&ssi2>;
 232                 fm-controller = <&si4763>;
 233                 mux-int-port = <2>;
 234                 mux-ext-port = <5>;
 235         };
 236
 237         sound-hdmi {
 238                 compatible = "fsl,imx6q-audio-hdmi",
 239                              "fsl,imx-audio-hdmi";
 240                 model = "imx-audio-hdmi";
 241                 hdmi-controller = <&hdmi_audio>;
 242         };
 243
 244         sound-spdif {
 245                 compatible = "fsl,imx-audio-spdif",
 246                            "fsl,imx-sabreauto-spdif";
 247                 model = "imx-spdif";
 248                 spdif-controller = <&spdif>;
 249                 spdif-in;
 250         };
 251
 252         v4l2_cap_0 {
 253                 compatible = "fsl,imx6q-v4l2-capture";
 254                 ipu_id = <0>;
 255                 csi_id = <0>;
 256                 mclk_source = <0>;
 257                 status = "okay";
 258         };
 259
 260         v4l2_cap_1 {
 261                 compatible = "fsl,imx6q-v4l2-capture";
 262                 ipu_id = <0>;
 263                 csi_id = <1>;
 264                 mclk_source = <0>;
 265                 status = "okay";
 266         };
 267
 268         v4l2_out {
 269                 compatible = "fsl,mxc_v4l2_output";
 270                 status = "okay";
 271         };
 272 };
 273
 274 &audmux {
 275         pinctrl-names = "default";
 276         pinctrl-0 = <&pinctrl_audmux_3>;
 277         status = "okay";
 278 };
 279
 280 &ecspi1 {
 281         fsl,spi-num-chipselects = <1>;
 282         cs-gpios = <&gpio3 19 0>;
 283         pinctrl-names = "default";
 284         pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_cs_1>;
 285
 286         flash: m25p80@0 {
 287                 #address-cells = <1>;
 288                 #size-cells = <1>;
 289                 compatible = "st,m25p32";
 290                 spi-max-frequency = <20000000>;
 291                 reg = <0>;
 292         };
 293 };
 294
 295 &esai {
 296         pinctrl-names = "default";
 297         pinctrl-0 = <&pinctrl_esai_2>;
 298         status = "okay";
 299 };
 300
 301 &fec {
 302         pinctrl-names = "default";
 303         pinctrl-0 = <&pinctrl_enet_2>;
 304         phy-mode = "rgmii";
 305         status = "okay";
 306 };
 307
 308 &gpc {
 309         fsl,cpu_pupscr_sw2iso = <0xf>;
 310         fsl,cpu_pupscr_sw = <0xf>;
 311         fsl,cpu_pdnscr_iso2sw = <0x1>;
 312         fsl,cpu_pdnscr_iso = <0x1>;
 313 };
 314
 315 &hdmi_audio {
 316         status = "okay";
 317 };
 318
 319 &hdmi_cec {
 320         pinctrl-names = "default";
 321         pinctrl-0 = <&pinctrl_hdmi_cec_1>;
 322         status = "okay";
 323 };
 324
 325 &hdmi_core {
 326         ipu_id = <0>;
 327         disp_id = <1>;
 328         status = "okay";
 329 };
 330
 331 &hdmi_video {
 332         fsl,phy_reg_vlev = <0x0294>;
 333         fsl,phy_reg_cksymtx = <0x800d>;
 334         status = "okay";
 335 };
 336
 337 &i2c2 {
 338         clock-frequency = <100000>;
 339         pinctrl-names = "default";
 340         pinctrl-0 = <&pinctrl_i2c2_3>;
 341         status = "okay";
 342
 343         egalax_ts@04 {
 344                 compatible = "eeti,egalax_ts";
 345                 reg = <0x04>;
 346                 interrupt-parent = <&gpio2>;
 347                 interrupts = <28 2>;
 348                 wakeup-gpios = <&gpio2 28 0>;
 349         };
 350
 351         pmic: pfuze100@08 {
 352                 compatible = "fsl,pfuze100";
 353                 reg = <0x08>;
 354
 355                 regulators {
 356                         sw1a_reg: sw1ab {
 357                                 regulator-min-microvolt = <300000>;
 358                                 regulator-max-microvolt = <1875000>;
 359                                 regulator-boot-on;
 360                                 regulator-always-on;
 361                                 regulator-ramp-delay = <6250>;
 362                         };
 363
 364                         sw1c_reg: sw1c {
 365                                 regulator-min-microvolt = <300000>;
 366                                 regulator-max-microvolt = <1875000>;
 367                                 regulator-boot-on;
 368                                 regulator-always-on;
 369                                 regulator-ramp-delay = <6250>;
 370                         };
 371
 372                         sw2_reg: sw2 {
 373                                 regulator-min-microvolt = <800000>;
 374                                 regulator-max-microvolt = <3300000>;
 375                                 regulator-boot-on;
 376                                 regulator-always-on;
 377                         };
 378
 379                         sw3a_reg: sw3a {
 380                                 regulator-min-microvolt = <400000>;
 381                                 regulator-max-microvolt = <1975000>;
 382                                 regulator-boot-on;
 383                                 regulator-always-on;
 384                         };
 385
 386                         sw3b_reg: sw3b {
 387                                 regulator-min-microvolt = <400000>;
 388                                 regulator-max-microvolt = <1975000>;
 389                                 regulator-boot-on;
 390                                 regulator-always-on;
 391                         };
 392
 393                         sw4_reg: sw4 {
 394                                 regulator-min-microvolt = <800000>;
 395                                 regulator-max-microvolt = <3300000>;
 396                         };
 397
 398                         swbst_reg: swbst {
 399                                 regulator-min-microvolt = <5000000>;
 400                                 regulator-max-microvolt = <5150000>;
 401                         };
 402
 403                         snvs_reg: vsnvs {
 404                                 regulator-min-microvolt = <1000000>;
 405                                 regulator-max-microvolt = <3000000>;
 406                                 regulator-boot-on;
 407                                 regulator-always-on;
 408                         };
 409
 410                         vref_reg: vrefddr {
 411                                 regulator-boot-on;
 412                                 regulator-always-on;
 413                         };
 414
 415                         vgen1_reg: vgen1 {
 416                                 regulator-min-microvolt = <800000>;
 417                                 regulator-max-microvolt = <1550000>;
 418                         };
 419
 420                         vgen2_reg: vgen2 {
 421                                 regulator-min-microvolt = <800000>;
 422                                 regulator-max-microvolt = <1550000>;
 423                         };
 424
 425                         vgen3_reg: vgen3 {
 426                                 regulator-min-microvolt = <1800000>;
 427                                 regulator-max-microvolt = <3300000>;
 428                         };
 429
 430                         vgen4_reg: vgen4 {
 431                                 regulator-min-microvolt = <1800000>;
 432                                 regulator-max-microvolt = <3300000>;
 433                                 regulator-always-on;
 434                         };
 435
 436                         vgen5_reg: vgen5 {
 437                                 regulator-min-microvolt = <1800000>;
 438                                 regulator-max-microvolt = <3300000>;
 439                                 regulator-always-on;
 440                         };
 441
 442                         vgen6_reg: vgen6 {
 443                                 regulator-min-microvolt = <1800000>;
 444                                 regulator-max-microvolt = <3300000>;
 445                                 regulator-always-on;
 446                         };
 447                 };
 448         };
 449
 450         codec: cs42888@048 {
 451                 compatible = "cirrus,cs42888";
 452                 reg = <0x048>;
 453                 clocks = <&codec_osc 0>;
 454                 clock-names = "codec_osc";
 455                 VA-supply = <&reg_audio>;
 456                 VD-supply = <&reg_audio>;
 457                 VLS-supply = <&reg_audio>;
 458                 VLC-supply = <&reg_audio>;
 459         };
 460
 461         hdmi: edid@50 {
 462                 compatible = "fsl,imx6-hdmi-i2c";
 463                 reg = <0x50>;
 464         };
 465
 466         si4763: si4763@63 {
 467                 compatible = "si4761";
 468                 reg = <0x63>;
 469                 va-supply = <&si4763_va>;
 470                 vd-supply = <&si4763_vd>;
 471                 vio1-supply = <&si4763_vio1>;
 472                 vio2-supply = <&si4763_vio2>;
 473         };
 474 };
 475
 476 &i2c3 {
 477         pinctrl-names = "default";
 478         pinctrl-0 = <&pinctrl_i2c3_4>;
 479         pinctrl-assert-gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
 480         status = "okay";
 481
 482         max7310_a: gpio@30 {
 483                 compatible = "maxim,max7310";
 484                 reg = <0x30>;
 485                 gpio-controller;
 486                 #gpio-cells = <2>;
 487                 resets = <&max7310_reset>;
 488         };
 489
 490         max7310_b: gpio@32 {
 491                 compatible = "maxim,max7310";
 492                 reg = <0x32>;
 493                 gpio-controller;
 494                 #gpio-cells = <2>;
 495         };
 496
 497         max7310_c: gpio@34 {
 498                 compatible = "maxim,max7310";
 499                 reg = <0x34>;
 500                 gpio-controller;
 501                 #gpio-cells = <2>;
 502         };
 503
 504         mma8451@1c {
 505                 compatible = "fsl,mma8451";
 506                 reg = <0x1c>;
 507                 position = <3>;
 508         };
 509
 510         mag3110@0e {
 511                 compatible = "fsl,mag3110";
 512                 reg = <0x0e>;
 513                 position = <2>;
 514                 interrupt-parent = <&gpio2>;
 515                 interrupts = <29 2>;
 516         };
 517
 518         isl29023@44 {
 519                 compatible = "fsl,isl29023";
 520                 reg = <0x44>;
 521                 rext = <499>;
 522                 interrupt-parent = <&gpio5>;
 523                 interrupts = <17 2>;
 524         };
 525
 526         adv7180: adv7180@21 {
 527                 compatible = "adv,adv7180";
 528                 reg = <0x21>;
 529                 pinctrl-names = "default";
 530                 pinctrl-0 = <&pinctrl_ipu1_3>;
 531                 clocks = <&clks 201>;
 532                 clock-names = "csi_mclk";
 533                 DOVDD-supply = <&reg_3p3v>; /* 3.3v, enabled via 2.8 VGEN6 */
 534                 AVDD-supply = <&reg_3p3v>;  /* 1.8v */
 535                 DVDD-supply = <&reg_3p3v>;  /* 1.8v */
 536                 PVDD-supply = <&reg_3p3v>;  /* 1.8v */
 537                 pwn-gpios = <&max7310_b 2 0>;
 538                 csi_id = <0>;
 539                 mclk = <24000000>;
 540                 mclk_source = <0>;
 541                 cvbs = <1>;
 542         };
 543 };
 544
 545 &iomuxc {
 546         pinctrl-names = "default";
 547         pinctrl-0 = <&pinctrl_hog>;
 548
 549         hog {
 550                 pinctrl_hog: hoggrp {
 551                         fsl,pins = <
 552                                 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1f059
 553                                 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13  0x80000000
 554                                 MX6QDL_PAD_EIM_A24__GPIO5_IO04   0x80000000
 555                                 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15  0x80000000
 556                                 MX6QDL_PAD_EIM_EB0__GPIO2_IO28   0x80000000
 557                                 MX6QDL_PAD_EIM_EB1__GPIO2_IO29  0x80000000
 558                                 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000
 559                                 MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000
 560                                 MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
 561                                 MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x80000000
 562                                 MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000
 563                                 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x80000000
 564                                 MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x17059
 565                                 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x17059
 566                                 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x17059
 567                                 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
 568                         >;
 569                 };
 570         };
 571 };
 572
 573 &flexcan1 {
 574         pinctrl-names = "default";
 575         pinctrl-0 = <&pinctrl_flexcan1_1>;
 576         pinctrl-assert-gpios = <&max7310_b 3 GPIO_ACTIVE_HIGH>; /* TX */
 577         trx-en-gpio = <&max7310_b 6 GPIO_ACTIVE_HIGH>;
 578         trx-stby-gpio = <&max7310_b 5 GPIO_ACTIVE_HIGH>;
 579         status = "disabled"; /* pin conflict with fec */
 580 };
 581
 582 &flexcan2 {
 583         pinctrl-names = "default";
 584         pinctrl-0 = <&pinctrl_flexcan2_1>;
 585         trx-en-gpio = <&max7310_c 6 GPIO_ACTIVE_HIGH>;
 586         trx-stby-gpio = <&max7310_c 5 GPIO_ACTIVE_HIGH>;
 587         status = "okay";
 588 };
 589
 590 &ldb {
 591         ipu_id = <1>;
 592         disp_id = <0>;
 593         ext_ref = <1>;
 594         mode = "sep0";
 595         sec_ipu_id = <1>;
 596         sec_disp_id = <1>;
 597         status = "okay";
 598 };
 599
 600 &mipi_csi {
 601         status = "okay";
 602         ipu_id = <0>;
 603         csi_id = <1>;
 604         v_channel = <0>;
 605         lanes = <1>;
 606 };
 607
 608 &mlb {
 609         pinctrl-names = "default";
 610         pinctrl-0 = <&pinctrl_mlb_2>;
 611         status = "okay";
 612 };
 613
 614 &pcie {
 615         status = "okay";
 616 };
 617
 618 &pwm3 {
 619         pinctrl-names = "default";
 620         pinctrl-0 = <&pinctrl_pwm3_1>;
 621         status = "okay";
 622 };
 623
 624 &spdif {
 625         pinctrl-names = "default";
 626         pinctrl-0 = <&pinctrl_spdif_1>;
 627         status = "okay";
 628 };
 629
 630 &ssi2 {
 631         fsl,mode = "i2s-master";
 632         status = "okay";
 633 };
 634
 635 &uart3 {
 636         pinctrl-names = "default";
 637         pinctrl-0 = <&pinctrl_uart3_1>;
 638         pinctrl-assert-gpios = <&max7310_b 4 GPIO_ACTIVE_HIGH>, /* CTS */
 639                                <&max7310_c 3 GPIO_ACTIVE_HIGH>; /* RXD and TXD */
 640         fsl,uart-has-rtscts;
 641         status = "okay";
 642 };
 643
 644 &gpmi {
 645         pinctrl-names = "default";
 646         pinctrl-0 = <&pinctrl_gpmi_nand_1>;
 647         status = "disabled"; /* pin conflict with uart3 */
 648 };
 649
 650 &uart4 {
 651         pinctrl-names = "default";
 652         pinctrl-0 = <&pinctrl_uart4_1>;
 653         status = "okay";
 654 };
 655
 656 &usbh1 {
 657         vbus-supply = <&reg_usb_h1_vbus>;
 658         status = "okay";
 659 };
 660
 661 &usbotg {
 662         vbus-supply = <&reg_usb_otg_vbus>;
 663         pinctrl-names = "default";
 664         pinctrl-0 = <&pinctrl_usbotg_2>;
 665         imx6-usb-charger-detection;
 666         status = "okay";
 667 };
 668
 669 &usdhc1 {
 670         pinctrl-names = "default";
 671         pinctrl-0 = <&pinctrl_usdhc1_1>;
 672         cd-gpios = <&gpio1 1 0>;
 673         wp-gpios = <&gpio5 20 0>;
 674         no-1-8-v;
 675         keep-power-in-suspend;
 676         enable-sdio-wakeup;
 677         status = "okay";
 678 };
 679
 680 &usdhc3 {
 681         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 682         pinctrl-0 = <&pinctrl_usdhc3_1>;
 683         pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
 684         pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
 685         cd-gpios = <&gpio6 15 0>;
 686         wp-gpios = <&gpio1 13 0>;
 687         /*
 688          * Due to board issue, we can not use external regulator for card slot
 689          * by default since the card power is shared with card detect pullup.
 690          * Disabling the vmmc regulator will cause unexpected card detect
 691          * interrupts.
 692          * HW rework is needed to fix this isssue. Remove R695 first, then you
 693          * can open below line to enable the using of external regulator.
 694          * Then you will be able to power off the card during suspend. This is
 695          * especially needed for a SD3.0 card re-enumeration working on UHS mode
 696          * Note: reg_sd3_vmmc is also need to be enabled
 697          */
 698         /* vmmc-supply = <&reg_sd3_vmmc>; */
 699         keep-power-in-suspend;
 700         enable-sdio-wakeup;
 701         status = "okay";
 702 };
 703
 704 &weim {
 705         pinctrl-names = "default";
 706         pinctrl-0 = <&pinctrl_weim_nor_1 &pinctrl_weim_cs0_1>;
 707         #address-cells = <2>;
 708         #size-cells = <1>;
 709         ranges = <0 0 0x08000000 0x08000000>;
 710         status = "disabled"; /* pin conflict with ecspi1, i2c3 and uart3 */
 711
 712         nor@0,0 {
 713                 compatible = "cfi-flash";
 714                 reg = <0 0 0x02000000>;
 715                 #address-cells = <1>;
 716                 #size-cells = <1>;
 717                 bank-width = <2>;
 718                 fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
 719                                 0x0000c000 0x1404a38e 0x00000000>;
 720         };
 721 };