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KARO: cleanup after merge of Freescale 3.10.17 stuff
[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-sabrelite.dtsi
1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  * Copyright 2011 Linaro Ltd.
4  *
5  * The code contained herein is licensed under the GNU General Public
6  * License. You may obtain a copy of the GNU General Public License
7  * Version 2 or later at the following locations:
8  *
9  * http://www.opensource.org/licenses/gpl-license.html
10  * http://www.gnu.org/copyleft/gpl.html
11  */
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14
15 / {
16         chosen {
17                 stdout-path = &uart2;
18         };
19
20         memory {
21                 reg = <0x10000000 0x40000000>;
22         };
23
24         regulators {
25                 compatible = "simple-bus";
26                 #address-cells = <1>;
27                 #size-cells = <0>;
28
29                 reg_2p5v: regulator@0 {
30                         compatible = "regulator-fixed";
31                         reg = <0>;
32                         regulator-name = "2P5V";
33                         regulator-min-microvolt = <2500000>;
34                         regulator-max-microvolt = <2500000>;
35                         regulator-always-on;
36                 };
37
38                 reg_3p3v: regulator@1 {
39                         compatible = "regulator-fixed";
40                         reg = <1>;
41                         regulator-name = "3P3V";
42                         regulator-min-microvolt = <3300000>;
43                         regulator-max-microvolt = <3300000>;
44                         regulator-always-on;
45                 };
46
47                 reg_usb_otg_vbus: regulator@2 {
48                         compatible = "regulator-fixed";
49                         reg = <2>;
50                         regulator-name = "usb_otg_vbus";
51                         regulator-min-microvolt = <5000000>;
52                         regulator-max-microvolt = <5000000>;
53                         gpio = <&gpio3 22 0>;
54                         enable-active-high;
55                 };
56         };
57
58         gpio-keys {
59                 compatible = "gpio-keys";
60                 pinctrl-names = "default";
61                 pinctrl-0 = <&pinctrl_gpio_keys>;
62
63                 power {
64                         label = "Power Button";
65                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
66                         linux,code = <KEY_POWER>;
67                         gpio-key,wakeup;
68                 };
69
70                 menu {
71                         label = "Menu";
72                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
73                         linux,code = <KEY_MENU>;
74                 };
75
76                 home {
77                         label = "Home";
78                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
79                         linux,code = <KEY_HOME>;
80                 };
81
82                 back {
83                         label = "Back";
84                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
85                         linux,code = <KEY_BACK>;
86                 };
87
88                 volume-up {
89                         label = "Volume Up";
90                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
91                         linux,code = <KEY_VOLUMEUP>;
92                 };
93
94                 volume-down {
95                         label = "Volume Down";
96                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
97                         linux,code = <KEY_VOLUMEDOWN>;
98                 };
99         };
100
101         sound {
102                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
103                              "fsl,imx-audio-sgtl5000";
104                 model = "imx6q-sabrelite-sgtl5000";
105                 ssi-controller = <&ssi1>;
106                 audio-codec = <&codec>;
107                 audio-routing =
108                         "MIC_IN", "Mic Jack",
109                         "Mic Jack", "Mic Bias",
110                         "Headphone Jack", "HP_OUT";
111                 mux-int-port = <1>;
112                 mux-ext-port = <4>;
113         };
114
115         backlight_lcd {
116                 compatible = "pwm-backlight";
117                 pwms = <&pwm1 0 5000000>;
118                 brightness-levels = <0 4 8 16 32 64 128 255>;
119                 default-brightness-level = <7>;
120                 power-supply = <&reg_3p3v>;
121                 status = "okay";
122         };
123
124         backlight_lvds {
125                 compatible = "pwm-backlight";
126                 pwms = <&pwm4 0 5000000>;
127                 brightness-levels = <0 4 8 16 32 64 128 255>;
128                 default-brightness-level = <7>;
129                 power-supply = <&reg_3p3v>;
130                 status = "okay";
131         };
132 };
133
134 &audmux {
135         pinctrl-names = "default";
136         pinctrl-0 = <&pinctrl_audmux>;
137         status = "okay";
138 };
139
140 &ecspi1 {
141         fsl,spi-num-chipselects = <1>;
142         cs-gpios = <&gpio3 19 0>;
143         pinctrl-names = "default";
144         pinctrl-0 = <&pinctrl_ecspi1>;
145         status = "okay";
146
147         flash: m25p80@0 {
148                 compatible = "sst,sst25vf016b";
149                 spi-max-frequency = <20000000>;
150                 reg = <0>;
151         };
152 };
153
154 &fec {
155         pinctrl-names = "default";
156         pinctrl-0 = <&pinctrl_enet>;
157         phy-mode = "rgmii";
158         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
159         txen-skew-ps = <0>;
160         txc-skew-ps = <3000>;
161         rxdv-skew-ps = <0>;
162         rxc-skew-ps = <3000>;
163         rxd0-skew-ps = <0>;
164         rxd1-skew-ps = <0>;
165         rxd2-skew-ps = <0>;
166         rxd3-skew-ps = <0>;
167         txd0-skew-ps = <0>;
168         txd1-skew-ps = <0>;
169         txd2-skew-ps = <0>;
170         txd3-skew-ps = <0>;
171         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
172                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
173         status = "okay";
174 };
175
176 &i2c1 {
177         clock-frequency = <100000>;
178         pinctrl-names = "default";
179         pinctrl-0 = <&pinctrl_i2c1>;
180         status = "okay";
181
182         codec: sgtl5000@0a {
183                 compatible = "fsl,sgtl5000";
184                 reg = <0x0a>;
185                 clocks = <&clks 201>;
186                 VDDA-supply = <&reg_2p5v>;
187                 VDDIO-supply = <&reg_3p3v>;
188         };
189 };
190
191 &iomuxc {
192         pinctrl-names = "default";
193         pinctrl-0 = <&pinctrl_hog>;
194
195         imx6q-sabrelite {
196                 pinctrl_hog: hoggrp {
197                         fsl,pins = <
198                                 /* SGTL5000 sys_mclk */
199                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
200                         >;
201                 };
202
203                 pinctrl_audmux: audmuxgrp {
204                         fsl,pins = <
205                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
206                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
207                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
208                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
209                         >;
210                 };
211
212                 pinctrl_ecspi1: ecspi1grp {
213                         fsl,pins = <
214                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
215                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
216                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
217                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
218                         >;
219                 };
220
221                 pinctrl_enet: enetgrp {
222                         fsl,pins = <
223                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
224                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
225                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
226                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
227                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
228                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
229                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
230                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
231                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
232                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
233                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
234                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
235                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
236                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
237                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
238                                 /* Phy reset */
239                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
240                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
241                         >;
242                 };
243
244                 pinctrl_gpio_keys: gpio_keysgrp {
245                         fsl,pins = <
246                                 /* Power Button */
247                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
248                                 /* Menu Button */
249                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
250                                 /* Home Button */
251                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
252                                 /* Back Button */
253                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
254                                 /* Volume Up Button */
255                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
256                                 /* Volume Down Button */
257                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
258                         >;
259                 };
260
261                 pinctrl_i2c1: i2c1grp {
262                         fsl,pins = <
263                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
264                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
265                         >;
266                 };
267
268                 pinctrl_pwm1: pwm1grp {
269                         fsl,pins = <
270                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
271                         >;
272                 };
273
274                 pinctrl_pwm3: pwm3grp {
275                         fsl,pins = <
276                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
277                         >;
278                 };
279
280                 pinctrl_pwm4: pwm4grp {
281                         fsl,pins = <
282                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
283                         >;
284                 };
285
286                 pinctrl_uart1: uart1grp {
287                         fsl,pins = <
288                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
289                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
290                         >;
291                 };
292
293                 pinctrl_uart2: uart2grp {
294                         fsl,pins = <
295                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
296                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
297                         >;
298                 };
299
300                 pinctrl_usbotg: usbotggrp {
301                         fsl,pins = <
302                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
303                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
304                                 /* power enable, high active */
305                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
306                         >;
307                 };
308
309                 pinctrl_usdhc3: usdhc3grp {
310                         fsl,pins = <
311                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
312                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
313                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
314                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
315                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
316                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
317                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
318                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
319                         >;
320                 };
321
322                 pinctrl_usdhc4: usdhc4grp {
323                         fsl,pins = <
324                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
325                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
326                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
327                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
328                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
329                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
330                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
331                         >;
332                 };
333         };
334 };
335
336 &ldb {
337         status = "okay";
338
339         lvds-channel@0 {
340                 fsl,data-mapping = "spwg";
341                 fsl,data-width = <18>;
342                 status = "okay";
343
344                 display-timings {
345                         native-mode = <&timing0>;
346                         timing0: hsd100pxn1 {
347                                 clock-frequency = <65000000>;
348                                 hactive = <1024>;
349                                 vactive = <768>;
350                                 hback-porch = <220>;
351                                 hfront-porch = <40>;
352                                 vback-porch = <21>;
353                                 vfront-porch = <7>;
354                                 hsync-len = <60>;
355                                 vsync-len = <10>;
356                         };
357                 };
358         };
359 };
360
361 &pcie {
362         status = "okay";
363 };
364
365 &pwm1 {
366         pinctrl-names = "default";
367         pinctrl-0 = <&pinctrl_pwm1>;
368         status = "okay";
369 };
370
371 &pwm3 {
372         pinctrl-names = "default";
373         pinctrl-0 = <&pinctrl_pwm3>;
374         status = "okay";
375 };
376
377 &pwm4 {
378         pinctrl-names = "default";
379         pinctrl-0 = <&pinctrl_pwm4>;
380         status = "okay";
381 };
382
383 &ssi1 {
384         fsl,mode = "i2s-slave";
385         status = "okay";
386 };
387
388 &uart1 {
389         pinctrl-names = "default";
390         pinctrl-0 = <&pinctrl_uart1>;
391         status = "okay";
392 };
393
394 &uart2 {
395         pinctrl-names = "default";
396         pinctrl-0 = <&pinctrl_uart2>;
397         status = "okay";
398 };
399
400 &usbh1 {
401         status = "okay";
402 };
403
404 &usbotg {
405         vbus-supply = <&reg_usb_otg_vbus>;
406         pinctrl-names = "default";
407         pinctrl-0 = <&pinctrl_usbotg>;
408         disable-over-current;
409         status = "okay";
410 };
411
412 &usdhc3 {
413         pinctrl-names = "default";
414         pinctrl-0 = <&pinctrl_usdhc3>;
415         cd-gpios = <&gpio7 0 0>;
416         wp-gpios = <&gpio7 1 0>;
417         vmmc-supply = <&reg_3p3v>;
418         status = "okay";
419 };
420
421 &usdhc4 {
422         pinctrl-names = "default";
423         pinctrl-0 = <&pinctrl_usdhc4>;
424         cd-gpios = <&gpio2 6 0>;
425         vmmc-supply = <&reg_3p3v>;
426         status = "okay";
427 };