arch/arm/boot/dts/imx6qdl-sabresd.dtsi

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         chosen {
  18                 stdout-path = &uart1;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         regulators {
  26                 compatible = "simple-bus";
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 reg_usb_otg_vbus: regulator@0 {
  31                         compatible = "regulator-fixed";
  32                         reg = <0>;
  33                         regulator-name = "usb_otg_vbus";
  34                         regulator-min-microvolt = <5000000>;
  35                         regulator-max-microvolt = <5000000>;
  36                         gpio = <&gpio3 22 0>;
  37                         enable-active-high;
  38                 };
  39
  40                 reg_usb_h1_vbus: regulator@1 {
  41                         compatible = "regulator-fixed";
  42                         reg = <1>;
  43                         regulator-name = "usb_h1_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio1 29 0>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_audio: regulator@2 {
  51                         compatible = "regulator-fixed";
  52                         reg = <2>;
  53                         regulator-name = "wm8962-supply";
  54                         gpio = <&gpio4 10 0>;
  55                         enable-active-high;
  56                 };
  57         };
  58
  59         gpio-keys {
  60                 compatible = "gpio-keys";
  61                 pinctrl-names = "default";
  62                 pinctrl-0 = <&pinctrl_gpio_keys>;
  63
  64                 power {
  65                         label = "Power Button";
  66                         gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  67                         gpio-key,wakeup;
  68                         linux,code = <KEY_POWER>;
  69                 };
  70
  71                 volume-up {
  72                         label = "Volume Up";
  73                         gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  74                         gpio-key,wakeup;
  75                         linux,code = <KEY_VOLUMEUP>;
  76                 };
  77
  78                 volume-down {
  79                         label = "Volume Down";
  80                         gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  81                         gpio-key,wakeup;
  82                         linux,code = <KEY_VOLUMEDOWN>;
  83                 };
  84         };
  85
  86         sound {
  87                 compatible = "fsl,imx6q-sabresd-wm8962",
  88                            "fsl,imx-audio-wm8962";
  89                 model = "wm8962-audio";
  90                 ssi-controller = <&ssi2>;
  91                 audio-codec = <&codec>;
  92                 audio-routing =
  93                         "Headphone Jack", "HPOUTL",
  94                         "Headphone Jack", "HPOUTR",
  95                         "Ext Spk", "SPKOUTL",
  96                         "Ext Spk", "SPKOUTR",
  97                         "MICBIAS", "AMIC",
  98                         "IN3R", "MICBIAS",
  99                         "DMIC", "MICBIAS",
 100                         "DMICDAT", "DMIC";
 101                 mux-int-port = <2>;
 102                 mux-ext-port = <3>;
 103         };
 104
 105         backlight {
 106                 compatible = "pwm-backlight";
 107                 pwms = <&pwm1 0 5000000>;
 108                 brightness-levels = <0 4 8 16 32 64 128 255>;
 109                 default-brightness-level = <7>;
 110                 status = "okay";
 111         };
 112
 113         leds {
 114                 compatible = "gpio-leds";
 115                 pinctrl-names = "default";
 116                 pinctrl-0 = <&pinctrl_gpio_leds>;
 117
 118                 red {
 119                         gpios = <&gpio1 2 0>;
 120                         default-state = "on";
 121                 };
 122         };
 123
 124         sound {
 125                 compatible = "fsl,imx6q-sabresd-wm8962",
 126                            "fsl,imx-audio-wm8962";
 127                 model = "wm8962-audio";
 128                 ssi-controller = <&ssi2>;
 129                 audio-codec = <&codec>;
 130                 audio-routing =
 131                         "Headphone Jack", "HPOUTL",
 132                         "Headphone Jack", "HPOUTR",
 133                         "Ext Spk", "SPKOUTL",
 134                         "Ext Spk", "SPKOUTR",
 135                         "MICBIAS", "AMIC",
 136                         "IN3R", "MICBIAS",
 137                         "DMIC", "MICBIAS",
 138                         "DMICDAT", "DMIC";
 139                 mux-int-port = <2>;
 140                 mux-ext-port = <3>;
 141         };
 142 };
 143
 144 &audmux {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_audmux>;
 147         status = "okay";
 148 };
 149
 150 &ecspi1 {
 151         fsl,spi-num-chipselects = <1>;
 152         cs-gpios = <&gpio4 9 0>;
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_ecspi1>;
 155         status = "okay";
 156
 157         flash: m25p80@0 {
 158                 #address-cells = <1>;
 159                 #size-cells = <1>;
 160                 compatible = "st,m25p32";
 161                 spi-max-frequency = <20000000>;
 162                 reg = <0>;
 163         };
 164 };
 165
 166 &fec {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_enet>;
 169         phy-mode = "rgmii";
 170         phy-reset-gpios = <&gpio1 25 0>;
 171         status = "okay";
 172 };
 173
 174 &hdmi {
 175         ddc-i2c-bus = <&i2c2>;
 176         status = "okay";
 177 };
 178
 179 &i2c1 {
 180         clock-frequency = <100000>;
 181         pinctrl-names = "default";
 182         pinctrl-0 = <&pinctrl_i2c1>;
 183         status = "okay";
 184
 185         codec: wm8962@1a {
 186                 compatible = "wlf,wm8962";
 187                 reg = <0x1a>;
 188                 clocks = <&clks 201>;
 189                 DCVDD-supply = <&reg_audio>;
 190                 DBVDD-supply = <&reg_audio>;
 191                 AVDD-supply = <&reg_audio>;
 192                 CPVDD-supply = <&reg_audio>;
 193                 MICVDD-supply = <&reg_audio>;
 194                 PLLVDD-supply = <&reg_audio>;
 195                 SPKVDD1-supply = <&reg_audio>;
 196                 SPKVDD2-supply = <&reg_audio>;
 197                 gpio-cfg = <
 198                         0x0000 /* 0:Default */
 199                         0x0000 /* 1:Default */
 200                         0x0013 /* 2:FN_DMICCLK */
 201                         0x0000 /* 3:Default */
 202                         0x8014 /* 4:FN_DMICCDAT */
 203                         0x0000 /* 5:Default */
 204                 >;
 205        };
 206 };
 207
 208 &i2c2 {
 209         clock-frequency = <100000>;
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&pinctrl_i2c2>;
 212         status = "okay";
 213
 214         pmic: pfuze100@08 {
 215                 compatible = "fsl,pfuze100";
 216                 reg = <0x08>;
 217
 218                 regulators {
 219                         sw1a_reg: sw1ab {
 220                                 regulator-min-microvolt = <300000>;
 221                                 regulator-max-microvolt = <1875000>;
 222                                 regulator-boot-on;
 223                                 regulator-always-on;
 224                                 regulator-ramp-delay = <6250>;
 225                         };
 226
 227                         sw1c_reg: sw1c {
 228                                 regulator-min-microvolt = <300000>;
 229                                 regulator-max-microvolt = <1875000>;
 230                                 regulator-boot-on;
 231                                 regulator-always-on;
 232                                 regulator-ramp-delay = <6250>;
 233                         };
 234
 235                         sw2_reg: sw2 {
 236                                 regulator-min-microvolt = <800000>;
 237                                 regulator-max-microvolt = <3300000>;
 238                                 regulator-boot-on;
 239                                 regulator-always-on;
 240                         };
 241
 242                         sw3a_reg: sw3a {
 243                                 regulator-min-microvolt = <400000>;
 244                                 regulator-max-microvolt = <1975000>;
 245                                 regulator-boot-on;
 246                                 regulator-always-on;
 247                         };
 248
 249                         sw3b_reg: sw3b {
 250                                 regulator-min-microvolt = <400000>;
 251                                 regulator-max-microvolt = <1975000>;
 252                                 regulator-boot-on;
 253                                 regulator-always-on;
 254                         };
 255
 256                         sw4_reg: sw4 {
 257                                 regulator-min-microvolt = <800000>;
 258                                 regulator-max-microvolt = <3300000>;
 259                         };
 260
 261                         swbst_reg: swbst {
 262                                 regulator-min-microvolt = <5000000>;
 263                                 regulator-max-microvolt = <5150000>;
 264                         };
 265
 266                         snvs_reg: vsnvs {
 267                                 regulator-min-microvolt = <1000000>;
 268                                 regulator-max-microvolt = <3000000>;
 269                                 regulator-boot-on;
 270                                 regulator-always-on;
 271                         };
 272
 273                         vref_reg: vrefddr {
 274                                 regulator-boot-on;
 275                                 regulator-always-on;
 276                         };
 277
 278                         vgen1_reg: vgen1 {
 279                                 regulator-min-microvolt = <800000>;
 280                                 regulator-max-microvolt = <1550000>;
 281                         };
 282
 283                         vgen2_reg: vgen2 {
 284                                 regulator-min-microvolt = <800000>;
 285                                 regulator-max-microvolt = <1550000>;
 286                         };
 287
 288                         vgen3_reg: vgen3 {
 289                                 regulator-min-microvolt = <1800000>;
 290                                 regulator-max-microvolt = <3300000>;
 291                         };
 292
 293                         vgen4_reg: vgen4 {
 294                                 regulator-min-microvolt = <1800000>;
 295                                 regulator-max-microvolt = <3300000>;
 296                                 regulator-always-on;
 297                         };
 298
 299                         vgen5_reg: vgen5 {
 300                                 regulator-min-microvolt = <1800000>;
 301                                 regulator-max-microvolt = <3300000>;
 302                                 regulator-always-on;
 303                         };
 304
 305                         vgen6_reg: vgen6 {
 306                                 regulator-min-microvolt = <1800000>;
 307                                 regulator-max-microvolt = <3300000>;
 308                                 regulator-always-on;
 309                         };
 310                 };
 311         };
 312
 313         pmic: pfuze100@08 {
 314                 compatible = "fsl,pfuze100";
 315                 reg = <0x08>;
 316
 317                 regulators {
 318                         sw1a_reg: sw1ab {
 319                                 regulator-min-microvolt = <300000>;
 320                                 regulator-max-microvolt = <1875000>;
 321                                 regulator-boot-on;
 322                                 regulator-always-on;
 323                                 regulator-ramp-delay = <6250>;
 324                         };
 325
 326                         sw1c_reg: sw1c {
 327                                 regulator-min-microvolt = <300000>;
 328                                 regulator-max-microvolt = <1875000>;
 329                                 regulator-boot-on;
 330                                 regulator-always-on;
 331                         };
 332
 333                         sw2_reg: sw2 {
 334                                 regulator-min-microvolt = <800000>;
 335                                 regulator-max-microvolt = <3300000>;
 336                                 regulator-boot-on;
 337                                 regulator-always-on;
 338                         };
 339
 340                         sw3a_reg: sw3a {
 341                                 regulator-min-microvolt = <400000>;
 342                                 regulator-max-microvolt = <1975000>;
 343                                 regulator-boot-on;
 344                                 regulator-always-on;
 345                         };
 346
 347                         sw3b_reg: sw3b {
 348                                 regulator-min-microvolt = <400000>;
 349                                 regulator-max-microvolt = <1975000>;
 350                                 regulator-boot-on;
 351                                 regulator-always-on;
 352                         };
 353
 354                         sw4_reg: sw4 {
 355                                 regulator-min-microvolt = <800000>;
 356                                 regulator-max-microvolt = <3300000>;
 357                         };
 358
 359                         swbst_reg: swbst {
 360                                 regulator-min-microvolt = <5000000>;
 361                                 regulator-max-microvolt = <5150000>;
 362                         };
 363
 364                         snvs_reg: vsnvs {
 365                                 regulator-min-microvolt = <1000000>;
 366                                 regulator-max-microvolt = <3000000>;
 367                                 regulator-boot-on;
 368                                 regulator-always-on;
 369                         };
 370
 371                         vref_reg: vrefddr {
 372                                 regulator-boot-on;
 373                                 regulator-always-on;
 374                         };
 375
 376                         vgen1_reg: vgen1 {
 377                                 regulator-min-microvolt = <800000>;
 378                                 regulator-max-microvolt = <1550000>;
 379                         };
 380
 381                         vgen2_reg: vgen2 {
 382                                 regulator-min-microvolt = <800000>;
 383                                 regulator-max-microvolt = <1550000>;
 384                         };
 385
 386                         vgen3_reg: vgen3 {
 387                                 regulator-min-microvolt = <1800000>;
 388                                 regulator-max-microvolt = <3300000>;
 389                         };
 390
 391                         vgen4_reg: vgen4 {
 392                                 regulator-min-microvolt = <1800000>;
 393                                 regulator-max-microvolt = <3300000>;
 394                                 regulator-always-on;
 395                         };
 396
 397                         vgen5_reg: vgen5 {
 398                                 regulator-min-microvolt = <1800000>;
 399                                 regulator-max-microvolt = <3300000>;
 400                                 regulator-always-on;
 401                         };
 402
 403                         vgen6_reg: vgen6 {
 404                                 regulator-min-microvolt = <1800000>;
 405                                 regulator-max-microvolt = <3300000>;
 406                                 regulator-always-on;
 407                         };
 408                 };
 409         };
 410 };
 411
 412 &i2c3 {
 413         clock-frequency = <100000>;
 414         pinctrl-names = "default";
 415         pinctrl-0 = <&pinctrl_i2c3>;
 416         status = "okay";
 417
 418         egalax_ts@04 {
 419                 compatible = "eeti,egalax_ts";
 420                 reg = <0x04>;
 421                 interrupt-parent = <&gpio6>;
 422                 interrupts = <7 2>;
 423                 wakeup-gpios = <&gpio6 7 0>;
 424         };
 425 };
 426
 427 &i2c1 {
 428         clock-frequency = <100000>;
 429         pinctrl-names = "default";
 430         pinctrl-0 = <&pinctrl_i2c1_2>;
 431         status = "okay";
 432
 433         codec: wm8962@1a {
 434                 compatible = "wlf,wm8962";
 435                 reg = <0x1a>;
 436                 clocks = <&clks 169>;
 437                 DCVDD-supply = <&reg_audio>;
 438                 DBVDD-supply = <&reg_audio>;
 439                 AVDD-supply = <&reg_audio>;
 440                 CPVDD-supply = <&reg_audio>;
 441                 MICVDD-supply = <&reg_audio>;
 442                 PLLVDD-supply = <&reg_audio>;
 443                 SPKVDD1-supply = <&reg_audio>;
 444                 SPKVDD2-supply = <&reg_audio>;
 445                 gpio-cfg = <
 446                         0x0000 /* 0:Default */
 447                         0x0000 /* 1:Default */
 448                         0x0013 /* 2:FN_DMICCLK */
 449                         0x0000 /* 3:Default */
 450                         0x8014 /* 4:FN_DMICCDAT */
 451                         0x0000 /* 5:Default */
 452                 >;
 453        };
 454 };
 455
 456 &iomuxc {
 457         pinctrl-names = "default";
 458         pinctrl-0 = <&pinctrl_hog>;
 459
 460         imx6qdl-sabresd {
 461                 pinctrl_hog: hoggrp {
 462                         fsl,pins = <
 463                                 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
 464                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
 465                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
 466                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
 467                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
 468                                 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
 469                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
 470                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
 471                                 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
 472                         >;
 473                 };
 474
 475                 pinctrl_audmux: audmuxgrp {
 476                         fsl,pins = <
 477                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 478                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 479                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 480                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 481                         >;
 482                 };
 483
 484                 pinctrl_ecspi1: ecspi1grp {
 485                         fsl,pins = <
 486                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO        0x100b1
 487                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI        0x100b1
 488                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK        0x100b1
 489                         >;
 490                 };
 491
 492                 pinctrl_enet: enetgrp {
 493                         fsl,pins = <
 494                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 495                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 496                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 497                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 498                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 499                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 500                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 501                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 502                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 503                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 504                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 505                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 506                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 507                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 508                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 509                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 510                         >;
 511                 };
 512
 513                 pinctrl_gpio_keys: gpio_keysgrp {
 514                         fsl,pins = <
 515                                 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
 516                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x80000000
 517                                 MX6QDL_PAD_GPIO_5__GPIO1_IO05  0x80000000
 518                         >;
 519                 };
 520
 521                 pinctrl_i2c1: i2c1grp {
 522                         fsl,pins = <
 523                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b8b1
 524                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b8b1
 525                         >;
 526                 };
 527
 528                 pinctrl_i2c2: i2c2grp {
 529                         fsl,pins = <
 530                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 531                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 532                         >;
 533                 };
 534
 535                 pinctrl_i2c3: i2c3grp {
 536                         fsl,pins = <
 537                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 538                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 539                         >;
 540                 };
 541
 542                 pinctrl_pcie: pciegrp {
 543                         fsl,pins = <
 544                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x80000000
 545                         >;
 546                 };
 547
 548                 pinctrl_pwm1: pwm1grp {
 549                         fsl,pins = <
 550                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1
 551                         >;
 552                 };
 553
 554                 pinctrl_uart1: uart1grp {
 555                         fsl,pins = <
 556                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 557                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 558                         >;
 559                 };
 560
 561                 pinctrl_usbotg: usbotggrp {
 562                         fsl,pins = <
 563                                 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x17059
 564                         >;
 565                 };
 566
 567                 pinctrl_usdhc2: usdhc2grp {
 568                         fsl,pins = <
 569                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 570                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 571                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 572                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 573                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 574                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 575                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
 576                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
 577                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
 578                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
 579                         >;
 580                 };
 581
 582                 pinctrl_usdhc3: usdhc3grp {
 583                         fsl,pins = <
 584                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 585                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 586                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 587                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 588                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 589                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 590                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
 591                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
 592                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
 593                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
 594                         >;
 595                 };
 596
 597                 pinctrl_usdhc4: usdhc4grp {
 598                         fsl,pins = <
 599                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 600                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 601                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 602                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 603                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 604                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 605                                 MX6QDL_PAD_SD4_DAT4__SD4_DATA4          0x17059
 606                                 MX6QDL_PAD_SD4_DAT5__SD4_DATA5          0x17059
 607                                 MX6QDL_PAD_SD4_DAT6__SD4_DATA6          0x17059
 608                                 MX6QDL_PAD_SD4_DAT7__SD4_DATA7          0x17059
 609                         >;
 610                 };
 611         };
 612
 613         gpio_leds {
 614                 pinctrl_gpio_leds: gpioledsgrp {
 615                         fsl,pins = <
 616                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
 617                         >;
 618                 };
 619         };
 620 };
 621
 622 &ldb {
 623         status = "okay";
 624
 625         lvds-channel@1 {
 626                 fsl,data-mapping = "spwg";
 627                 fsl,data-width = <18>;
 628                 status = "okay";
 629
 630                 display-timings {
 631                         native-mode = <&timing0>;
 632                         timing0: hsd100pxn1 {
 633                                 clock-frequency = <65000000>;
 634                                 hactive = <1024>;
 635                                 vactive = <768>;
 636                                 hback-porch = <220>;
 637                                 hfront-porch = <40>;
 638                                 vback-porch = <21>;
 639                                 vfront-porch = <7>;
 640                                 hsync-len = <60>;
 641                                 vsync-len = <10>;
 642                         };
 643                 };
 644         };
 645 };
 646
 647 &pcie {
 648         pinctrl-names = "default";
 649         pinctrl-0 = <&pinctrl_pcie>;
 650         reset-gpio = <&gpio7 12 0>;
 651         status = "okay";
 652 };
 653
 654 &pwm1 {
 655         pinctrl-names = "default";
 656         pinctrl-0 = <&pinctrl_pwm1>;
 657         status = "okay";
 658 };
 659
 660 &pwm1 {
 661         pinctrl-names = "default";
 662         pinctrl-0 = <&pinctrl_pwm1_1>;
 663         status = "okay";
 664 };
 665
 666 &ssi2 {
 667         fsl,mode = "i2s-slave";
 668         status = "okay";
 669 };
 670
 671 &uart1 {
 672         pinctrl-names = "default";
 673         pinctrl-0 = <&pinctrl_uart1>;
 674         status = "okay";
 675 };
 676
 677 &usbh1 {
 678         vbus-supply = <&reg_usb_h1_vbus>;
 679         status = "okay";
 680 };
 681
 682 &usbotg {
 683         vbus-supply = <&reg_usb_otg_vbus>;
 684         pinctrl-names = "default";
 685         pinctrl-0 = <&pinctrl_usbotg>;
 686         disable-over-current;
 687         status = "okay";
 688 };
 689
 690 &usdhc2 {
 691         pinctrl-names = "default";
 692         pinctrl-0 = <&pinctrl_usdhc2>;
 693         bus-width = <8>;
 694         cd-gpios = <&gpio2 2 0>;
 695         wp-gpios = <&gpio2 3 0>;
 696         status = "okay";
 697 };
 698
 699 &usdhc3 {
 700         pinctrl-names = "default";
 701         pinctrl-0 = <&pinctrl_usdhc3>;
 702         bus-width = <8>;
 703         cd-gpios = <&gpio2 0 0>;
 704         wp-gpios = <&gpio2 1 0>;
 705         status = "okay";
 706 };
 707
 708 &usdhc4 {
 709         pinctrl-names = "default";
 710         pinctrl-0 = <&pinctrl_usdhc4>;
 711         bus-width = <8>;
 712         non-removable;
 713         no-1-8-v;
 714         status = "okay";
 715 };