2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
22 reg = <0x10000000 0x40000000>;
26 compatible = "simple-bus";
30 reg_usb_otg_vbus: regulator@0 {
31 compatible = "regulator-fixed";
33 regulator-name = "usb_otg_vbus";
34 regulator-min-microvolt = <5000000>;
35 regulator-max-microvolt = <5000000>;
40 reg_usb_h1_vbus: regulator@1 {
41 compatible = "regulator-fixed";
43 regulator-name = "usb_h1_vbus";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
50 reg_audio: regulator@2 {
51 compatible = "regulator-fixed";
53 regulator-name = "wm8962-supply";
60 compatible = "gpio-keys";
61 pinctrl-names = "default";
62 pinctrl-0 = <&pinctrl_gpio_keys>;
65 label = "Power Button";
66 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_POWER>;
73 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_VOLUMEUP>;
79 label = "Volume Down";
80 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
82 linux,code = <KEY_VOLUMEDOWN>;
87 compatible = "fsl,imx6q-sabresd-wm8962",
88 "fsl,imx-audio-wm8962";
89 model = "wm8962-audio";
90 ssi-controller = <&ssi2>;
91 audio-codec = <&codec>;
93 "Headphone Jack", "HPOUTL",
94 "Headphone Jack", "HPOUTR",
106 compatible = "pwm-backlight";
107 pwms = <&pwm1 0 5000000>;
108 brightness-levels = <0 4 8 16 32 64 128 255>;
109 default-brightness-level = <7>;
114 compatible = "gpio-leds";
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_gpio_leds>;
119 gpios = <&gpio1 2 0>;
120 default-state = "on";
125 compatible = "fsl,imx6q-sabresd-wm8962",
126 "fsl,imx-audio-wm8962";
127 model = "wm8962-audio";
128 ssi-controller = <&ssi2>;
129 audio-codec = <&codec>;
131 "Headphone Jack", "HPOUTL",
132 "Headphone Jack", "HPOUTR",
133 "Ext Spk", "SPKOUTL",
134 "Ext Spk", "SPKOUTR",
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_audmux>;
151 fsl,spi-num-chipselects = <1>;
152 cs-gpios = <&gpio4 9 0>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_ecspi1>;
158 #address-cells = <1>;
160 compatible = "st,m25p32";
161 spi-max-frequency = <20000000>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_enet>;
170 phy-reset-gpios = <&gpio1 25 0>;
175 ddc-i2c-bus = <&i2c2>;
180 clock-frequency = <100000>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_i2c1>;
186 compatible = "wlf,wm8962";
188 clocks = <&clks 201>;
189 DCVDD-supply = <®_audio>;
190 DBVDD-supply = <®_audio>;
191 AVDD-supply = <®_audio>;
192 CPVDD-supply = <®_audio>;
193 MICVDD-supply = <®_audio>;
194 PLLVDD-supply = <®_audio>;
195 SPKVDD1-supply = <®_audio>;
196 SPKVDD2-supply = <®_audio>;
198 0x0000 /* 0:Default */
199 0x0000 /* 1:Default */
200 0x0013 /* 2:FN_DMICCLK */
201 0x0000 /* 3:Default */
202 0x8014 /* 4:FN_DMICCDAT */
203 0x0000 /* 5:Default */
209 clock-frequency = <100000>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_i2c2>;
215 compatible = "fsl,pfuze100";
220 regulator-min-microvolt = <300000>;
221 regulator-max-microvolt = <1875000>;
224 regulator-ramp-delay = <6250>;
228 regulator-min-microvolt = <300000>;
229 regulator-max-microvolt = <1875000>;
232 regulator-ramp-delay = <6250>;
236 regulator-min-microvolt = <800000>;
237 regulator-max-microvolt = <3300000>;
243 regulator-min-microvolt = <400000>;
244 regulator-max-microvolt = <1975000>;
250 regulator-min-microvolt = <400000>;
251 regulator-max-microvolt = <1975000>;
257 regulator-min-microvolt = <800000>;
258 regulator-max-microvolt = <3300000>;
262 regulator-min-microvolt = <5000000>;
263 regulator-max-microvolt = <5150000>;
267 regulator-min-microvolt = <1000000>;
268 regulator-max-microvolt = <3000000>;
279 regulator-min-microvolt = <800000>;
280 regulator-max-microvolt = <1550000>;
284 regulator-min-microvolt = <800000>;
285 regulator-max-microvolt = <1550000>;
289 regulator-min-microvolt = <1800000>;
290 regulator-max-microvolt = <3300000>;
294 regulator-min-microvolt = <1800000>;
295 regulator-max-microvolt = <3300000>;
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <3300000>;
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <3300000>;
314 compatible = "fsl,pfuze100";
319 regulator-min-microvolt = <300000>;
320 regulator-max-microvolt = <1875000>;
323 regulator-ramp-delay = <6250>;
327 regulator-min-microvolt = <300000>;
328 regulator-max-microvolt = <1875000>;
334 regulator-min-microvolt = <800000>;
335 regulator-max-microvolt = <3300000>;
341 regulator-min-microvolt = <400000>;
342 regulator-max-microvolt = <1975000>;
348 regulator-min-microvolt = <400000>;
349 regulator-max-microvolt = <1975000>;
355 regulator-min-microvolt = <800000>;
356 regulator-max-microvolt = <3300000>;
360 regulator-min-microvolt = <5000000>;
361 regulator-max-microvolt = <5150000>;
365 regulator-min-microvolt = <1000000>;
366 regulator-max-microvolt = <3000000>;
377 regulator-min-microvolt = <800000>;
378 regulator-max-microvolt = <1550000>;
382 regulator-min-microvolt = <800000>;
383 regulator-max-microvolt = <1550000>;
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <3300000>;
392 regulator-min-microvolt = <1800000>;
393 regulator-max-microvolt = <3300000>;
398 regulator-min-microvolt = <1800000>;
399 regulator-max-microvolt = <3300000>;
404 regulator-min-microvolt = <1800000>;
405 regulator-max-microvolt = <3300000>;
413 clock-frequency = <100000>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_i2c3>;
419 compatible = "eeti,egalax_ts";
421 interrupt-parent = <&gpio6>;
423 wakeup-gpios = <&gpio6 7 0>;
428 clock-frequency = <100000>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_i2c1_2>;
434 compatible = "wlf,wm8962";
436 clocks = <&clks 169>;
437 DCVDD-supply = <®_audio>;
438 DBVDD-supply = <®_audio>;
439 AVDD-supply = <®_audio>;
440 CPVDD-supply = <®_audio>;
441 MICVDD-supply = <®_audio>;
442 PLLVDD-supply = <®_audio>;
443 SPKVDD1-supply = <®_audio>;
444 SPKVDD2-supply = <®_audio>;
446 0x0000 /* 0:Default */
447 0x0000 /* 1:Default */
448 0x0013 /* 2:FN_DMICCLK */
449 0x0000 /* 3:Default */
450 0x8014 /* 4:FN_DMICCDAT */
451 0x0000 /* 5:Default */
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_hog>;
461 pinctrl_hog: hoggrp {
463 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
464 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
465 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
466 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
467 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
468 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
469 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
470 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
471 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
475 pinctrl_audmux: audmuxgrp {
477 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
478 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
479 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
480 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
484 pinctrl_ecspi1: ecspi1grp {
486 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
487 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
488 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
492 pinctrl_enet: enetgrp {
494 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
495 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
496 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
497 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
498 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
499 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
500 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
501 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
502 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
503 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
504 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
505 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
506 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
507 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
508 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
509 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
513 pinctrl_gpio_keys: gpio_keysgrp {
515 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
516 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
517 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
521 pinctrl_i2c1: i2c1grp {
523 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
524 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
528 pinctrl_i2c2: i2c2grp {
530 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
531 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
535 pinctrl_i2c3: i2c3grp {
537 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
538 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
542 pinctrl_pcie: pciegrp {
544 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
548 pinctrl_pwm1: pwm1grp {
550 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
554 pinctrl_uart1: uart1grp {
556 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
557 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
561 pinctrl_usbotg: usbotggrp {
563 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
567 pinctrl_usdhc2: usdhc2grp {
569 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
570 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
571 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
572 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
573 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
574 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
575 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
576 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
577 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
578 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
582 pinctrl_usdhc3: usdhc3grp {
584 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
585 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
586 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
587 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
588 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
589 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
590 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
591 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
592 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
593 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
597 pinctrl_usdhc4: usdhc4grp {
599 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
600 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
601 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
602 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
603 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
604 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
605 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
606 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
607 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
608 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
614 pinctrl_gpio_leds: gpioledsgrp {
616 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
626 fsl,data-mapping = "spwg";
627 fsl,data-width = <18>;
631 native-mode = <&timing0>;
632 timing0: hsd100pxn1 {
633 clock-frequency = <65000000>;
648 pinctrl-names = "default";
649 pinctrl-0 = <&pinctrl_pcie>;
650 reset-gpio = <&gpio7 12 0>;
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_pwm1>;
661 pinctrl-names = "default";
662 pinctrl-0 = <&pinctrl_pwm1_1>;
667 fsl,mode = "i2s-slave";
672 pinctrl-names = "default";
673 pinctrl-0 = <&pinctrl_uart1>;
678 vbus-supply = <®_usb_h1_vbus>;
683 vbus-supply = <®_usb_otg_vbus>;
684 pinctrl-names = "default";
685 pinctrl-0 = <&pinctrl_usbotg>;
686 disable-over-current;
691 pinctrl-names = "default";
692 pinctrl-0 = <&pinctrl_usdhc2>;
694 cd-gpios = <&gpio2 2 0>;
695 wp-gpios = <&gpio2 3 0>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&pinctrl_usdhc3>;
703 cd-gpios = <&gpio2 0 0>;
704 wp-gpios = <&gpio2 1 0>;
709 pinctrl-names = "default";
710 pinctrl-0 = <&pinctrl_usdhc4>;