2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
18 reg = <0x10000000 0x40000000>;
22 compatible = "simple-bus";
26 reg_usb_otg_vbus: regulator@0 {
27 compatible = "regulator-fixed";
29 regulator-name = "usb_otg_vbus";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
36 reg_usb_h1_vbus: regulator@1 {
37 compatible = "regulator-fixed";
39 regulator-name = "usb_h1_vbus";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
46 reg_audio: regulator@2 {
47 compatible = "regulator-fixed";
49 regulator-name = "wm8962-supply";
56 compatible = "gpio-keys";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_gpio_keys>;
61 label = "Power Button";
62 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
64 linux,code = <KEY_POWER>;
69 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
71 linux,code = <KEY_VOLUMEUP>;
75 label = "Volume Down";
76 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
78 linux,code = <KEY_VOLUMEDOWN>;
83 compatible = "fsl,imx6q-sabresd-wm8962",
84 "fsl,imx-audio-wm8962";
85 model = "wm8962-audio";
86 ssi-controller = <&ssi2>;
87 audio-codec = <&codec>;
89 "Headphone Jack", "HPOUTL",
90 "Headphone Jack", "HPOUTR",
102 compatible = "pwm-backlight";
103 pwms = <&pwm1 0 5000000>;
104 brightness-levels = <0 4 8 16 32 64 128 255>;
105 default-brightness-level = <7>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_audmux>;
117 fsl,spi-num-chipselects = <1>;
118 cs-gpios = <&gpio4 9 0>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_ecspi1>;
124 #address-cells = <1>;
126 compatible = "st,m25p32";
127 spi-max-frequency = <20000000>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&pinctrl_enet>;
136 phy-reset-gpios = <&gpio1 25 0>;
141 clock-frequency = <100000>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_i2c1>;
147 compatible = "wlf,wm8962";
149 clocks = <&clks 201>;
150 DCVDD-supply = <®_audio>;
151 DBVDD-supply = <®_audio>;
152 AVDD-supply = <®_audio>;
153 CPVDD-supply = <®_audio>;
154 MICVDD-supply = <®_audio>;
155 PLLVDD-supply = <®_audio>;
156 SPKVDD1-supply = <®_audio>;
157 SPKVDD2-supply = <®_audio>;
159 0x0000 /* 0:Default */
160 0x0000 /* 1:Default */
161 0x0013 /* 2:FN_DMICCLK */
162 0x0000 /* 3:Default */
163 0x8014 /* 4:FN_DMICCDAT */
164 0x0000 /* 5:Default */
170 clock-frequency = <100000>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_i2c2>;
176 compatible = "fsl,pfuze100";
181 regulator-min-microvolt = <300000>;
182 regulator-max-microvolt = <1875000>;
185 regulator-ramp-delay = <6250>;
189 regulator-min-microvolt = <300000>;
190 regulator-max-microvolt = <1875000>;
193 regulator-ramp-delay = <6250>;
197 regulator-min-microvolt = <800000>;
198 regulator-max-microvolt = <3300000>;
204 regulator-min-microvolt = <400000>;
205 regulator-max-microvolt = <1975000>;
211 regulator-min-microvolt = <400000>;
212 regulator-max-microvolt = <1975000>;
218 regulator-min-microvolt = <800000>;
219 regulator-max-microvolt = <3300000>;
223 regulator-min-microvolt = <5000000>;
224 regulator-max-microvolt = <5150000>;
228 regulator-min-microvolt = <1000000>;
229 regulator-max-microvolt = <3000000>;
240 regulator-min-microvolt = <800000>;
241 regulator-max-microvolt = <1550000>;
245 regulator-min-microvolt = <800000>;
246 regulator-max-microvolt = <1550000>;
250 regulator-min-microvolt = <1800000>;
251 regulator-max-microvolt = <3300000>;
255 regulator-min-microvolt = <1800000>;
256 regulator-max-microvolt = <3300000>;
261 regulator-min-microvolt = <1800000>;
262 regulator-max-microvolt = <3300000>;
267 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <3300000>;
276 clock-frequency = <100000>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_i2c3>;
282 compatible = "eeti,egalax_ts";
284 interrupt-parent = <&gpio6>;
286 wakeup-gpios = <&gpio6 7 0>;
291 pinctrl-names = "default";
292 pinctrl-0 = <&pinctrl_hog>;
295 pinctrl_hog: hoggrp {
297 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
298 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
299 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
300 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
301 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
302 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
303 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
304 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
305 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
309 pinctrl_audmux: audmuxgrp {
311 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
312 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
313 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
314 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
318 pinctrl_ecspi1: ecspi1grp {
320 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
321 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
322 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
326 pinctrl_enet: enetgrp {
328 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
329 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
330 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
331 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
332 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
333 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
334 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
335 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
336 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
337 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
338 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
339 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
340 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
341 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
342 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
343 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
347 pinctrl_gpio_keys: gpio_keysgrp {
349 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
350 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
351 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
355 pinctrl_i2c1: i2c1grp {
357 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
358 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
362 pinctrl_i2c2: i2c2grp {
364 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
365 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
369 pinctrl_i2c3: i2c3grp {
371 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
372 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
376 pinctrl_pwm1: pwm1grp {
378 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
382 pinctrl_uart1: uart1grp {
384 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
385 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
389 pinctrl_usbotg: usbotggrp {
391 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
395 pinctrl_usdhc2: usdhc2grp {
397 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
398 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
399 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
400 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
401 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
402 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
403 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
404 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
405 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
406 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
410 pinctrl_usdhc3: usdhc3grp {
412 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
413 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
414 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
415 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
416 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
417 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
418 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
419 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
420 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
421 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
431 fsl,data-mapping = "spwg";
432 fsl,data-width = <18>;
436 native-mode = <&timing0>;
437 timing0: hsd100pxn1 {
438 clock-frequency = <65000000>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_pwm1>;
459 fsl,mode = "i2s-slave";
464 pinctrl-names = "default";
465 pinctrl-0 = <&pinctrl_uart1>;
470 vbus-supply = <®_usb_h1_vbus>;
475 vbus-supply = <®_usb_otg_vbus>;
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_usbotg>;
478 disable-over-current;
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_usdhc2>;
486 cd-gpios = <&gpio2 2 0>;
487 wp-gpios = <&gpio2 3 0>;
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_usdhc3>;
495 cd-gpios = <&gpio2 0 0>;
496 wp-gpios = <&gpio2 1 0>;