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[karo-tx-linux.git] / arch / arm / boot / dts / imx6qdl-wandboard.dtsi
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  */
11
12 #include <dt-bindings/gpio/gpio.h>
13
14 / {
15         regulators {
16                 compatible = "simple-bus";
17                 #address-cells = <1>;
18                 #size-cells = <0>;
19
20                 reg_2p5v: regulator@0 {
21                         compatible = "regulator-fixed";
22                         reg = <0>;
23                         regulator-name = "2P5V";
24                         regulator-min-microvolt = <2500000>;
25                         regulator-max-microvolt = <2500000>;
26                         regulator-always-on;
27                 };
28
29                 reg_3p3v: regulator@1 {
30                         compatible = "regulator-fixed";
31                         reg = <1>;
32                         regulator-name = "3P3V";
33                         regulator-min-microvolt = <3300000>;
34                         regulator-max-microvolt = <3300000>;
35                         regulator-always-on;
36                 };
37         };
38
39         sound {
40                 compatible = "fsl,imx6-wandboard-sgtl5000",
41                              "fsl,imx-audio-sgtl5000";
42                 model = "imx6-wandboard-sgtl5000";
43                 ssi-controller = <&ssi1>;
44                 audio-codec = <&codec>;
45                 audio-routing =
46                         "MIC_IN", "Mic Jack",
47                         "Mic Jack", "Mic Bias",
48                         "Headphone Jack", "HP_OUT";
49                 mux-int-port = <1>;
50                 mux-ext-port = <3>;
51         };
52
53         sound-spdif {
54                 compatible = "fsl,imx-audio-spdif";
55                 model = "imx-spdif";
56                 spdif-controller = <&spdif>;
57                 spdif-out;
58         };
59 };
60
61 &audmux {
62         pinctrl-names = "default";
63         pinctrl-0 = <&pinctrl_audmux>;
64         status = "okay";
65 };
66
67 &hdmi {
68         ddc-i2c-bus = <&i2c1>;
69         status = "okay";
70 };
71
72 &i2c1 {
73         clock-frequency = <100000>;
74         pinctrl-names = "default";
75         pinctrl-0 = <&pinctrl_i2c1>;
76         status = "okay";
77 };
78
79 &i2c2 {
80         clock-frequency = <100000>;
81         pinctrl-names = "default";
82         pinctrl-0 = <&pinctrl_i2c2>;
83         status = "okay";
84
85         codec: sgtl5000@0a {
86                 compatible = "fsl,sgtl5000";
87                 reg = <0x0a>;
88                 clocks = <&clks 201>;
89                 VDDA-supply = <&reg_2p5v>;
90                 VDDIO-supply = <&reg_3p3v>;
91         };
92 };
93
94 &iomuxc {
95         pinctrl-names = "default";
96
97         imx6qdl-wandboard {
98
99                 pinctrl_audmux: audmuxgrp {
100                         fsl,pins = <
101                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
102                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
103                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
104                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
105                         >;
106                 };
107
108                 pinctrl_enet: enetgrp {
109                         fsl,pins = <
110                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
111                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
112                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
113                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
114                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
115                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
116                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
117                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
118                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
119                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
120                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
121                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
122                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
123                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
124                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
125                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
126                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
127                         >;
128                 };
129
130                 pinctrl_i2c1: i2c1grp {
131                         fsl,pins = <
132                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
133                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
134                         >;
135                 };
136
137                 pinctrl_i2c2: i2c2grp {
138                         fsl,pins = <
139                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
140                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
141                         >;
142                 };
143
144                 pinctrl_spdif: spdifgrp {
145                         fsl,pins = <
146                                 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
147                         >;
148                 };
149
150                 pinctrl_uart1: uart1grp {
151                         fsl,pins = <
152                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
153                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
154                         >;
155                 };
156
157                 pinctrl_uart3: uart3grp {
158                         fsl,pins = <
159                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
160                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
161                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
162                                 MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
163                         >;
164                 };
165
166                 pinctrl_usbotg: usbotggrp {
167                         fsl,pins = <
168                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
169                         >;
170                 };
171
172                 pinctrl_usdhc1: usdhc1grp {
173                         fsl,pins = <
174                                 MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
175                                 MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
176                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
177                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
178                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
179                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
180                         >;
181                 };
182
183                 pinctrl_usdhc2: usdhc2grp {
184                         fsl,pins = <
185                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
186                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
187                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
188                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
189                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
190                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
191                         >;
192                 };
193
194                 pinctrl_usdhc3: usdhc3grp {
195                         fsl,pins = <
196                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
197                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
198                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
199                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
200                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
201                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
202                         >;
203                 };
204         };
205 };
206
207 &fec {
208         pinctrl-names = "default";
209         pinctrl-0 = <&pinctrl_enet>;
210         phy-mode = "rgmii";
211         phy-reset-gpios = <&gpio3 29 0>;
212         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
213                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
214         status = "okay";
215 };
216
217 &spdif {
218         pinctrl-names = "default";
219         pinctrl-0 = <&pinctrl_spdif>;
220         status = "okay";
221 };
222
223 &ssi1 {
224         status = "okay";
225 };
226
227 &uart1 {
228         pinctrl-names = "default";
229         pinctrl-0 = <&pinctrl_uart1>;
230         status = "okay";
231 };
232
233 &uart3 {
234         pinctrl-names = "default";
235         pinctrl-0 = <&pinctrl_uart3>;
236         fsl,uart-has-rtscts;
237         status = "okay";
238 };
239
240 &usbh1 {
241         status = "okay";
242 };
243
244 &usbotg {
245         pinctrl-names = "default";
246         pinctrl-0 = <&pinctrl_usbotg>;
247         disable-over-current;
248         dr_mode = "peripheral";
249         status = "okay";
250 };
251
252 &usdhc1 {
253         pinctrl-names = "default";
254         pinctrl-0 = <&pinctrl_usdhc1>;
255         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
256         status = "okay";
257 };
258
259 &usdhc3 {
260         pinctrl-names = "default";
261         pinctrl-0 = <&pinctrl_usdhc3>;
262         cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
263         status = "okay";
264 };