2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include "skeleton.dtsi"
49 intc: interrupt-controller@00a01000 {
50 compatible = "arm,cortex-a9-gic";
51 #interrupt-cells = <3>;
53 reg = <0x00a01000 0x1000>,
62 compatible = "fsl,imx-ckil", "fixed-clock";
64 clock-frequency = <32768>;
68 compatible = "fsl,imx-ckih1", "fixed-clock";
70 clock-frequency = <0>;
74 compatible = "fsl,imx-osc", "fixed-clock";
76 clock-frequency = <24000000>;
83 compatible = "simple-bus";
84 interrupt-parent = <&intc>;
87 dma_apbh: dma-apbh@00110000 {
88 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
89 reg = <0x00110000 0x2000>;
90 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
91 <0 13 IRQ_TYPE_LEVEL_HIGH>,
92 <0 13 IRQ_TYPE_LEVEL_HIGH>,
93 <0 13 IRQ_TYPE_LEVEL_HIGH>;
94 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
100 gpmi: gpmi-nand@00112000 {
101 compatible = "fsl,imx6q-gpmi-nand";
102 #address-cells = <1>;
104 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
105 reg-names = "gpmi-nand", "bch";
106 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-names = "bch";
108 clocks = <&clks 152>, <&clks 153>, <&clks 151>,
109 <&clks 150>, <&clks 149>;
110 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
111 "gpmi_bch_apb", "per1_bch";
112 dmas = <&dma_apbh 0>;
118 compatible = "arm,cortex-a9-twd-timer";
119 reg = <0x00a00600 0x20>;
120 interrupts = <1 13 0xf01>;
124 L2: l2-cache@00a02000 {
125 compatible = "arm,pl310-cache";
126 reg = <0x00a02000 0x1000>;
127 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
130 arm,tag-latency = <4 2 3>;
131 arm,data-latency = <4 2 3>;
134 pcie: pcie@0x01000000 {
135 compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
136 reg = <0x01ffc000 0x4000>; /* DBI */
137 #address-cells = <3>;
140 ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
141 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
142 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
144 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
145 interrupt-names = "msi";
146 #interrupt-cells = <1>;
147 interrupt-map-mask = <0 0 0 0x7>;
148 interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
151 <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&clks 144>, <&clks 206>, <&clks 189>;
153 clock-names = "pcie", "pcie_bus", "pcie_phy";
158 compatible = "arm,cortex-a9-pmu";
159 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
162 aips-bus@02000000 { /* AIPS1 */
163 compatible = "fsl,aips-bus", "simple-bus";
164 #address-cells = <1>;
166 reg = <0x02000000 0x100000>;
170 compatible = "fsl,spba-bus", "simple-bus";
171 #address-cells = <1>;
173 reg = <0x02000000 0x40000>;
176 spdif: spdif@02004000 {
177 compatible = "fsl,imx35-spdif";
178 reg = <0x02004000 0x4000>;
179 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
180 dmas = <&sdma 14 18 0>,
182 dma-names = "rx", "tx";
183 clocks = <&clks 197>, <&clks 3>,
184 <&clks 197>, <&clks 107>,
185 <&clks 0>, <&clks 118>,
186 <&clks 0>, <&clks 139>,
188 clock-names = "core", "rxtx0",
196 ecspi1: ecspi@02008000 {
197 #address-cells = <1>;
199 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
200 reg = <0x02008000 0x4000>;
201 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
202 clocks = <&clks 112>, <&clks 112>;
203 clock-names = "ipg", "per";
204 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
205 dma-names = "rx", "tx";
209 ecspi2: ecspi@0200c000 {
210 #address-cells = <1>;
212 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
213 reg = <0x0200c000 0x4000>;
214 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
215 clocks = <&clks 113>, <&clks 113>;
216 clock-names = "ipg", "per";
217 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
218 dma-names = "rx", "tx";
222 ecspi3: ecspi@02010000 {
223 #address-cells = <1>;
225 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
226 reg = <0x02010000 0x4000>;
227 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
228 clocks = <&clks 114>, <&clks 114>;
229 clock-names = "ipg", "per";
230 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
231 dma-names = "rx", "tx";
235 ecspi4: ecspi@02014000 {
236 #address-cells = <1>;
238 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
239 reg = <0x02014000 0x4000>;
240 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&clks 115>, <&clks 115>;
242 clock-names = "ipg", "per";
243 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
244 dma-names = "rx", "tx";
248 uart1: serial@02020000 {
249 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
250 reg = <0x02020000 0x4000>;
251 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&clks 160>, <&clks 161>;
253 clock-names = "ipg", "per";
254 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
255 dma-names = "rx", "tx";
259 esai: esai@02024000 {
260 reg = <0x02024000 0x4000>;
261 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
265 compatible = "fsl,imx6q-ssi",
268 reg = <0x02028000 0x4000>;
269 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&clks 178>;
271 dmas = <&sdma 37 1 0>,
273 dma-names = "rx", "tx";
274 fsl,fifo-depth = <15>;
275 fsl,ssi-dma-events = <38 37>;
280 compatible = "fsl,imx6q-ssi",
283 reg = <0x0202c000 0x4000>;
284 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&clks 179>;
286 dmas = <&sdma 41 1 0>,
288 dma-names = "rx", "tx";
289 fsl,fifo-depth = <15>;
290 fsl,ssi-dma-events = <42 41>;
295 compatible = "fsl,imx6q-ssi",
298 reg = <0x02030000 0x4000>;
299 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
300 clocks = <&clks 180>;
301 dmas = <&sdma 45 1 0>,
303 dma-names = "rx", "tx";
304 fsl,fifo-depth = <15>;
305 fsl,ssi-dma-events = <46 45>;
309 asrc: asrc@02034000 {
310 compatible = "fsl,imx6q-asrc";
311 reg = <0x02034000 0x4000>;
312 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
313 clocks = <&clks 107>;
314 clock-names = "core";
315 dmas = <&sdma 17 20 0>, <&sdma 18 20 0>, <&sdma 19 20 0>,
316 <&sdma 20 20 0>, <&sdma 21 20 0>, <&sdma 22 20 0>;
317 dma-names = "rxa", "rxb", "rxc",
319 fsl,clk-map-version = <2>;
320 fsl,clk-channel-bits = <4>;
325 reg = <0x0203c000 0x4000>;
330 compatible = "fsl,imx6-vpu";
331 reg = <0x02040000 0x3c000>;
332 reg-names = "vpu_regs";
333 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
334 <0 12 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&clks 168>, <&clks 140>, <&clks 142>;
336 clock-names = "vpu_clk", "mmdc_ch0_axi", "ocram";
337 iramsize = <0x21000>;
343 aipstz@0207c000 { /* AIPSTZ1 */
344 reg = <0x0207c000 0x4000>;
349 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
350 reg = <0x02080000 0x4000>;
351 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
352 clocks = <&clks 62>, <&clks 145>;
353 clock-names = "ipg", "per";
358 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
359 reg = <0x02084000 0x4000>;
360 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&clks 62>, <&clks 146>;
362 clock-names = "ipg", "per";
367 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
368 reg = <0x02088000 0x4000>;
369 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
370 clocks = <&clks 62>, <&clks 147>;
371 clock-names = "ipg", "per";
376 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
377 reg = <0x0208c000 0x4000>;
378 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
379 clocks = <&clks 62>, <&clks 148>;
380 clock-names = "ipg", "per";
383 can1: flexcan@02090000 {
384 compatible = "fsl,imx6q-flexcan";
385 reg = <0x02090000 0x4000>;
386 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
387 clocks = <&clks 108>, <&clks 109>;
388 clock-names = "ipg", "per";
392 can2: flexcan@02094000 {
393 compatible = "fsl,imx6q-flexcan";
394 reg = <0x02094000 0x4000>;
395 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
396 clocks = <&clks 110>, <&clks 111>;
397 clock-names = "ipg", "per";
402 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
403 reg = <0x02098000 0x4000>;
404 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
405 clocks = <&clks 119>, <&clks 120>;
406 clock-names = "ipg", "per";
409 gpio1: gpio@0209c000 {
410 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
411 reg = <0x0209c000 0x4000>;
412 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
413 <0 67 IRQ_TYPE_LEVEL_HIGH>;
416 interrupt-controller;
417 #interrupt-cells = <2>;
420 gpio2: gpio@020a0000 {
421 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
422 reg = <0x020a0000 0x4000>;
423 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
424 <0 69 IRQ_TYPE_LEVEL_HIGH>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
431 gpio3: gpio@020a4000 {
432 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
433 reg = <0x020a4000 0x4000>;
434 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
435 <0 71 IRQ_TYPE_LEVEL_HIGH>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
442 gpio4: gpio@020a8000 {
443 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
444 reg = <0x020a8000 0x4000>;
445 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
446 <0 73 IRQ_TYPE_LEVEL_HIGH>;
449 interrupt-controller;
450 #interrupt-cells = <2>;
453 gpio5: gpio@020ac000 {
454 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
455 reg = <0x020ac000 0x4000>;
456 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
457 <0 75 IRQ_TYPE_LEVEL_HIGH>;
460 interrupt-controller;
461 #interrupt-cells = <2>;
464 gpio6: gpio@020b0000 {
465 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
466 reg = <0x020b0000 0x4000>;
467 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
468 <0 77 IRQ_TYPE_LEVEL_HIGH>;
471 interrupt-controller;
472 #interrupt-cells = <2>;
475 gpio7: gpio@020b4000 {
476 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
477 reg = <0x020b4000 0x4000>;
478 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
479 <0 79 IRQ_TYPE_LEVEL_HIGH>;
482 interrupt-controller;
483 #interrupt-cells = <2>;
487 reg = <0x020b8000 0x4000>;
488 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
491 wdog1: wdog@020bc000 {
492 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
493 reg = <0x020bc000 0x4000>;
494 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
498 wdog2: wdog@020c0000 {
499 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
500 reg = <0x020c0000 0x4000>;
501 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
507 compatible = "fsl,imx6q-ccm";
508 reg = <0x020c4000 0x4000>;
509 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
510 <0 88 IRQ_TYPE_LEVEL_HIGH>;
514 anatop: anatop@020c8000 {
515 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
516 reg = <0x020c8000 0x1000>;
517 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
518 <0 54 IRQ_TYPE_LEVEL_HIGH>,
519 <0 127 IRQ_TYPE_LEVEL_HIGH>;
522 compatible = "fsl,anatop-regulator";
523 regulator-name = "vdd1p1";
524 regulator-min-microvolt = <800000>;
525 regulator-max-microvolt = <1375000>;
527 anatop-reg-offset = <0x110>;
528 anatop-vol-bit-shift = <8>;
529 anatop-vol-bit-width = <5>;
530 anatop-min-bit-val = <4>;
531 anatop-min-voltage = <800000>;
532 anatop-max-voltage = <1375000>;
536 compatible = "fsl,anatop-regulator";
537 regulator-name = "vdd3p0";
538 regulator-min-microvolt = <2800000>;
539 regulator-max-microvolt = <3150000>;
541 anatop-reg-offset = <0x120>;
542 anatop-vol-bit-shift = <8>;
543 anatop-vol-bit-width = <5>;
544 anatop-min-bit-val = <0>;
545 anatop-min-voltage = <2625000>;
546 anatop-max-voltage = <3400000>;
550 compatible = "fsl,anatop-regulator";
551 regulator-name = "vdd2p5";
552 regulator-min-microvolt = <2000000>;
553 regulator-max-microvolt = <2750000>;
555 anatop-reg-offset = <0x130>;
556 anatop-vol-bit-shift = <8>;
557 anatop-vol-bit-width = <5>;
558 anatop-min-bit-val = <0>;
559 anatop-min-voltage = <2000000>;
560 anatop-max-voltage = <2750000>;
563 reg_arm: regulator-vddcore@140 {
564 compatible = "fsl,anatop-regulator";
565 regulator-name = "vddarm";
566 regulator-min-microvolt = <725000>;
567 regulator-max-microvolt = <1450000>;
569 anatop-reg-offset = <0x140>;
570 anatop-vol-bit-shift = <0>;
571 anatop-vol-bit-width = <5>;
572 anatop-delay-reg-offset = <0x170>;
573 anatop-delay-bit-shift = <24>;
574 anatop-delay-bit-width = <2>;
575 anatop-min-bit-val = <1>;
576 anatop-min-voltage = <725000>;
577 anatop-max-voltage = <1450000>;
580 reg_pu: regulator-vddpu@140 {
581 compatible = "fsl,anatop-regulator";
582 regulator-name = "vddpu";
583 regulator-min-microvolt = <725000>;
584 regulator-max-microvolt = <1450000>;
586 anatop-reg-offset = <0x140>;
587 anatop-vol-bit-shift = <9>;
588 anatop-vol-bit-width = <5>;
589 anatop-delay-reg-offset = <0x170>;
590 anatop-delay-bit-shift = <26>;
591 anatop-delay-bit-width = <2>;
592 anatop-min-bit-val = <1>;
593 anatop-min-voltage = <725000>;
594 anatop-max-voltage = <1450000>;
597 reg_soc: regulator-vddsoc@140 {
598 compatible = "fsl,anatop-regulator";
599 regulator-name = "vddsoc";
600 regulator-min-microvolt = <725000>;
601 regulator-max-microvolt = <1450000>;
603 anatop-reg-offset = <0x140>;
604 anatop-vol-bit-shift = <18>;
605 anatop-vol-bit-width = <5>;
606 anatop-delay-reg-offset = <0x170>;
607 anatop-delay-bit-shift = <28>;
608 anatop-delay-bit-width = <2>;
609 anatop-min-bit-val = <1>;
610 anatop-min-voltage = <725000>;
611 anatop-max-voltage = <1450000>;
616 compatible = "fsl,imx6q-tempmon";
617 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
618 fsl,tempmon = <&anatop>;
619 fsl,tempmon-data = <&ocotp>;
620 clocks = <&clks 172>;
623 usbphy1: usbphy@020c9000 {
624 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
625 reg = <0x020c9000 0x1000>;
626 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&clks 182>;
628 fsl,anatop = <&anatop>;
631 usbphy2: usbphy@020ca000 {
632 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
633 reg = <0x020ca000 0x1000>;
634 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
635 clocks = <&clks 183>;
636 fsl,anatop = <&anatop>;
640 compatible = "fsl,sec-v4.0-mon", "simple-bus";
641 #address-cells = <1>;
643 ranges = <0 0x020cc000 0x4000>;
646 compatible = "fsl,sec-v4.0-mon-rtc-lp";
648 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
649 <0 20 IRQ_TYPE_LEVEL_HIGH>;
653 epit1: epit@020d0000 { /* EPIT1 */
654 reg = <0x020d0000 0x4000>;
655 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
658 epit2: epit@020d4000 { /* EPIT2 */
659 reg = <0x020d4000 0x4000>;
660 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
664 compatible = "fsl,imx6q-src", "fsl,imx51-src";
665 reg = <0x020d8000 0x4000>;
666 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
667 <0 96 IRQ_TYPE_LEVEL_HIGH>;
672 compatible = "fsl,imx6q-gpc";
673 reg = <0x020dc000 0x4000>;
674 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
675 <0 90 IRQ_TYPE_LEVEL_HIGH>;
678 gpr: iomuxc-gpr@020e0000 {
679 compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
680 reg = <0x020e0000 0x38>;
683 iomuxc: iomuxc@020e0000 {
684 compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
685 reg = <0x020e0000 0x4000>;
689 #address-cells = <1>;
691 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
696 #address-cells = <1>;
704 lvds0_mux_0: endpoint {
705 remote-endpoint = <&ipu1_di0_lvds0>;
712 lvds0_mux_1: endpoint {
713 remote-endpoint = <&ipu1_di1_lvds0>;
719 #address-cells = <1>;
727 lvds1_mux_0: endpoint {
728 remote-endpoint = <&ipu1_di0_lvds1>;
735 lvds1_mux_1: endpoint {
736 remote-endpoint = <&ipu1_di1_lvds1>;
743 #address-cells = <1>;
745 reg = <0x00120000 0x9000>;
746 interrupts = <0 115 0x04>;
748 clocks = <&clks 123>, <&clks 124>;
749 clock-names = "iahb", "isfr";
755 hdmi_mux_0: endpoint {
756 remote-endpoint = <&ipu1_di0_hdmi>;
763 hdmi_mux_1: endpoint {
764 remote-endpoint = <&ipu1_di1_hdmi>;
769 dcic1: dcic@020e4000 {
770 reg = <0x020e4000 0x4000>;
771 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
774 dcic2: dcic@020e8000 {
775 reg = <0x020e8000 0x4000>;
776 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
779 sdma: sdma@020ec000 {
780 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
781 reg = <0x020ec000 0x4000>;
782 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
783 clocks = <&clks 155>, <&clks 155>;
784 clock-names = "ipg", "ahb";
786 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
790 aips-bus@02100000 { /* AIPS2 */
791 compatible = "fsl,aips-bus", "simple-bus";
792 #address-cells = <1>;
794 reg = <0x02100000 0x100000>;
798 reg = <0x02100000 0x40000>;
799 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
800 <0 106 IRQ_TYPE_LEVEL_HIGH>;
803 aipstz@0217c000 { /* AIPSTZ2 */
804 reg = <0x0217c000 0x4000>;
807 usbotg: usb@02184000 {
808 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
809 reg = <0x02184000 0x200>;
810 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&clks 162>;
812 fsl,usbphy = <&usbphy1>;
813 fsl,usbmisc = <&usbmisc 0>;
817 usbh1: usb@02184200 {
818 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
819 reg = <0x02184200 0x200>;
820 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
821 clocks = <&clks 162>;
822 fsl,usbphy = <&usbphy2>;
823 fsl,usbmisc = <&usbmisc 1>;
827 usbh2: usb@02184400 {
828 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
829 reg = <0x02184400 0x200>;
830 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
831 clocks = <&clks 162>;
832 fsl,usbmisc = <&usbmisc 2>;
836 usbh3: usb@02184600 {
837 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
838 reg = <0x02184600 0x200>;
839 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
840 clocks = <&clks 162>;
841 fsl,usbmisc = <&usbmisc 3>;
845 usbmisc: usbmisc@02184800 {
847 compatible = "fsl,imx6q-usbmisc";
848 reg = <0x02184800 0x200>;
849 clocks = <&clks 162>;
852 fec: ethernet@02188000 {
853 compatible = "fsl,imx6q-fec";
854 reg = <0x02188000 0x4000>;
855 interrupts-extended =
856 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
857 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
858 clocks = <&clks 117>, <&clks 117>, <&clks 190>;
859 clock-names = "ipg", "ahb", "ptp";
864 reg = <0x0218c000 0x4000>;
865 interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
866 <0 117 IRQ_TYPE_LEVEL_HIGH>,
867 <0 126 IRQ_TYPE_LEVEL_HIGH>;
870 usdhc1: usdhc@02190000 {
871 compatible = "fsl,imx6q-usdhc";
872 reg = <0x02190000 0x4000>;
873 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
874 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
875 clock-names = "ipg", "ahb", "per";
880 usdhc2: usdhc@02194000 {
881 compatible = "fsl,imx6q-usdhc";
882 reg = <0x02194000 0x4000>;
883 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
884 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
885 clock-names = "ipg", "ahb", "per";
890 usdhc3: usdhc@02198000 {
891 compatible = "fsl,imx6q-usdhc";
892 reg = <0x02198000 0x4000>;
893 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
895 clock-names = "ipg", "ahb", "per";
900 usdhc4: usdhc@0219c000 {
901 compatible = "fsl,imx6q-usdhc";
902 reg = <0x0219c000 0x4000>;
903 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
904 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
905 clock-names = "ipg", "ahb", "per";
911 #address-cells = <1>;
913 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
914 reg = <0x021a0000 0x4000>;
915 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&clks 125>;
921 #address-cells = <1>;
923 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
924 reg = <0x021a4000 0x4000>;
925 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
926 clocks = <&clks 126>;
931 #address-cells = <1>;
933 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
934 reg = <0x021a8000 0x4000>;
935 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&clks 127>;
941 reg = <0x021ac000 0x4000>;
944 mmdc0: mmdc@021b0000 { /* MMDC0 */
945 compatible = "fsl,imx6q-mmdc";
946 reg = <0x021b0000 0x4000>;
949 mmdc1: mmdc@021b4000 { /* MMDC1 */
950 reg = <0x021b4000 0x4000>;
953 weim: weim@021b8000 {
954 compatible = "fsl,imx6q-weim";
955 reg = <0x021b8000 0x4000>;
956 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
957 clocks = <&clks 196>;
960 ocotp: ocotp@021bc000 {
961 compatible = "fsl,imx6q-ocotp", "syscon";
962 reg = <0x021bc000 0x4000>;
965 tzasc@021d0000 { /* TZASC1 */
966 reg = <0x021d0000 0x4000>;
967 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
970 tzasc@021d4000 { /* TZASC2 */
971 reg = <0x021d4000 0x4000>;
972 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
975 audmux: audmux@021d8000 {
976 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
977 reg = <0x021d8000 0x4000>;
981 mipi_csi: mipi@021dc000 {
982 reg = <0x021dc000 0x4000>;
985 mipi_dsi: mipi@021e0000 {
986 #address-cells = <1>;
988 reg = <0x021e0000 0x4000>;
994 mipi_mux_0: endpoint {
995 remote-endpoint = <&ipu1_di0_mipi>;
1002 mipi_mux_1: endpoint {
1003 remote-endpoint = <&ipu1_di1_mipi>;
1009 reg = <0x021e4000 0x4000>;
1010 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
1013 uart2: serial@021e8000 {
1014 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1015 reg = <0x021e8000 0x4000>;
1016 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
1017 clocks = <&clks 160>, <&clks 161>;
1018 clock-names = "ipg", "per";
1019 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
1020 dma-names = "rx", "tx";
1021 status = "disabled";
1024 uart3: serial@021ec000 {
1025 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1026 reg = <0x021ec000 0x4000>;
1027 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
1028 clocks = <&clks 160>, <&clks 161>;
1029 clock-names = "ipg", "per";
1030 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
1031 dma-names = "rx", "tx";
1032 status = "disabled";
1035 uart4: serial@021f0000 {
1036 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1037 reg = <0x021f0000 0x4000>;
1038 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
1039 clocks = <&clks 160>, <&clks 161>;
1040 clock-names = "ipg", "per";
1041 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
1042 dma-names = "rx", "tx";
1043 status = "disabled";
1046 uart5: serial@021f4000 {
1047 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1048 reg = <0x021f4000 0x4000>;
1049 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
1050 clocks = <&clks 160>, <&clks 161>;
1051 clock-names = "ipg", "per";
1052 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
1053 dma-names = "rx", "tx";
1054 status = "disabled";
1058 ipu1: ipu@02400000 {
1059 #address-cells = <1>;
1061 compatible = "fsl,imx6q-ipu";
1062 reg = <0x02400000 0x400000>;
1063 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
1064 <0 5 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
1066 clock-names = "bus", "di0", "di1";
1070 #address-cells = <1>;
1074 ipu1_di0_disp0: endpoint@0 {
1077 ipu1_di0_hdmi: endpoint@1 {
1078 remote-endpoint = <&hdmi_mux_0>;
1081 ipu1_di0_mipi: endpoint@2 {
1082 remote-endpoint = <&mipi_mux_0>;
1085 ipu1_di0_lvds0: endpoint@3 {
1086 remote-endpoint = <&lvds0_mux_0>;
1089 ipu1_di0_lvds1: endpoint@4 {
1090 remote-endpoint = <&lvds1_mux_0>;
1095 #address-cells = <1>;
1099 ipu1_di0_disp1: endpoint@0 {
1102 ipu1_di1_hdmi: endpoint@1 {
1103 remote-endpoint = <&hdmi_mux_1>;
1106 ipu1_di1_mipi: endpoint@2 {
1107 remote-endpoint = <&mipi_mux_1>;
1110 ipu1_di1_lvds0: endpoint@3 {
1111 remote-endpoint = <&lvds0_mux_1>;
1114 ipu1_di1_lvds1: endpoint@4 {
1115 remote-endpoint = <&lvds1_mux_1>;