arch/arm/boot/dts/imx6sl-evk.dts

   1 /*
   2  * Copyright (C) 2013 Freescale Semiconductor, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13 #include "imx6sl.dtsi"
  14
  15 / {
  16         model = "Freescale i.MX6 SoloLite EVK Board";
  17         compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
  18
  19         memory {
  20                 reg = <0x80000000 0x40000000>;
  21         };
  22
  23         leds {
  24                 compatible = "gpio-leds";
  25                 pinctrl-names = "default";
  26                 pinctrl-0 = <&pinctrl_led>;
  27
  28                 user {
  29                         label = "debug";
  30                         gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
  31                         linux,default-trigger = "heartbeat";
  32                 };
  33         };
  34
  35         regulators {
  36                 compatible = "simple-bus";
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 reg_usb_otg1_vbus: regulator@0 {
  41                         compatible = "regulator-fixed";
  42                         reg = <0>;
  43                         regulator-name = "usb_otg1_vbus";
  44                         regulator-min-microvolt = <5000000>;
  45                         regulator-max-microvolt = <5000000>;
  46                         gpio = <&gpio4 0 0>;
  47                         enable-active-high;
  48                 };
  49
  50                 reg_usb_otg2_vbus: regulator@1 {
  51                         compatible = "regulator-fixed";
  52                         reg = <1>;
  53                         regulator-name = "usb_otg2_vbus";
  54                         regulator-min-microvolt = <5000000>;
  55                         regulator-max-microvolt = <5000000>;
  56                         gpio = <&gpio4 2 0>;
  57                         enable-active-high;
  58                 };
  59
  60                 reg_aud3v: regulator@2 {
  61                         compatible = "regulator-fixed";
  62                         reg = <2>;
  63                         regulator-name = "wm8962-supply-3v15";
  64                         regulator-min-microvolt = <3150000>;
  65                         regulator-max-microvolt = <3150000>;
  66                         regulator-boot-on;
  67                 };
  68
  69                 reg_aud4v: regulator@3 {
  70                         compatible = "regulator-fixed";
  71                         reg = <3>;
  72                         regulator-name = "wm8962-supply-4v2";
  73                         regulator-min-microvolt = <4325000>;
  74                         regulator-max-microvolt = <4325000>;
  75                         regulator-boot-on;
  76                 };
  77         };
  78
  79         sound {
  80                 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
  81                 model = "wm8962-audio";
  82                 ssi-controller = <&ssi2>;
  83                 audio-codec = <&codec>;
  84                 audio-routing =
  85                         "Headphone Jack", "HPOUTL",
  86                         "Headphone Jack", "HPOUTR",
  87                         "Ext Spk", "SPKOUTL",
  88                         "Ext Spk", "SPKOUTR",
  89                         "AMIC", "MICBIAS",
  90                         "IN3R", "AMIC";
  91                 mux-int-port = <2>;
  92                 mux-ext-port = <3>;
  93         };
  94
  95         pxp_v4l2_out {
  96                 compatible = "fsl,imx6sl-pxp-v4l2";
  97                 status = "okay";
  98         };
  99 };
 100
 101 &audmux {
 102         pinctrl-names = "default";
 103         pinctrl-0 = <&pinctrl_audmux3>;
 104         status = "okay";
 105 };
 106
 107 &ecspi1 {
 108         fsl,spi-num-chipselects = <1>;
 109         cs-gpios = <&gpio4 11 0>;
 110         pinctrl-names = "default";
 111         pinctrl-0 = <&pinctrl_ecspi1>;
 112         status = "okay";
 113
 114         flash: m25p80@0 {
 115                 #address-cells = <1>;
 116                 #size-cells = <1>;
 117                 compatible = "st,m25p32";
 118                 spi-max-frequency = <20000000>;
 119                 reg = <0>;
 120         };
 121 };
 122
 123 &fec {
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&pinctrl_fec>;
 126         phy-mode = "rmii";
 127         status = "okay";
 128 };
 129
 130 &i2c1 {
 131         clock-frequency = <100000>;
 132         pinctrl-names = "default";
 133         pinctrl-0 = <&pinctrl_i2c1>;
 134         status = "okay";
 135
 136         pmic: pfuze100@08 {
 137                 compatible = "fsl,pfuze100";
 138                 reg = <0x08>;
 139
 140                 regulators {
 141                         sw1a_reg: sw1ab {
 142                                 regulator-min-microvolt = <300000>;
 143                                 regulator-max-microvolt = <1875000>;
 144                                 regulator-boot-on;
 145                                 regulator-always-on;
 146                                 regulator-ramp-delay = <6250>;
 147                         };
 148
 149                         sw1c_reg: sw1c {
 150                                 regulator-min-microvolt = <300000>;
 151                                 regulator-max-microvolt = <1875000>;
 152                                 regulator-boot-on;
 153                                 regulator-always-on;
 154                                 regulator-ramp-delay = <6250>;
 155                         };
 156
 157                         sw2_reg: sw2 {
 158                                 regulator-min-microvolt = <800000>;
 159                                 regulator-max-microvolt = <3300000>;
 160                                 regulator-boot-on;
 161                                 regulator-always-on;
 162                         };
 163
 164                         sw3a_reg: sw3a {
 165                                 regulator-min-microvolt = <400000>;
 166                                 regulator-max-microvolt = <1975000>;
 167                                 regulator-boot-on;
 168                                 regulator-always-on;
 169                         };
 170
 171                         sw3b_reg: sw3b {
 172                                 regulator-min-microvolt = <400000>;
 173                                 regulator-max-microvolt = <1975000>;
 174                                 regulator-boot-on;
 175                                 regulator-always-on;
 176                         };
 177
 178                         sw4_reg: sw4 {
 179                                 regulator-min-microvolt = <800000>;
 180                                 regulator-max-microvolt = <3300000>;
 181                         };
 182
 183                         swbst_reg: swbst {
 184                                 regulator-min-microvolt = <5000000>;
 185                                 regulator-max-microvolt = <5150000>;
 186                         };
 187
 188                         snvs_reg: vsnvs {
 189                                 regulator-min-microvolt = <1000000>;
 190                                 regulator-max-microvolt = <3000000>;
 191                                 regulator-boot-on;
 192                                 regulator-always-on;
 193                         };
 194
 195                         vref_reg: vrefddr {
 196                                 regulator-boot-on;
 197                                 regulator-always-on;
 198                         };
 199
 200                         vgen1_reg: vgen1 {
 201                                 regulator-min-microvolt = <800000>;
 202                                 regulator-max-microvolt = <1550000>;
 203                                 regulator-always-on;
 204                         };
 205
 206                         vgen2_reg: vgen2 {
 207                                 regulator-min-microvolt = <800000>;
 208                                 regulator-max-microvolt = <1550000>;
 209                         };
 210
 211                         vgen3_reg: vgen3 {
 212                                 regulator-min-microvolt = <1800000>;
 213                                 regulator-max-microvolt = <3300000>;
 214                         };
 215
 216                         vgen4_reg: vgen4 {
 217                                 regulator-min-microvolt = <1800000>;
 218                                 regulator-max-microvolt = <3300000>;
 219                                 regulator-always-on;
 220                         };
 221
 222                         vgen5_reg: vgen5 {
 223                                 regulator-min-microvolt = <1800000>;
 224                                 regulator-max-microvolt = <3300000>;
 225                                 regulator-always-on;
 226                         };
 227
 228                         vgen6_reg: vgen6 {
 229                                 regulator-min-microvolt = <1800000>;
 230                                 regulator-max-microvolt = <3300000>;
 231                                 regulator-always-on;
 232                         };
 233                 };
 234         };
 235 };
 236
 237 &i2c2 {
 238         clock-frequency = <100000>;
 239         pinctrl-names = "default";
 240         pinctrl-0 = <&pinctrl_i2c2>;
 241         status = "okay";
 242
 243         codec: wm8962@1a {
 244                 compatible = "wlf,wm8962";
 245                 reg = <0x1a>;
 246                 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
 247                 DCVDD-supply = <&vgen3_reg>;
 248                 DBVDD-supply = <&reg_aud3v>;
 249                 AVDD-supply = <&vgen3_reg>;
 250                 CPVDD-supply = <&vgen3_reg>;
 251                 MICVDD-supply = <&reg_aud3v>;
 252                 PLLVDD-supply = <&vgen3_reg>;
 253                 SPKVDD1-supply = <&reg_aud4v>;
 254                 SPKVDD2-supply = <&reg_aud4v>;
 255         };
 256 };
 257
 258 &iomuxc {
 259         pinctrl-names = "default";
 260         pinctrl-0 = <&pinctrl_hog>;
 261
 262         imx6sl-evk {
 263                 pinctrl_hog: hoggrp {
 264                         fsl,pins = <
 265                                 MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
 266                                 MX6SL_PAD_KEY_COL7__GPIO4_IO06    0x17059
 267                                 MX6SL_PAD_SD2_DAT7__GPIO5_IO00    0x17059
 268                                 MX6SL_PAD_SD2_DAT6__GPIO4_IO29    0x17059
 269                                 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
 270                                 MX6SL_PAD_KEY_COL4__GPIO4_IO00  0x80000000
 271                                 MX6SL_PAD_KEY_COL5__GPIO4_IO02  0x80000000
 272                                 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
 273                         >;
 274                 };
 275
 276                 pinctrl_audmux3: audmux3grp {
 277                         fsl,pins = <
 278                                 MX6SL_PAD_AUD_RXD__AUD3_RXD       0x4130b0
 279                                 MX6SL_PAD_AUD_TXC__AUD3_TXC       0x4130b0
 280                                 MX6SL_PAD_AUD_TXD__AUD3_TXD       0x4110b0
 281                                 MX6SL_PAD_AUD_TXFS__AUD3_TXFS     0x4130b0
 282                         >;
 283                 };
 284
 285                 pinctrl_ecspi1: ecspi1grp {
 286                         fsl,pins = <
 287                                 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO      0x100b1
 288                                 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI      0x100b1
 289                                 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK      0x100b1
 290                                 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11        0x80000000
 291                         >;
 292                 };
 293
 294                 pinctrl_fec: fecgrp {
 295                         fsl,pins = <
 296                                 MX6SL_PAD_FEC_MDC__FEC_MDC              0x1b0b0
 297                                 MX6SL_PAD_FEC_MDIO__FEC_MDIO            0x1b0b0
 298                                 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV         0x1b0b0
 299                                 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0        0x1b0b0
 300                                 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1        0x1b0b0
 301                                 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN          0x1b0b0
 302                                 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0        0x1b0b0
 303                                 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1        0x1b0b0
 304                                 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT      0x4001b0a8
 305                         >;
 306                 };
 307
 308                 pinctrl_i2c1: i2c1grp {
 309                         fsl,pins = <
 310                                 MX6SL_PAD_I2C1_SCL__I2C1_SCL    0x4001b8b1
 311                                 MX6SL_PAD_I2C1_SDA__I2C1_SDA    0x4001b8b1
 312                         >;
 313                 };
 314
 315
 316                 pinctrl_i2c2: i2c2grp {
 317                         fsl,pins = <
 318                                 MX6SL_PAD_I2C2_SCL__I2C2_SCL    0x4001b8b1
 319                                 MX6SL_PAD_I2C2_SDA__I2C2_SDA    0x4001b8b1
 320                         >;
 321                 };
 322
 323                 pinctrl_led: ledgrp {
 324                         fsl,pins = <
 325                                 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
 326                         >;
 327                 };
 328
 329                 pinctrl_kpp: kppgrp {
 330                         fsl,pins = <
 331                                 MX6SL_PAD_KEY_ROW0__KEY_ROW0    0x1b010
 332                                 MX6SL_PAD_KEY_ROW1__KEY_ROW1    0x1b010
 333                                 MX6SL_PAD_KEY_ROW2__KEY_ROW2    0x1b0b0
 334                                 MX6SL_PAD_KEY_COL0__KEY_COL0    0x110b0
 335                                 MX6SL_PAD_KEY_COL1__KEY_COL1    0x110b0
 336                                 MX6SL_PAD_KEY_COL2__KEY_COL2    0x110b0
 337                         >;
 338                 };
 339
 340                 pinctrl_uart1: uart1grp {
 341                         fsl,pins = <
 342                                 MX6SL_PAD_UART1_RXD__UART1_RX_DATA      0x1b0b1
 343                                 MX6SL_PAD_UART1_TXD__UART1_TX_DATA      0x1b0b1
 344                         >;
 345                 };
 346
 347                 pinctrl_usbotg1: usbotg1grp {
 348                         fsl,pins = <
 349                                 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID      0x17059
 350                         >;
 351                 };
 352
 353                 pinctrl_usdhc1: usdhc1grp {
 354                         fsl,pins = <
 355                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x17059
 356                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x10059
 357                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x17059
 358                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x17059
 359                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x17059
 360                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x17059
 361                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x17059
 362                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x17059
 363                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x17059
 364                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x17059
 365                         >;
 366                 };
 367
 368                 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
 369                         fsl,pins = <
 370                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170b9
 371                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100b9
 372                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170b9
 373                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170b9
 374                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170b9
 375                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170b9
 376                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170b9
 377                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170b9
 378                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170b9
 379                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170b9
 380                         >;
 381                 };
 382
 383                 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
 384                         fsl,pins = <
 385                                 MX6SL_PAD_SD1_CMD__SD1_CMD              0x170f9
 386                                 MX6SL_PAD_SD1_CLK__SD1_CLK              0x100f9
 387                                 MX6SL_PAD_SD1_DAT0__SD1_DATA0           0x170f9
 388                                 MX6SL_PAD_SD1_DAT1__SD1_DATA1           0x170f9
 389                                 MX6SL_PAD_SD1_DAT2__SD1_DATA2           0x170f9
 390                                 MX6SL_PAD_SD1_DAT3__SD1_DATA3           0x170f9
 391                                 MX6SL_PAD_SD1_DAT4__SD1_DATA4           0x170f9
 392                                 MX6SL_PAD_SD1_DAT5__SD1_DATA5           0x170f9
 393                                 MX6SL_PAD_SD1_DAT6__SD1_DATA6           0x170f9
 394                                 MX6SL_PAD_SD1_DAT7__SD1_DATA7           0x170f9
 395                         >;
 396                 };
 397
 398                 pinctrl_usdhc2: usdhc2grp {
 399                         fsl,pins = <
 400                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x17059
 401                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x10059
 402                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x17059
 403                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x17059
 404                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x17059
 405                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x17059
 406                         >;
 407                 };
 408
 409                 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
 410                         fsl,pins = <
 411                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170b9
 412                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100b9
 413                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170b9
 414                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170b9
 415                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170b9
 416                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170b9
 417                         >;
 418                 };
 419
 420                 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
 421                         fsl,pins = <
 422                                 MX6SL_PAD_SD2_CMD__SD2_CMD              0x170f9
 423                                 MX6SL_PAD_SD2_CLK__SD2_CLK              0x100f9
 424                                 MX6SL_PAD_SD2_DAT0__SD2_DATA0           0x170f9
 425                                 MX6SL_PAD_SD2_DAT1__SD2_DATA1           0x170f9
 426                                 MX6SL_PAD_SD2_DAT2__SD2_DATA2           0x170f9
 427                                 MX6SL_PAD_SD2_DAT3__SD2_DATA3           0x170f9
 428                         >;
 429                 };
 430
 431                 pinctrl_usdhc3: usdhc3grp {
 432                         fsl,pins = <
 433                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x17059
 434                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x10059
 435                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x17059
 436                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x17059
 437                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x17059
 438                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x17059
 439                         >;
 440                 };
 441
 442                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 443                         fsl,pins = <
 444                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170b9
 445                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100b9
 446                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170b9
 447                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170b9
 448                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170b9
 449                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170b9
 450                         >;
 451                 };
 452
 453                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 454                         fsl,pins = <
 455                                 MX6SL_PAD_SD3_CMD__SD3_CMD              0x170f9
 456                                 MX6SL_PAD_SD3_CLK__SD3_CLK              0x100f9
 457                                 MX6SL_PAD_SD3_DAT0__SD3_DATA0           0x170f9
 458                                 MX6SL_PAD_SD3_DAT1__SD3_DATA1           0x170f9
 459                                 MX6SL_PAD_SD3_DAT2__SD3_DATA2           0x170f9
 460                                 MX6SL_PAD_SD3_DAT3__SD3_DATA3           0x170f9
 461                         >;
 462                 };
 463         };
 464 };
 465
 466 &kpp {
 467         pinctrl-names = "default";
 468         pinctrl-0 = <&pinctrl_kpp>;
 469         linux,keymap = <
 470                         MATRIX_KEY(0x0, 0x0, KEY_UP)         /* ROW0, COL0 */
 471                         MATRIX_KEY(0x0, 0x1, KEY_DOWN)       /* ROW0, COL1 */
 472                         MATRIX_KEY(0x0, 0x2, KEY_ENTER)      /* ROW0, COL2 */
 473                         MATRIX_KEY(0x1, 0x0, KEY_HOME)       /* ROW1, COL0 */
 474                         MATRIX_KEY(0x1, 0x1, KEY_RIGHT)      /* ROW1, COL1 */
 475                         MATRIX_KEY(0x1, 0x2, KEY_LEFT)       /* ROW1, COL2 */
 476                         MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
 477                         MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP)   /* ROW2, COL1 */
 478         >;
 479         status = "okay";
 480 };
 481
 482 &lcdif {
 483         pinctrl-names = "default";
 484         pinctrl-0 = <&pinctrl_lcdif_dat_0
 485                      &pinctrl_lcdif_ctrl_0>;
 486         lcd-supply = <&reg_lcd_3v3>;
 487         display = <&display>;
 488         status = "okay";
 489
 490         display: display {
 491                 bits-per-pixel = <16>;
 492                 bus-width = <24>;
 493
 494                 display-timings {
 495                         native-mode = <&timing0>;
 496                         timing0: timing0 {
 497                                 clock-frequency = <33500000>;
 498                                 hactive = <800>;
 499                                 vactive = <480>;
 500                                 hback-porch = <89>;
 501                                 hfront-porch = <164>;
 502                                 vback-porch = <23>;
 503                                 vfront-porch = <10>;
 504                                 hsync-len = <10>;
 505                                 vsync-len = <10>;
 506                                 hsync-active = <0>;
 507                                 vsync-active = <0>;
 508                                 de-active = <1>;
 509                                 pixelclk-active = <0>;
 510                         };
 511                 };
 512         };
 513 };
 514
 515 &pwm1 {
 516         pinctrl-names = "default";
 517         pinctrl-0 = <&pinctrl_pwm1_0>;
 518         status = "okay";
 519 };
 520
 521 &ssi2 {
 522         fsl,mode = "i2s-slave";
 523         status = "okay";
 524 };
 525
 526 &uart1 {
 527         pinctrl-names = "default";
 528         pinctrl-0 = <&pinctrl_uart1>;
 529         status = "okay";
 530 };
 531
 532 &usbotg1 {
 533         vbus-supply = <&reg_usb_otg1_vbus>;
 534         pinctrl-names = "default";
 535         pinctrl-0 = <&pinctrl_usbotg1>;
 536         disable-over-current;
 537         status = "okay";
 538 };
 539
 540 &usbotg2 {
 541         vbus-supply = <&reg_usb_otg2_vbus>;
 542         dr_mode = "host";
 543         disable-over-current;
 544         status = "okay";
 545 };
 546
 547 &usdhc1 {
 548         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 549         pinctrl-0 = <&pinctrl_usdhc1>;
 550         pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
 551         pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
 552         bus-width = <8>;
 553         cd-gpios = <&gpio4 7 0>;
 554         wp-gpios = <&gpio4 6 0>;
 555         status = "okay";
 556 };
 557
 558 &usdhc2 {
 559         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 560         pinctrl-0 = <&pinctrl_usdhc2>;
 561         pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
 562         pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
 563         cd-gpios = <&gpio5 0 0>;
 564         wp-gpios = <&gpio4 29 0>;
 565         status = "okay";
 566 };
 567
 568 &usdhc3 {
 569         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 570         pinctrl-0 = <&pinctrl_usdhc3>;
 571         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 572         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 573         cd-gpios = <&gpio3 22 0>;
 574         status = "okay";
 575 };
 576
 577 &pxp {
 578         status = "okay";
 579 };