2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ul-pinfunc.h"
14 #include "skeleton.dtsi"
52 compatible = "arm,cortex-a7";
55 clock-latency = <61036>; /* two CLK32 periods */
62 fsl,soc-operating-points = <
68 clocks = <&clks IMX6UL_CLK_ARM>,
69 <&clks IMX6UL_CLK_PLL2_BUS>,
70 <&clks IMX6UL_CLK_PLL2_PFD2>,
71 <&clks IMX6UL_CA7_SECONDARY_SEL>,
72 <&clks IMX6UL_CLK_STEP>,
73 <&clks IMX6UL_CLK_PLL1_SW>,
74 <&clks IMX6UL_CLK_PLL1_SYS>,
75 <&clks IMX6UL_PLL1_BYPASS>,
76 <&clks IMX6UL_CLK_PLL1>,
77 <&clks IMX6UL_PLL1_BYPASS_SRC>,
78 <&clks IMX6UL_CLK_OSC>;
79 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
80 "secondary_sel", "step", "pll1_sw",
81 "pll1_sys", "pll1_bypass", "pll1",
82 "pll1_bypass_src", "osc";
83 arm-supply = <®_arm>;
84 soc-supply = <®_soc>;
88 intc: interrupt-controller@00a01000 {
89 compatible = "arm,cortex-a7-gic";
90 #interrupt-cells = <3>;
92 reg = <0x00a01000 0x1000>,
99 compatible = "fixed-clock";
101 clock-frequency = <32768>;
102 clock-output-names = "ckil";
106 compatible = "fixed-clock";
108 clock-frequency = <24000000>;
109 clock-output-names = "osc";
113 compatible = "fixed-clock";
115 clock-frequency = <0>;
116 clock-output-names = "ipp_di0";
120 compatible = "fixed-clock";
122 clock-frequency = <0>;
123 clock-output-names = "ipp_di1";
127 #address-cells = <1>;
129 compatible = "simple-bus";
130 interrupt-parent = <&gpc>;
134 compatible = "arm,cortex-a7-pmu";
135 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
139 ocram: sram@00900000 {
140 compatible = "mmio-sram";
141 reg = <0x00900000 0x20000>;
144 dma_apbh: dma-apbh@01804000 {
145 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
146 reg = <0x01804000 0x2000>;
147 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
148 <0 13 IRQ_TYPE_LEVEL_HIGH>,
149 <0 13 IRQ_TYPE_LEVEL_HIGH>,
150 <0 13 IRQ_TYPE_LEVEL_HIGH>;
151 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
154 clocks = <&clks IMX6UL_CLK_APBHDMA>;
157 gpmi: gpmi-nand@01806000 {
158 compatible = "fsl,imx6q-gpmi-nand";
159 #address-cells = <1>;
161 reg = <0x01806000 0x2000>, <0x01808000 0x2000>;
162 reg-names = "gpmi-nand", "bch";
163 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
164 interrupt-names = "bch";
165 clocks = <&clks IMX6UL_CLK_GPMI_IO>,
166 <&clks IMX6UL_CLK_GPMI_APB>,
167 <&clks IMX6UL_CLK_GPMI_BCH>,
168 <&clks IMX6UL_CLK_GPMI_BCH_APB>,
169 <&clks IMX6UL_CLK_PER_BCH>;
170 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
171 "gpmi_bch_apb", "per1_bch";
172 dmas = <&dma_apbh 0>;
177 aips1: aips-bus@02000000 {
178 compatible = "fsl,aips-bus", "simple-bus";
179 #address-cells = <1>;
181 reg = <0x02000000 0x100000>;
185 compatible = "fsl,spba-bus", "simple-bus";
186 #address-cells = <1>;
188 reg = <0x02000000 0x40000>;
191 ecspi1: ecspi@02008000 {
192 #address-cells = <1>;
194 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
195 reg = <0x02008000 0x4000>;
196 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
197 clocks = <&clks IMX6UL_CLK_ECSPI1>,
198 <&clks IMX6UL_CLK_ECSPI1>;
199 clock-names = "ipg", "per";
200 dmas = <&sdma 3 7 0>,
202 dma-names = "rx", "tx";
206 ecspi2: ecspi@0200c000 {
207 #address-cells = <1>;
209 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
210 reg = <0x0200c000 0x4000>;
211 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
212 clocks = <&clks IMX6UL_CLK_ECSPI2>,
213 <&clks IMX6UL_CLK_ECSPI2>;
214 clock-names = "ipg", "per";
215 dmas = <&sdma 5 7 0>,
217 dma-names = "rx", "tx";
221 ecspi3: ecspi@02010000 {
222 #address-cells = <1>;
224 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
225 reg = <0x02010000 0x4000>;
226 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
227 clocks = <&clks IMX6UL_CLK_ECSPI3>,
228 <&clks IMX6UL_CLK_ECSPI3>;
229 clock-names = "ipg", "per";
230 dmas = <&sdma 7 7 0>,
232 dma-names = "rx", "tx";
236 ecspi4: ecspi@02014000 {
237 #address-cells = <1>;
239 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
240 reg = <0x02014000 0x4000>;
241 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
242 clocks = <&clks IMX6UL_CLK_ECSPI4>,
243 <&clks IMX6UL_CLK_ECSPI4>;
244 clock-names = "ipg", "per";
245 dmas = <&sdma 9 7 0>,
247 dma-names = "rx", "tx";
251 uart7: serial@02018000 {
252 compatible = "fsl,imx6ul-uart",
254 reg = <0x02018000 0x4000>;
255 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
256 clocks = <&clks IMX6UL_CLK_UART7_IPG>,
257 <&clks IMX6UL_CLK_UART7_SERIAL>;
258 clock-names = "ipg", "per";
262 uart1: serial@02020000 {
263 compatible = "fsl,imx6ul-uart",
265 reg = <0x02020000 0x4000>;
266 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
267 clocks = <&clks IMX6UL_CLK_UART1_IPG>,
268 <&clks IMX6UL_CLK_UART1_SERIAL>;
269 clock-names = "ipg", "per";
273 uart8: serial@02024000 {
274 compatible = "fsl,imx6ul-uart",
276 reg = <0x02024000 0x4000>;
277 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
278 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
279 <&clks IMX6UL_CLK_UART8_SERIAL>;
280 clock-names = "ipg", "per";
285 #sound-dai-cells = <0>;
286 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
287 reg = <0x02028000 0x4000>;
288 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
289 clocks = <&clks IMX6UL_CLK_SAI1_IPG>,
290 <&clks IMX6UL_CLK_SAI1>,
291 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
292 clock-names = "bus", "mclk1", "mclk2", "mclk3";
293 dmas = <&sdma 35 24 0>,
295 dma-names = "rx", "tx";
300 #sound-dai-cells = <0>;
301 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
302 reg = <0x0202c000 0x4000>;
303 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
304 clocks = <&clks IMX6UL_CLK_SAI2_IPG>,
305 <&clks IMX6UL_CLK_SAI2>,
306 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
307 clock-names = "bus", "mclk1", "mclk2", "mclk3";
308 dmas = <&sdma 37 24 0>,
310 dma-names = "rx", "tx";
315 #sound-dai-cells = <0>;
316 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
317 reg = <0x02030000 0x4000>;
318 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
319 clocks = <&clks IMX6UL_CLK_SAI3_IPG>,
320 <&clks IMX6UL_CLK_SAI3>,
321 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
322 clock-names = "bus", "mclk1", "mclk2", "mclk3";
323 dmas = <&sdma 39 24 0>,
325 dma-names = "rx", "tx";
331 compatible = "fsl,imx6ul-tsc";
332 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
333 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&clks IMX6UL_CLK_IPG>,
336 <&clks IMX6UL_CLK_ADC2>;
337 clock-names = "tsc", "adc";
342 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
343 reg = <0x02080000 0x4000>;
344 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
345 clocks = <&clks IMX6UL_CLK_PWM1>,
346 <&clks IMX6UL_CLK_PWM1>;
347 clock-names = "ipg", "per";
353 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
354 reg = <0x02084000 0x4000>;
355 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&clks IMX6UL_CLK_PWM2>,
357 <&clks IMX6UL_CLK_PWM2>;
358 clock-names = "ipg", "per";
364 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
365 reg = <0x02088000 0x4000>;
366 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
367 clocks = <&clks IMX6UL_CLK_PWM3>,
368 <&clks IMX6UL_CLK_PWM3>;
369 clock-names = "ipg", "per";
375 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
376 reg = <0x0208c000 0x4000>;
377 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
378 clocks = <&clks IMX6UL_CLK_PWM4>,
379 <&clks IMX6UL_CLK_PWM4>;
380 clock-names = "ipg", "per";
385 can1: flexcan@02090000 {
386 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
387 reg = <0x02090000 0x4000>;
388 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
389 clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
390 <&clks IMX6UL_CLK_CAN1_SERIAL>;
391 clock-names = "ipg", "per";
395 can2: flexcan@02094000 {
396 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
397 reg = <0x02094000 0x4000>;
398 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
399 clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
400 <&clks IMX6UL_CLK_CAN2_SERIAL>;
401 clock-names = "ipg", "per";
406 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
407 reg = <0x02098000 0x4000>;
408 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
409 clocks = <&clks IMX6UL_CLK_GPT1_BUS>,
410 <&clks IMX6UL_CLK_GPT1_SERIAL>;
411 clock-names = "ipg", "per";
414 gpio1: gpio@0209c000 {
415 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
416 reg = <0x0209c000 0x4000>;
417 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
421 interrupt-controller;
422 #interrupt-cells = <2>;
425 gpio2: gpio@020a0000 {
426 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
427 reg = <0x020a0000 0x4000>;
428 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
429 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
432 interrupt-controller;
433 #interrupt-cells = <2>;
436 gpio3: gpio@020a4000 {
437 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
438 reg = <0x020a4000 0x4000>;
439 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
440 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
443 interrupt-controller;
444 #interrupt-cells = <2>;
447 gpio4: gpio@020a8000 {
448 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
449 reg = <0x020a8000 0x4000>;
450 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
451 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
454 interrupt-controller;
455 #interrupt-cells = <2>;
458 gpio5: gpio@020ac000 {
459 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
460 reg = <0x020ac000 0x4000>;
461 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
465 interrupt-controller;
466 #interrupt-cells = <2>;
469 fec2: ethernet@020b4000 {
470 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
471 reg = <0x020b4000 0x4000>;
472 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
474 clocks = <&clks IMX6UL_CLK_ENET>,
475 <&clks IMX6UL_CLK_ENET_AHB>,
476 <&clks IMX6UL_CLK_ENET_PTP>,
477 <&clks IMX6UL_CLK_ENET2_REF_125M>,
478 <&clks IMX6UL_CLK_ENET2_REF_125M>;
479 clock-names = "ipg", "ahb", "ptp",
480 "enet_clk_ref", "enet_out";
481 fsl,num-tx-queues=<1>;
482 fsl,num-rx-queues=<1>;
487 compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp";
488 reg = <0x020b8000 0x4000>;
489 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
490 clocks = <&clks IMX6UL_CLK_KPP>;
494 wdog1: wdog@020bc000 {
495 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
496 reg = <0x020bc000 0x4000>;
497 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
498 clocks = <&clks IMX6UL_CLK_WDOG1>;
501 wdog2: wdog@020c0000 {
502 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
503 reg = <0x020c0000 0x4000>;
504 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
505 clocks = <&clks IMX6UL_CLK_WDOG2>;
510 compatible = "fsl,imx6ul-ccm";
511 reg = <0x020c4000 0x4000>;
512 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
513 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
516 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
519 anatop: anatop@020c8000 {
520 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
521 "syscon", "simple-bus";
522 reg = <0x020c8000 0x1000>;
523 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
527 reg_3p0: regulator-3p0@120 {
528 compatible = "fsl,anatop-regulator";
529 regulator-name = "vdd3p0";
530 regulator-min-microvolt = <2625000>;
531 regulator-max-microvolt = <3400000>;
532 anatop-reg-offset = <0x120>;
533 anatop-vol-bit-shift = <8>;
534 anatop-vol-bit-width = <5>;
535 anatop-min-bit-val = <0>;
536 anatop-min-voltage = <2625000>;
537 anatop-max-voltage = <3400000>;
538 anatop-enable-bit = <0>;
541 reg_arm: regulator-vddcore@140 {
542 compatible = "fsl,anatop-regulator";
543 regulator-name = "cpu";
544 regulator-min-microvolt = <725000>;
545 regulator-max-microvolt = <1450000>;
547 anatop-reg-offset = <0x140>;
548 anatop-vol-bit-shift = <0>;
549 anatop-vol-bit-width = <5>;
550 anatop-delay-reg-offset = <0x170>;
551 anatop-delay-bit-shift = <24>;
552 anatop-delay-bit-width = <2>;
553 anatop-min-bit-val = <1>;
554 anatop-min-voltage = <725000>;
555 anatop-max-voltage = <1450000>;
558 reg_soc: regulator-vddsoc@140 {
559 compatible = "fsl,anatop-regulator";
560 regulator-name = "vddsoc";
561 regulator-min-microvolt = <725000>;
562 regulator-max-microvolt = <1450000>;
564 anatop-reg-offset = <0x140>;
565 anatop-vol-bit-shift = <18>;
566 anatop-vol-bit-width = <5>;
567 anatop-delay-reg-offset = <0x170>;
568 anatop-delay-bit-shift = <28>;
569 anatop-delay-bit-width = <2>;
570 anatop-min-bit-val = <1>;
571 anatop-min-voltage = <725000>;
572 anatop-max-voltage = <1450000>;
576 usbphy1: usbphy@020c9000 {
577 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
578 reg = <0x020c9000 0x1000>;
579 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
580 clocks = <&clks IMX6UL_CLK_USBPHY1>;
581 phy-3p0-supply = <®_3p0>;
582 fsl,anatop = <&anatop>;
585 usbphy2: usbphy@020ca000 {
586 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
587 reg = <0x020ca000 0x1000>;
588 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&clks IMX6UL_CLK_USBPHY2>;
590 phy-3p0-supply = <®_3p0>;
591 fsl,anatop = <&anatop>;
594 snvs: snvs@020cc000 {
595 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
596 reg = <0x020cc000 0x4000>;
598 snvs_rtc: snvs-rtc-lp {
599 compatible = "fsl,sec-v4.0-mon-rtc-lp";
602 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
603 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
606 snvs_poweroff: snvs-poweroff {
607 compatible = "syscon-poweroff";
614 snvs_pwrkey: snvs-powerkey {
615 compatible = "fsl,sec-v4.0-pwrkey";
617 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
618 linux,keycode = <KEY_POWER>;
623 epit1: epit@020d0000 {
624 reg = <0x020d0000 0x4000>;
625 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
628 epit2: epit@020d4000 {
629 reg = <0x020d4000 0x4000>;
630 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
634 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
635 reg = <0x020d8000 0x4000>;
636 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
637 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
642 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
643 reg = <0x020dc000 0x4000>;
644 interrupt-controller;
645 #interrupt-cells = <3>;
646 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
647 interrupt-parent = <&intc>;
650 iomuxc: iomuxc@020e0000 {
651 compatible = "fsl,imx6ul-iomuxc";
652 reg = <0x020e0000 0x4000>;
655 gpr: iomuxc-gpr@020e4000 {
656 compatible = "fsl,imx6ul-iomuxc-gpr", "syscon";
657 reg = <0x020e4000 0x4000>;
661 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
662 reg = <0x020e8000 0x4000>;
663 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
664 clocks = <&clks IMX6UL_CLK_GPT2_BUS>,
665 <&clks IMX6UL_CLK_GPT2_SERIAL>;
666 clock-names = "ipg", "per";
669 sdma: sdma@020ec000 {
670 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
672 reg = <0x020ec000 0x4000>;
673 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
674 clocks = <&clks IMX6UL_CLK_SDMA>,
675 <&clks IMX6UL_CLK_SDMA>;
676 clock-names = "ipg", "ahb";
678 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
682 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
683 reg = <0x020f0000 0x4000>;
684 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
685 clocks = <&clks IMX6UL_CLK_PWM5>,
686 <&clks IMX6UL_CLK_PWM5>;
687 clock-names = "ipg", "per";
693 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
694 reg = <0x020f4000 0x4000>;
695 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
696 clocks = <&clks IMX6UL_CLK_PWM6>,
697 <&clks IMX6UL_CLK_PWM6>;
698 clock-names = "ipg", "per";
704 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
705 reg = <0x020f8000 0x4000>;
706 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
707 clocks = <&clks IMX6UL_CLK_PWM7>,
708 <&clks IMX6UL_CLK_PWM7>;
709 clock-names = "ipg", "per";
715 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
716 reg = <0x020fc000 0x4000>;
717 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&clks IMX6UL_CLK_PWM8>,
719 <&clks IMX6UL_CLK_PWM8>;
720 clock-names = "ipg", "per";
726 aips2: aips-bus@02100000 {
727 compatible = "fsl,aips-bus", "simple-bus";
728 #address-cells = <1>;
730 reg = <0x02100000 0x100000>;
733 usbotg1: usb@02184000 {
734 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
735 reg = <0x02184000 0x200>;
736 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
737 clocks = <&clks IMX6UL_CLK_USBOH3>;
738 fsl,usbphy = <&usbphy1>;
739 fsl,usbmisc = <&usbmisc 0>;
740 fsl,anatop = <&anatop>;
741 ahb-burst-config = <0x0>;
742 tx-burst-size-dword = <0x10>;
743 rx-burst-size-dword = <0x10>;
747 usbotg2: usb@02184200 {
748 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
749 reg = <0x02184200 0x200>;
750 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
751 clocks = <&clks IMX6UL_CLK_USBOH3>;
752 fsl,usbphy = <&usbphy2>;
753 fsl,usbmisc = <&usbmisc 1>;
754 ahb-burst-config = <0x0>;
755 tx-burst-size-dword = <0x10>;
756 rx-burst-size-dword = <0x10>;
760 usbmisc: usbmisc@02184800 {
762 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
763 reg = <0x02184800 0x200>;
766 fec1: ethernet@02188000 {
767 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
768 reg = <0x02188000 0x4000>;
769 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
771 clocks = <&clks IMX6UL_CLK_ENET>,
772 <&clks IMX6UL_CLK_ENET_AHB>,
773 <&clks IMX6UL_CLK_ENET_PTP>,
774 <&clks IMX6UL_CLK_ENET_REF>,
775 <&clks IMX6UL_CLK_ENET_REF>;
776 clock-names = "ipg", "ahb", "ptp",
777 "enet_clk_ref", "enet_out";
778 fsl,num-tx-queues=<1>;
779 fsl,num-rx-queues=<1>;
783 usdhc1: usdhc@02190000 {
784 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
785 reg = <0x02190000 0x4000>;
786 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
787 clocks = <&clks IMX6UL_CLK_USDHC1>,
788 <&clks IMX6UL_CLK_USDHC1>,
789 <&clks IMX6UL_CLK_USDHC1>;
790 clock-names = "ipg", "ahb", "per";
795 usdhc2: usdhc@02194000 {
796 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
797 reg = <0x02194000 0x4000>;
798 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
799 clocks = <&clks IMX6UL_CLK_USDHC2>,
800 <&clks IMX6UL_CLK_USDHC2>,
801 <&clks IMX6UL_CLK_USDHC2>;
802 clock-names = "ipg", "ahb", "per";
808 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
809 reg = <0x02198000 0x4000>;
810 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&clks IMX6UL_CLK_ADC1>;
814 fsl,adck-max-frequency = <30000000>, <40000000>,
820 #address-cells = <1>;
822 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
823 reg = <0x021a0000 0x4000>;
824 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
825 clocks = <&clks IMX6UL_CLK_I2C1>;
830 #address-cells = <1>;
832 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
833 reg = <0x021a4000 0x4000>;
834 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
835 clocks = <&clks IMX6UL_CLK_I2C2>;
840 #address-cells = <1>;
842 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
843 reg = <0x021a8000 0x4000>;
844 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&clks IMX6UL_CLK_I2C3>;
849 mmdc: mmdc@021b0000 {
850 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
851 reg = <0x021b0000 0x4000>;
854 lcdif: lcdif@021c8000 {
855 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
856 reg = <0x021c8000 0x4000>;
857 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
858 clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
859 <&clks IMX6UL_CLK_LCDIF_APB>,
860 <&clks IMX6UL_CLK_DUMMY>;
861 clock-names = "pix", "axi", "disp_axi";
865 qspi: qspi@021e0000 {
866 #address-cells = <1>;
868 compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
869 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
870 reg-names = "QuadSPI", "QuadSPI-memory";
871 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
872 clocks = <&clks IMX6UL_CLK_QSPI>,
873 <&clks IMX6UL_CLK_QSPI>;
874 clock-names = "qspi_en", "qspi";
878 uart2: serial@021e8000 {
879 compatible = "fsl,imx6ul-uart",
881 reg = <0x021e8000 0x4000>;
882 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
883 clocks = <&clks IMX6UL_CLK_UART2_IPG>,
884 <&clks IMX6UL_CLK_UART2_SERIAL>;
885 clock-names = "ipg", "per";
889 uart3: serial@021ec000 {
890 compatible = "fsl,imx6ul-uart",
892 reg = <0x021ec000 0x4000>;
893 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&clks IMX6UL_CLK_UART3_IPG>,
895 <&clks IMX6UL_CLK_UART3_SERIAL>;
896 clock-names = "ipg", "per";
900 uart4: serial@021f0000 {
901 compatible = "fsl,imx6ul-uart",
903 reg = <0x021f0000 0x4000>;
904 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&clks IMX6UL_CLK_UART4_IPG>,
906 <&clks IMX6UL_CLK_UART4_SERIAL>;
907 clock-names = "ipg", "per";
911 uart5: serial@021f4000 {
912 compatible = "fsl,imx6ul-uart",
914 reg = <0x021f4000 0x4000>;
915 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
916 clocks = <&clks IMX6UL_CLK_UART5_IPG>,
917 <&clks IMX6UL_CLK_UART5_SERIAL>;
918 clock-names = "ipg", "per";
923 #address-cells = <1>;
925 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
926 reg = <0x021f8000 0x4000>;
927 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
928 clocks = <&clks IMX6UL_CLK_I2C4>;
932 uart6: serial@021fc000 {
933 compatible = "fsl,imx6ul-uart",
935 reg = <0x021fc000 0x4000>;
936 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
937 clocks = <&clks IMX6UL_CLK_UART6_IPG>,
938 <&clks IMX6UL_CLK_UART6_SERIAL>;
939 clock-names = "ipg", "per";