2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
43 #include <dt-bindings/clock/imx7d-clock.h>
44 #include <dt-bindings/gpio/gpio.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include "imx7d-pinfunc.h"
47 #include "skeleton.dtsi"
79 compatible = "arm,cortex-a7";
87 clock-latency = <61036>; /* two CLK32 periods */
88 clocks = <&clks IMX7D_CLK_ARM>;
92 compatible = "arm,cortex-a7";
98 intc: interrupt-controller@31001000 {
99 compatible = "arm,cortex-a7-gic";
100 #interrupt-cells = <3>;
101 interrupt-controller;
102 reg = <0x31001000 0x1000>,
109 compatible = "fixed-clock";
111 clock-frequency = <32768>;
112 clock-output-names = "ckil";
116 compatible = "fixed-clock";
118 clock-frequency = <24000000>;
119 clock-output-names = "osc";
123 compatible = "arm,armv7-timer";
124 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
125 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
126 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
127 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
128 interrupt-parent = <&intc>;
132 compatible = "arm,coresight-tmc", "arm,primecell";
133 reg = <0x30086000 0x1000>;
134 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
135 clock-names = "apb_pclk";
138 etr_in_port: endpoint {
140 remote-endpoint = <&replicator_out_port1>;
146 compatible = "arm,coresight-tpiu", "arm,primecell";
147 reg = <0x30087000 0x1000>;
148 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
149 clock-names = "apb_pclk";
152 tpiu_in_port: endpoint {
154 remote-endpoint = <&replicator_out_port1>;
161 * non-configurable replicators don't show up on the
162 * AMBA bus. As such no need to add "arm,primecell"
164 compatible = "arm,coresight-replicator";
167 #address-cells = <1>;
170 /* replicator output ports */
173 replicator_out_port0: endpoint {
174 remote-endpoint = <&tpiu_in_port>;
180 replicator_out_port1: endpoint {
181 remote-endpoint = <&etr_in_port>;
185 /* replicator input port */
188 replicator_in_port0: endpoint {
190 remote-endpoint = <&etf_out_port>;
197 compatible = "arm,coresight-tmc", "arm,primecell";
198 reg = <0x30084000 0x1000>;
199 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
200 clock-names = "apb_pclk";
203 #address-cells = <1>;
208 etf_in_port: endpoint {
210 remote-endpoint = <&hugo_funnel_out_port0>;
216 etf_out_port: endpoint {
217 remote-endpoint = <&replicator_in_port0>;
224 compatible = "arm,coresight-funnel", "arm,primecell";
225 reg = <0x30083000 0x1000>;
226 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
227 clock-names = "apb_pclk";
230 #address-cells = <1>;
233 /* funnel input ports */
236 hugo_funnel_in_port0: endpoint {
238 remote-endpoint = <&ca_funnel_out_port0>;
244 hugo_funnel_in_port1: endpoint {
245 slave-mode; /* M4 input */
251 hugo_funnel_out_port0: endpoint {
252 remote-endpoint = <&etf_in_port>;
256 /* the other input ports are not connect to anything */
261 compatible = "arm,coresight-funnel", "arm,primecell";
262 reg = <0x30041000 0x1000>;
263 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
264 clock-names = "apb_pclk";
267 #address-cells = <1>;
270 /* funnel input ports */
273 ca_funnel_in_port0: endpoint {
275 remote-endpoint = <&etm0_out_port>;
281 ca_funnel_in_port1: endpoint {
283 remote-endpoint = <&etm1_out_port>;
287 /* funnel output port */
290 ca_funnel_out_port0: endpoint {
291 remote-endpoint = <&hugo_funnel_in_port0>;
295 /* the other input ports are not connect to anything */
300 compatible = "arm,coresight-etm3x", "arm,primecell";
301 reg = <0x3007c000 0x1000>;
303 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
304 clock-names = "apb_pclk";
307 etm0_out_port: endpoint {
308 remote-endpoint = <&ca_funnel_in_port0>;
314 compatible = "arm,coresight-etm3x", "arm,primecell";
315 reg = <0x3007d000 0x1000>;
318 * System will hang if added nosmp in kernel command line
319 * without arm,primecell-periphid because amba bus try to
320 * read id and core1 power off at this time.
322 arm,primecell-periphid = <0xbb956>;
324 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
325 clock-names = "apb_pclk";
328 etm1_out_port: endpoint {
329 remote-endpoint = <&ca_funnel_in_port1>;
335 #address-cells = <1>;
337 compatible = "simple-bus";
338 interrupt-parent = <&intc>;
341 aips1: aips-bus@30000000 {
342 compatible = "fsl,aips-bus", "simple-bus";
343 #address-cells = <1>;
345 reg = <0x30000000 0x400000>;
348 gpio1: gpio@30200000 {
349 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
350 reg = <0x30200000 0x10000>;
351 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, /* GPIO1_INT15_0 */
352 <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; /* GPIO1_INT31_16 */
355 interrupt-controller;
356 #interrupt-cells = <2>;
359 gpio2: gpio@30210000 {
360 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
361 reg = <0x30210000 0x10000>;
362 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
366 interrupt-controller;
367 #interrupt-cells = <2>;
370 gpio3: gpio@30220000 {
371 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
372 reg = <0x30220000 0x10000>;
373 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
374 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
377 interrupt-controller;
378 #interrupt-cells = <2>;
381 gpio4: gpio@30230000 {
382 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
383 reg = <0x30230000 0x10000>;
384 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
388 interrupt-controller;
389 #interrupt-cells = <2>;
392 gpio5: gpio@30240000 {
393 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
394 reg = <0x30240000 0x10000>;
395 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
396 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
399 interrupt-controller;
400 #interrupt-cells = <2>;
403 gpio6: gpio@30250000 {
404 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
405 reg = <0x30250000 0x10000>;
406 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
407 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
410 interrupt-controller;
411 #interrupt-cells = <2>;
414 gpio7: gpio@30260000 {
415 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
416 reg = <0x30260000 0x10000>;
417 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
421 interrupt-controller;
422 #interrupt-cells = <2>;
425 wdog1: wdog@30280000 {
426 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
427 reg = <0x30280000 0x10000>;
428 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
429 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
432 wdog2: wdog@30290000 {
433 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
434 reg = <0x30290000 0x10000>;
435 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
436 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
440 wdog3: wdog@302a0000 {
441 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
442 reg = <0x302a0000 0x10000>;
443 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
444 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
448 wdog4: wdog@302b0000 {
449 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
450 reg = <0x302b0000 0x10000>;
451 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
452 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
456 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
457 compatible = "fsl,imx7d-iomuxc-lpsr";
458 reg = <0x302c0000 0x10000>;
459 fsl,input-sel = <&iomuxc>;
463 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
464 reg = <0x302d0000 0x10000>;
465 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
466 clocks = <&clks IMX7D_CLK_DUMMY>,
467 <&clks IMX7D_GPT1_ROOT_CLK>;
468 clock-names = "ipg", "per";
472 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
473 reg = <0x302e0000 0x10000>;
474 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
475 clocks = <&clks IMX7D_CLK_DUMMY>,
476 <&clks IMX7D_GPT2_ROOT_CLK>;
477 clock-names = "ipg", "per";
482 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
483 reg = <0x302f0000 0x10000>;
484 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
485 clocks = <&clks IMX7D_CLK_DUMMY>,
486 <&clks IMX7D_GPT3_ROOT_CLK>;
487 clock-names = "ipg", "per";
492 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
493 reg = <0x30300000 0x10000>;
494 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&clks IMX7D_CLK_DUMMY>,
496 <&clks IMX7D_GPT4_ROOT_CLK>;
497 clock-names = "ipg", "per";
501 iomuxc: iomuxc@30330000 {
502 compatible = "fsl,imx7d-iomuxc";
503 reg = <0x30330000 0x10000>;
506 gpr: iomuxc-gpr@30340000 {
507 compatible = "fsl,imx7d-iomuxc-gpr", "syscon";
508 reg = <0x30340000 0x10000>;
511 ocotp: ocotp-ctrl@30350000 {
512 compatible = "syscon";
513 reg = <0x30350000 0x10000>;
514 clocks = <&clks IMX7D_CLK_DUMMY>;
518 anatop: anatop@30360000 {
519 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
520 "syscon", "simple-bus";
521 reg = <0x30360000 0x10000>;
522 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
523 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
525 reg_1p0d: regulator-vdd1p0d@210 {
526 compatible = "fsl,anatop-regulator";
527 regulator-name = "vdd1p0d";
528 regulator-min-microvolt = <800000>;
529 regulator-max-microvolt = <1200000>;
530 anatop-reg-offset = <0x210>;
531 anatop-vol-bit-shift = <8>;
532 anatop-vol-bit-width = <5>;
533 anatop-min-bit-val = <8>;
534 anatop-min-voltage = <800000>;
535 anatop-max-voltage = <1200000>;
536 anatop-enable-bit = <31>;
540 snvs: snvs@30370000 {
541 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
542 reg = <0x30370000 0x10000>;
544 snvs_rtc: snvs-rtc-lp {
545 compatible = "fsl,sec-v4.0-mon-rtc-lp";
548 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
552 snvs_poweroff: snvs-poweroff {
553 compatible = "syscon-poweroff";
559 snvs_pwrkey: snvs-powerkey {
560 compatible = "fsl,sec-v4.0-pwrkey";
562 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
563 linux,keycode = <KEY_POWER>;
569 compatible = "fsl,imx7d-ccm";
570 reg = <0x30380000 0x10000>;
571 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
572 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
574 clocks = <&ckil>, <&osc>;
575 clock-names = "ckil", "osc";
579 compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon";
580 reg = <0x30390000 0x10000>;
581 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
586 aips2: aips-bus@30400000 {
587 compatible = "fsl,aips-bus", "simple-bus";
588 #address-cells = <1>;
590 reg = <0x30400000 0x400000>;
594 compatible = "fsl,imx7d-adc";
595 reg = <0x30610000 0x10000>;
596 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
603 compatible = "fsl,imx7d-adc";
604 reg = <0x30620000 0x10000>;
605 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
606 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
612 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
613 reg = <0x30660000 0x10000>;
614 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
615 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
616 <&clks IMX7D_PWM1_ROOT_CLK>;
617 clock-names = "ipg", "per";
623 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
624 reg = <0x30670000 0x10000>;
625 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
626 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
627 <&clks IMX7D_PWM2_ROOT_CLK>;
628 clock-names = "ipg", "per";
634 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
635 reg = <0x30680000 0x10000>;
636 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
637 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
638 <&clks IMX7D_PWM3_ROOT_CLK>;
639 clock-names = "ipg", "per";
645 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
646 reg = <0x30690000 0x10000>;
647 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
648 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
649 <&clks IMX7D_PWM4_ROOT_CLK>;
650 clock-names = "ipg", "per";
656 aips3: aips-bus@30800000 {
657 compatible = "fsl,aips-bus", "simple-bus";
658 #address-cells = <1>;
660 reg = <0x30800000 0x400000>;
663 uart1: serial@30860000 {
664 compatible = "fsl,imx7d-uart",
666 reg = <0x30860000 0x10000>;
667 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
668 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
669 <&clks IMX7D_UART1_ROOT_CLK>;
670 clock-names = "ipg", "per";
674 uart2: serial@30890000 {
675 compatible = "fsl,imx7d-uart",
677 reg = <0x30890000 0x10000>;
678 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
679 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
680 <&clks IMX7D_UART2_ROOT_CLK>;
681 clock-names = "ipg", "per";
685 uart3: serial@30880000 {
686 compatible = "fsl,imx7d-uart",
688 reg = <0x30880000 0x10000>;
689 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
691 <&clks IMX7D_UART3_ROOT_CLK>;
692 clock-names = "ipg", "per";
697 #address-cells = <1>;
699 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
700 reg = <0x30a20000 0x10000>;
701 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
707 #address-cells = <1>;
709 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
710 reg = <0x30a30000 0x10000>;
711 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
717 #address-cells = <1>;
719 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
720 reg = <0x30a40000 0x10000>;
721 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
722 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
727 #address-cells = <1>;
729 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
730 reg = <0x30a50000 0x10000>;
731 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
732 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
736 uart4: serial@30a60000 {
737 compatible = "fsl,imx7d-uart",
739 reg = <0x30a60000 0x10000>;
740 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
741 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
742 <&clks IMX7D_UART4_ROOT_CLK>;
743 clock-names = "ipg", "per";
747 uart5: serial@30a70000 {
748 compatible = "fsl,imx7d-uart",
750 reg = <0x30a70000 0x10000>;
751 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
752 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
753 <&clks IMX7D_UART5_ROOT_CLK>;
754 clock-names = "ipg", "per";
758 uart6: serial@30a80000 {
759 compatible = "fsl,imx7d-uart",
761 reg = <0x30a80000 0x10000>;
762 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
763 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
764 <&clks IMX7D_UART6_ROOT_CLK>;
765 clock-names = "ipg", "per";
769 uart7: serial@30a90000 {
770 compatible = "fsl,imx7d-uart",
772 reg = <0x30a90000 0x10000>;
773 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
775 <&clks IMX7D_UART7_ROOT_CLK>;
776 clock-names = "ipg", "per";
780 usbotg1: usb@30b10000 {
781 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
782 reg = <0x30b10000 0x200>;
783 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
784 clocks = <&clks IMX7D_USB_CTRL_CLK>;
785 fsl,usbphy = <&usbphynop1>;
786 fsl,usbmisc = <&usbmisc1 0>;
787 phy-clkgate-delay-us = <400>;
791 usbotg2: usb@30b20000 {
792 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
793 reg = <0x30b20000 0x200>;
794 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
795 clocks = <&clks IMX7D_USB_CTRL_CLK>;
796 fsl,usbphy = <&usbphynop2>;
797 fsl,usbmisc = <&usbmisc2 0>;
798 phy-clkgate-delay-us = <400>;
803 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
804 reg = <0x30b30000 0x200>;
805 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
806 clocks = <&clks IMX7D_USB_CTRL_CLK>;
807 fsl,usbphy = <&usbphynop3>;
808 fsl,usbmisc = <&usbmisc3 0>;
811 phy-clkgate-delay-us = <400>;
815 usbmisc1: usbmisc@30b10200 {
817 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
818 reg = <0x30b10200 0x200>;
821 usbmisc2: usbmisc@30b20200 {
823 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
824 reg = <0x30b20200 0x200>;
827 usbmisc3: usbmisc@30b30200 {
829 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
830 reg = <0x30b30200 0x200>;
833 usbphynop1: usbphynop1 {
834 compatible = "usb-nop-xceiv";
835 clocks = <&clks IMX7D_USB_PHY1_CLK>;
836 clock-names = "main_clk";
839 usbphynop2: usbphynop2 {
840 compatible = "usb-nop-xceiv";
841 clocks = <&clks IMX7D_USB_PHY2_CLK>;
842 clock-names = "main_clk";
845 usbphynop3: usbphynop3 {
846 compatible = "usb-nop-xceiv";
847 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
848 clock-names = "main_clk";
851 usdhc1: usdhc@30b40000 {
852 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
853 reg = <0x30b40000 0x10000>;
854 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
855 clocks = <&clks IMX7D_CLK_DUMMY>,
856 <&clks IMX7D_CLK_DUMMY>,
857 <&clks IMX7D_USDHC1_ROOT_CLK>;
858 clock-names = "ipg", "ahb", "per";
863 usdhc2: usdhc@30b50000 {
864 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
865 reg = <0x30b50000 0x10000>;
866 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&clks IMX7D_CLK_DUMMY>,
868 <&clks IMX7D_CLK_DUMMY>,
869 <&clks IMX7D_USDHC2_ROOT_CLK>;
870 clock-names = "ipg", "ahb", "per";
875 usdhc3: usdhc@30b60000 {
876 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
877 reg = <0x30b60000 0x10000>;
878 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&clks IMX7D_CLK_DUMMY>,
880 <&clks IMX7D_CLK_DUMMY>,
881 <&clks IMX7D_USDHC3_ROOT_CLK>;
882 clock-names = "ipg", "ahb", "per";
887 fec1: ethernet@30be0000 {
888 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
889 reg = <0x30be0000 0x10000>;
890 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
891 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
892 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
893 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
894 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
895 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
896 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
897 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
898 clock-names = "ipg", "ahb", "ptp",
899 "enet_clk_ref", "enet_out";
900 fsl,num-tx-queues=<3>;
901 fsl,num-rx-queues=<3>;
905 fec2: ethernet@30bf0000 {
906 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
907 reg = <0x30bf0000 0x10000>;
908 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
910 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
911 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
912 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
913 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
914 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
915 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
916 clock-names = "ipg", "ahb", "ptp",
917 "enet_clk_ref", "enet_out";
918 fsl,num-tx-queues=<3>;
919 fsl,num-rx-queues=<3>;