2 * Device Tree for the ARM Integrator/CP platform
6 /include/ "integrator.dtsi"
9 model = "ARM Integrator/CP";
10 compatible = "arm,integrator-cp";
13 bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
17 compatible = "arm,integrator-cp-syscon";
18 reg = <0xcb000000 0x100>;
21 timer0: timer@13000000 {
22 /* TIMER0 runs @ 25MHz */
23 compatible = "arm,integrator-cp-timer";
27 timer1: timer@13000100 {
28 /* TIMER1 runs @ 1MHz */
29 compatible = "arm,integrator-cp-timer";
32 timer2: timer@13000200 {
33 /* TIMER2 runs @ 1MHz */
34 compatible = "arm,integrator-cp-timer";
38 valid-mask = <0x1fc003ff>;
42 compatible = "arm,versatile-fpga-irq";
43 #interrupt-cells = <1>;
45 reg = <0x10000040 0x100>;
46 clear-mask = <0xffffffff>;
47 valid-mask = <0x00000007>;
50 /* The SIC is cascaded off IRQ 26 on the PIC */
52 compatible = "arm,versatile-fpga-irq";
53 interrupt-parent = <&pic>;
55 #interrupt-cells = <1>;
57 reg = <0xca000000 0x100>;
58 clear-mask = <0x00000fff>;
59 valid-mask = <0x00000fff>;
63 compatible = "smsc,lan91c111";
64 reg = <0xc8000000 0x10>;
65 interrupt-parent = <&pic>;
71 * These PrimeCells are at the same location and using
72 * the same interrupts in all Integrators, but in the CP
73 * slightly newer versions are deployed.
76 compatible = "arm,pl031", "arm,primecell";
80 compatible = "arm,pl011", "arm,primecell";
84 compatible = "arm,pl011", "arm,primecell";
88 compatible = "arm,pl050", "arm,primecell";
92 compatible = "arm,pl050", "arm,primecell";
96 * These PrimeCells are only available on the Integrator/CP
99 compatible = "arm,pl180", "arm,primecell";
100 reg = <0x1c000000 0x1000>;
101 interrupts = <23 24>;
102 max-frequency = <515633>;
106 compatible = "arm,pl041", "arm,primecell";
107 reg = <0x1d000000 0x1000>;
112 compatible = "arm,pl110", "arm,primecell";
113 reg = <0xC0000000 0x1000>;