2 * Copyright 2013 Texas Instruments, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "skeleton.dtsi"
15 model = "Texas Instruments Keystone 2 SoC";
16 compatible = "ti,keystone-evm";
19 interrupt-parent = <&gic>;
26 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
33 interrupt-parent = <&gic>;
36 compatible = "arm,cortex-a15";
42 compatible = "arm,cortex-a15";
48 compatible = "arm,cortex-a15";
54 compatible = "arm,cortex-a15";
60 gic: interrupt-controller {
61 compatible = "arm,cortex-a15-gic";
62 #interrupt-cells = <3>;
66 reg = <0x0 0x02561000 0x0 0x1000>,
67 <0x0 0x02562000 0x0 0x2000>;
71 compatible = "arm,armv7-timer";
74 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
76 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
78 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
80 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
84 compatible = "arm,cortex-a15-pmu";
85 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
86 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
87 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
88 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
94 compatible = "ti,keystone","simple-bus";
95 interrupt-parent = <&gic>;
96 ranges = <0x0 0x0 0x0 0xc0000000>;
98 rstctrl: reset-controller {
99 compatible = "ti,keystone-reset";
100 reg = <0x023100e8 4>; /* pll reset control reg */
103 /include/ "keystone-clocks.dtsi"
105 uart0: serial@02530c00 {
106 compatible = "ns16550a";
107 current-speed = <115200>;
110 reg = <0x02530c00 0x100>;
111 clocks = <&clkuart0>;
112 interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
115 uart1: serial@02531000 {
116 compatible = "ns16550a";
117 current-speed = <115200>;
120 reg = <0x02531000 0x100>;
121 clocks = <&clkuart1>;
122 interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
126 compatible = "ti,davinci-i2c";
127 reg = <0x02530000 0x400>;
128 clock-frequency = <100000>;
130 interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
131 #address-cells = <1>;
135 compatible = "at,24c1024";
141 compatible = "ti,davinci-i2c";
142 reg = <0x02530400 0x400>;
143 clock-frequency = <100000>;
145 interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
149 compatible = "ti,davinci-i2c";
150 reg = <0x02530800 0x400>;
151 clock-frequency = <100000>;
153 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
157 compatible = "ti,dm6441-spi";
158 reg = <0x21000400 0x200>;
160 ti,davinci-spi-intr-line = <0>;
161 interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
166 compatible = "ti,dm6441-spi";
167 reg = <0x21000600 0x200>;
169 ti,davinci-spi-intr-line = <0>;
170 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
175 compatible = "ti,dm6441-spi";
176 reg = <0x21000800 0x200>;
178 ti,davinci-spi-intr-line = <0>;
179 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;