arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   4
   5 / {
   6         compatible = "marvell,kirkwood";
   7         interrupt-parent = <&intc>;
   8
   9         cpus {
  10                 #address-cells = <1>;
  11                 #size-cells = <0>;
  12
  13                 cpu@0 {
  14                         device_type = "cpu";
  15                         compatible = "marvell,feroceon";
  16                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  17                         clock-names = "cpu_clk", "ddrclk", "powersave";
  18                 };
  19         };
  20
  21         aliases {
  22                gpio0 = &gpio0;
  23                gpio1 = &gpio1;
  24         };
  25
  26         mbus {
  27                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  28                 #address-cells = <2>;
  29                 #size-cells = <1>;
  30                 controller = <&mbusc>;
  31                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  32                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  33         };
  34
  35         ocp@f1000000 {
  36                 compatible = "simple-bus";
  37                 ranges = <0x00000000 0xf1000000 0x0100000
  38                           0xf4000000 0xf4000000 0x0000400
  39                           0xf5000000 0xf5000000 0x0000400>;
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 mbusc: mbus-controller@20000 {
  44                         compatible = "marvell,mbus-controller";
  45                         reg = <0x20000 0x80>, <0x1500 0x20>;
  46                 };
  47
  48                 timer: timer@20300 {
  49                         compatible = "marvell,orion-timer";
  50                         reg = <0x20300 0x20>;
  51                         interrupt-parent = <&bridge_intc>;
  52                         interrupts = <1>, <2>;
  53                         clocks = <&core_clk 0>;
  54                 };
  55
  56                 intc: main-interrupt-ctrl@20200 {
  57                         compatible = "marvell,orion-intc";
  58                         interrupt-controller;
  59                         #interrupt-cells = <1>;
  60                         reg = <0x20200 0x10>, <0x20210 0x10>;
  61                 };
  62
  63                 bridge_intc: bridge-interrupt-ctrl@20110 {
  64                         compatible = "marvell,orion-bridge-intc";
  65                         interrupt-controller;
  66                         #interrupt-cells = <1>;
  67                         reg = <0x20110 0x8>;
  68                         interrupts = <1>;
  69                         marvell,#interrupts = <6>;
  70                 };
  71
  72                 core_clk: core-clocks@10030 {
  73                         compatible = "marvell,kirkwood-core-clock";
  74                         reg = <0x10030 0x4>;
  75                         #clock-cells = <1>;
  76                 };
  77
  78                 gpio0: gpio@10100 {
  79                         compatible = "marvell,orion-gpio";
  80                         #gpio-cells = <2>;
  81                         gpio-controller;
  82                         reg = <0x10100 0x40>;
  83                         ngpios = <32>;
  84                         interrupt-controller;
  85                         #interrupt-cells = <2>;
  86                         interrupts = <35>, <36>, <37>, <38>;
  87                         clocks = <&gate_clk 7>;
  88                 };
  89
  90                 gpio1: gpio@10140 {
  91                         compatible = "marvell,orion-gpio";
  92                         #gpio-cells = <2>;
  93                         gpio-controller;
  94                         reg = <0x10140 0x40>;
  95                         ngpios = <18>;
  96                         interrupt-controller;
  97                         #interrupt-cells = <2>;
  98                         interrupts = <39>, <40>, <41>;
  99                         clocks = <&gate_clk 7>;
 100                 };
 101
 102                 serial@12000 {
 103                         compatible = "ns16550a";
 104                         reg = <0x12000 0x100>;
 105                         reg-shift = <2>;
 106                         interrupts = <33>;
 107                         clocks = <&gate_clk 7>;
 108                         status = "disabled";
 109                 };
 110
 111                 serial@12100 {
 112                         compatible = "ns16550a";
 113                         reg = <0x12100 0x100>;
 114                         reg-shift = <2>;
 115                         interrupts = <34>;
 116                         clocks = <&gate_clk 7>;
 117                         status = "disabled";
 118                 };
 119
 120                 spi@10600 {
 121                         compatible = "marvell,orion-spi";
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124                         cell-index = <0>;
 125                         interrupts = <23>;
 126                         reg = <0x10600 0x28>;
 127                         clocks = <&gate_clk 7>;
 128                         status = "disabled";
 129                 };
 130
 131                 gate_clk: clock-gating-control@2011c {
 132                         compatible = "marvell,kirkwood-gating-clock";
 133                         reg = <0x2011c 0x4>;
 134                         clocks = <&core_clk 0>;
 135                         #clock-cells = <1>;
 136                 };
 137
 138                 wdt: watchdog-timer@20300 {
 139                         compatible = "marvell,orion-wdt";
 140                         reg = <0x20300 0x28>;
 141                         interrupt-parent = <&bridge_intc>;
 142                         interrupts = <3>;
 143                         clocks = <&gate_clk 7>;
 144                         status = "okay";
 145                 };
 146
 147                 xor@60800 {
 148                         compatible = "marvell,orion-xor";
 149                         reg = <0x60800 0x100
 150                                0x60A00 0x100>;
 151                         status = "okay";
 152                         clocks = <&gate_clk 8>;
 153
 154                         xor00 {
 155                               interrupts = <5>;
 156                               dmacap,memcpy;
 157                               dmacap,xor;
 158                         };
 159                         xor01 {
 160                               interrupts = <6>;
 161                               dmacap,memcpy;
 162                               dmacap,xor;
 163                               dmacap,memset;
 164                         };
 165                 };
 166
 167                 xor@60900 {
 168                         compatible = "marvell,orion-xor";
 169                         reg = <0x60900 0x100
 170                                0xd0B00 0x100>;
 171                         status = "okay";
 172                         clocks = <&gate_clk 16>;
 173
 174                         xor00 {
 175                               interrupts = <7>;
 176                               dmacap,memcpy;
 177                               dmacap,xor;
 178                         };
 179                         xor01 {
 180                               interrupts = <8>;
 181                               dmacap,memcpy;
 182                               dmacap,xor;
 183                               dmacap,memset;
 184                         };
 185                 };
 186
 187                 ehci@50000 {
 188                         compatible = "marvell,orion-ehci";
 189                         reg = <0x50000 0x1000>;
 190                         interrupts = <19>;
 191                         clocks = <&gate_clk 3>;
 192                         status = "okay";
 193                 };
 194
 195                 nand@3000000 {
 196                         #address-cells = <1>;
 197                         #size-cells = <1>;
 198                         cle = <0>;
 199                         ale = <1>;
 200                         bank-width = <1>;
 201                         compatible = "marvell,orion-nand";
 202                         reg = <0xf4000000 0x400>;
 203                         chip-delay = <25>;
 204                         /* set partition map and/or chip-delay in board dts */
 205                         clocks = <&gate_clk 7>;
 206                         status = "disabled";
 207                 };
 208
 209                 i2c@11000 {
 210                         compatible = "marvell,mv64xxx-i2c";
 211                         reg = <0x11000 0x20>;
 212                         #address-cells = <1>;
 213                         #size-cells = <0>;
 214                         interrupts = <29>;
 215                         clock-frequency = <100000>;
 216                         clocks = <&gate_clk 7>;
 217                         status = "disabled";
 218                 };
 219
 220                 crypto@30000 {
 221                         compatible = "marvell,orion-crypto";
 222                         reg = <0x30000 0x10000>,
 223                               <0xf5000000 0x800>;
 224                         reg-names = "regs", "sram";
 225                         interrupts = <22>;
 226                         clocks = <&gate_clk 17>;
 227                         status = "okay";
 228                 };
 229
 230                 mdio: mdio-bus@72004 {
 231                         compatible = "marvell,orion-mdio";
 232                         #address-cells = <1>;
 233                         #size-cells = <0>;
 234                         reg = <0x72004 0x84>;
 235                         interrupts = <46>;
 236                         clocks = <&gate_clk 0>;
 237                         status = "disabled";
 238
 239                         /* add phy nodes in board file */
 240                 };
 241
 242                 eth0: ethernet-controller@72000 {
 243                         compatible = "marvell,kirkwood-eth";
 244                         #address-cells = <1>;
 245                         #size-cells = <0>;
 246                         reg = <0x72000 0x4000>;
 247                         clocks = <&gate_clk 0>;
 248                         marvell,tx-checksum-limit = <1600>;
 249                         status = "disabled";
 250
 251                         ethernet0-port@0 {
 252                                 device_type = "network";
 253                                 compatible = "marvell,kirkwood-eth-port";
 254                                 reg = <0>;
 255                                 interrupts = <11>;
 256                                 /* overwrite MAC address in bootloader */
 257                                 local-mac-address = [00 00 00 00 00 00];
 258                                 /* set phy-handle property in board file */
 259                         };
 260                 };
 261
 262                 eth1: ethernet-controller@76000 {
 263                         compatible = "marvell,kirkwood-eth";
 264                         #address-cells = <1>;
 265                         #size-cells = <0>;
 266                         reg = <0x76000 0x4000>;
 267                         clocks = <&gate_clk 19>;
 268                         marvell,tx-checksum-limit = <1600>;
 269                         status = "disabled";
 270
 271                         ethernet1-port@0 {
 272                                 device_type = "network";
 273                                 compatible = "marvell,kirkwood-eth-port";
 274                                 reg = <0>;
 275                                 interrupts = <15>;
 276                                 /* overwrite MAC address in bootloader */
 277                                 local-mac-address = [00 00 00 00 00 00];
 278                                 /* set phy-handle property in board file */
 279                         };
 280                 };
 281         };
 282 };