arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/pinctrl/omap.h>
  14
  15 #include "skeleton.dtsi"
  16
  17 / {
  18         compatible = "ti,omap3430", "ti,omap3";
  19         interrupt-parent = <&intc>;
  20
  21         aliases {
  22                 serial0 = &uart1;
  23                 serial1 = &uart2;
  24                 serial2 = &uart3;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 cpu@0 {
  32                         compatible = "arm,cortex-a8";
  33                         device_type = "cpu";
  34                         reg = <0x0>;
  35                 };
  36         };
  37
  38         pmu {
  39                 compatible = "arm,cortex-a8-pmu";
  40                 interrupts = <3>;
  41                 ti,hwmods = "debugss";
  42         };
  43
  44         /*
  45          * The soc node represents the soc top level view. It is used for IPs
  46          * that are not memory mapped in the MPU view or for the MPU itself.
  47          */
  48         soc {
  49                 compatible = "ti,omap-infra";
  50                 mpu {
  51                         compatible = "ti,omap3-mpu";
  52                         ti,hwmods = "mpu";
  53                 };
  54
  55                 iva {
  56                         compatible = "ti,iva2.2";
  57                         ti,hwmods = "iva";
  58
  59                         dsp {
  60                                 compatible = "ti,omap3-c64";
  61                         };
  62                 };
  63         };
  64
  65         /*
  66          * XXX: Use a flat representation of the OMAP3 interconnect.
  67          * The real OMAP interconnect network is quite complex.
  68          * Since that will not bring real advantage to represent that in DT for
  69          * the moment, just use a fake OCP bus entry to represent the whole bus
  70          * hierarchy.
  71          */
  72         ocp {
  73                 compatible = "simple-bus";
  74                 #address-cells = <1>;
  75                 #size-cells = <1>;
  76                 ranges;
  77                 ti,hwmods = "l3_main";
  78
  79                 counter32k: counter@48320000 {
  80                         compatible = "ti,omap-counter32k";
  81                         reg = <0x48320000 0x20>;
  82                         ti,hwmods = "counter_32k";
  83                 };
  84
  85                 intc: interrupt-controller@48200000 {
  86                         compatible = "ti,omap2-intc";
  87                         interrupt-controller;
  88                         #interrupt-cells = <1>;
  89                         ti,intc-size = <96>;
  90                         reg = <0x48200000 0x1000>;
  91                 };
  92
  93                 sdma: dma-controller@48056000 {
  94                         compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
  95                         reg = <0x48056000 0x1000>;
  96                         interrupts = <12>,
  97                                      <13>,
  98                                      <14>,
  99                                      <15>;
 100                         #dma-cells = <1>;
 101                         #dma-channels = <32>;
 102                         #dma-requests = <96>;
 103                 };
 104
 105                 omap3_pmx_core: pinmux@48002030 {
 106                         compatible = "ti,omap3-padconf", "pinctrl-single";
 107                         reg = <0x48002030 0x05cc>;
 108                         #address-cells = <1>;
 109                         #size-cells = <0>;
 110                         #interrupt-cells = <1>;
 111                         interrupt-controller;
 112                         pinctrl-single,register-width = <16>;
 113                         pinctrl-single,function-mask = <0xff1f>;
 114                 };
 115
 116                 omap3_pmx_wkup: pinmux@0x48002a00 {
 117                         compatible = "ti,omap3-padconf", "pinctrl-single";
 118                         reg = <0x48002a00 0x5c>;
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         #interrupt-cells = <1>;
 122                         interrupt-controller;
 123                         pinctrl-single,register-width = <16>;
 124                         pinctrl-single,function-mask = <0xff1f>;
 125                 };
 126
 127                 gpio1: gpio@48310000 {
 128                         compatible = "ti,omap3-gpio";
 129                         reg = <0x48310000 0x200>;
 130                         interrupts = <29>;
 131                         ti,hwmods = "gpio1";
 132                         ti,gpio-always-on;
 133                         gpio-controller;
 134                         #gpio-cells = <2>;
 135                         interrupt-controller;
 136                         #interrupt-cells = <2>;
 137                 };
 138
 139                 gpio2: gpio@49050000 {
 140                         compatible = "ti,omap3-gpio";
 141                         reg = <0x49050000 0x200>;
 142                         interrupts = <30>;
 143                         ti,hwmods = "gpio2";
 144                         gpio-controller;
 145                         #gpio-cells = <2>;
 146                         interrupt-controller;
 147                         #interrupt-cells = <2>;
 148                 };
 149
 150                 gpio3: gpio@49052000 {
 151                         compatible = "ti,omap3-gpio";
 152                         reg = <0x49052000 0x200>;
 153                         interrupts = <31>;
 154                         ti,hwmods = "gpio3";
 155                         gpio-controller;
 156                         #gpio-cells = <2>;
 157                         interrupt-controller;
 158                         #interrupt-cells = <2>;
 159                 };
 160
 161                 gpio4: gpio@49054000 {
 162                         compatible = "ti,omap3-gpio";
 163                         reg = <0x49054000 0x200>;
 164                         interrupts = <32>;
 165                         ti,hwmods = "gpio4";
 166                         gpio-controller;
 167                         #gpio-cells = <2>;
 168                         interrupt-controller;
 169                         #interrupt-cells = <2>;
 170                 };
 171
 172                 gpio5: gpio@49056000 {
 173                         compatible = "ti,omap3-gpio";
 174                         reg = <0x49056000 0x200>;
 175                         interrupts = <33>;
 176                         ti,hwmods = "gpio5";
 177                         gpio-controller;
 178                         #gpio-cells = <2>;
 179                         interrupt-controller;
 180                         #interrupt-cells = <2>;
 181                 };
 182
 183                 gpio6: gpio@49058000 {
 184                         compatible = "ti,omap3-gpio";
 185                         reg = <0x49058000 0x200>;
 186                         interrupts = <34>;
 187                         ti,hwmods = "gpio6";
 188                         gpio-controller;
 189                         #gpio-cells = <2>;
 190                         interrupt-controller;
 191                         #interrupt-cells = <2>;
 192                 };
 193
 194                 uart1: serial@4806a000 {
 195                         compatible = "ti,omap3-uart";
 196                         ti,hwmods = "uart1";
 197                         clock-frequency = <48000000>;
 198                 };
 199
 200                 uart2: serial@4806c000 {
 201                         compatible = "ti,omap3-uart";
 202                         ti,hwmods = "uart2";
 203                         clock-frequency = <48000000>;
 204                 };
 205
 206                 uart3: serial@49020000 {
 207                         compatible = "ti,omap3-uart";
 208                         ti,hwmods = "uart3";
 209                         clock-frequency = <48000000>;
 210                 };
 211
 212                 i2c1: i2c@48070000 {
 213                         compatible = "ti,omap3-i2c";
 214                         #address-cells = <1>;
 215                         #size-cells = <0>;
 216                         ti,hwmods = "i2c1";
 217                 };
 218
 219                 i2c2: i2c@48072000 {
 220                         compatible = "ti,omap3-i2c";
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223                         ti,hwmods = "i2c2";
 224                 };
 225
 226                 i2c3: i2c@48060000 {
 227                         compatible = "ti,omap3-i2c";
 228                         #address-cells = <1>;
 229                         #size-cells = <0>;
 230                         ti,hwmods = "i2c3";
 231                 };
 232
 233                 mcspi1: spi@48098000 {
 234                         compatible = "ti,omap2-mcspi";
 235                         #address-cells = <1>;
 236                         #size-cells = <0>;
 237                         ti,hwmods = "mcspi1";
 238                         ti,spi-num-cs = <4>;
 239                         dmas = <&sdma 35>,
 240                                <&sdma 36>,
 241                                <&sdma 37>,
 242                                <&sdma 38>,
 243                                <&sdma 39>,
 244                                <&sdma 40>,
 245                                <&sdma 41>,
 246                                <&sdma 42>;
 247                         dma-names = "tx0", "rx0", "tx1", "rx1",
 248                                     "tx2", "rx2", "tx3", "rx3";
 249                 };
 250
 251                 mcspi2: spi@4809a000 {
 252                         compatible = "ti,omap2-mcspi";
 253                         #address-cells = <1>;
 254                         #size-cells = <0>;
 255                         ti,hwmods = "mcspi2";
 256                         ti,spi-num-cs = <2>;
 257                         dmas = <&sdma 43>,
 258                                <&sdma 44>,
 259                                <&sdma 45>,
 260                                <&sdma 46>;
 261                         dma-names = "tx0", "rx0", "tx1", "rx1";
 262                 };
 263
 264                 mcspi3: spi@480b8000 {
 265                         compatible = "ti,omap2-mcspi";
 266                         #address-cells = <1>;
 267                         #size-cells = <0>;
 268                         ti,hwmods = "mcspi3";
 269                         ti,spi-num-cs = <2>;
 270                         dmas = <&sdma 15>,
 271                                <&sdma 16>,
 272                                <&sdma 23>,
 273                                <&sdma 24>;
 274                         dma-names = "tx0", "rx0", "tx1", "rx1";
 275                 };
 276
 277                 mcspi4: spi@480ba000 {
 278                         compatible = "ti,omap2-mcspi";
 279                         #address-cells = <1>;
 280                         #size-cells = <0>;
 281                         ti,hwmods = "mcspi4";
 282                         ti,spi-num-cs = <1>;
 283                         dmas = <&sdma 70>, <&sdma 71>;
 284                         dma-names = "tx0", "rx0";
 285                 };
 286
 287                 mmc1: mmc@4809c000 {
 288                         compatible = "ti,omap3-hsmmc";
 289                         ti,hwmods = "mmc1";
 290                         ti,dual-volt;
 291                         dmas = <&sdma 61>, <&sdma 62>;
 292                         dma-names = "tx", "rx";
 293                 };
 294
 295                 mmc2: mmc@480b4000 {
 296                         compatible = "ti,omap3-hsmmc";
 297                         ti,hwmods = "mmc2";
 298                         dmas = <&sdma 47>, <&sdma 48>;
 299                         dma-names = "tx", "rx";
 300                 };
 301
 302                 mmc3: mmc@480ad000 {
 303                         compatible = "ti,omap3-hsmmc";
 304                         ti,hwmods = "mmc3";
 305                         dmas = <&sdma 77>, <&sdma 78>;
 306                         dma-names = "tx", "rx";
 307                 };
 308
 309                 wdt2: wdt@48314000 {
 310                         compatible = "ti,omap3-wdt";
 311                         ti,hwmods = "wd_timer2";
 312                 };
 313
 314                 mcbsp1: mcbsp@48074000 {
 315                         compatible = "ti,omap3-mcbsp";
 316                         reg = <0x48074000 0xff>;
 317                         reg-names = "mpu";
 318                         interrupts = <16>, /* OCP compliant interrupt */
 319                                      <59>, /* TX interrupt */
 320                                      <60>; /* RX interrupt */
 321                         interrupt-names = "common", "tx", "rx";
 322                         ti,buffer-size = <128>;
 323                         ti,hwmods = "mcbsp1";
 324                         dmas = <&sdma 31>,
 325                                <&sdma 32>;
 326                         dma-names = "tx", "rx";
 327                 };
 328
 329                 mcbsp2: mcbsp@49022000 {
 330                         compatible = "ti,omap3-mcbsp";
 331                         reg = <0x49022000 0xff>,
 332                               <0x49028000 0xff>;
 333                         reg-names = "mpu", "sidetone";
 334                         interrupts = <17>, /* OCP compliant interrupt */
 335                                      <62>, /* TX interrupt */
 336                                      <63>, /* RX interrupt */
 337                                      <4>;  /* Sidetone */
 338                         interrupt-names = "common", "tx", "rx", "sidetone";
 339                         ti,buffer-size = <1280>;
 340                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 341                         dmas = <&sdma 33>,
 342                                <&sdma 34>;
 343                         dma-names = "tx", "rx";
 344                 };
 345
 346                 mcbsp3: mcbsp@49024000 {
 347                         compatible = "ti,omap3-mcbsp";
 348                         reg = <0x49024000 0xff>,
 349                               <0x4902a000 0xff>;
 350                         reg-names = "mpu", "sidetone";
 351                         interrupts = <22>, /* OCP compliant interrupt */
 352                                      <89>, /* TX interrupt */
 353                                      <90>, /* RX interrupt */
 354                                      <5>;  /* Sidetone */
 355                         interrupt-names = "common", "tx", "rx", "sidetone";
 356                         ti,buffer-size = <128>;
 357                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 358                         dmas = <&sdma 17>,
 359                                <&sdma 18>;
 360                         dma-names = "tx", "rx";
 361                 };
 362
 363                 mcbsp4: mcbsp@49026000 {
 364                         compatible = "ti,omap3-mcbsp";
 365                         reg = <0x49026000 0xff>;
 366                         reg-names = "mpu";
 367                         interrupts = <23>, /* OCP compliant interrupt */
 368                                      <54>, /* TX interrupt */
 369                                      <55>; /* RX interrupt */
 370                         interrupt-names = "common", "tx", "rx";
 371                         ti,buffer-size = <128>;
 372                         ti,hwmods = "mcbsp4";
 373                         dmas = <&sdma 19>,
 374                                <&sdma 20>;
 375                         dma-names = "tx", "rx";
 376                 };
 377
 378                 mcbsp5: mcbsp@48096000 {
 379                         compatible = "ti,omap3-mcbsp";
 380                         reg = <0x48096000 0xff>;
 381                         reg-names = "mpu";
 382                         interrupts = <27>, /* OCP compliant interrupt */
 383                                      <81>, /* TX interrupt */
 384                                      <82>; /* RX interrupt */
 385                         interrupt-names = "common", "tx", "rx";
 386                         ti,buffer-size = <128>;
 387                         ti,hwmods = "mcbsp5";
 388                         dmas = <&sdma 21>,
 389                                <&sdma 22>;
 390                         dma-names = "tx", "rx";
 391                 };
 392
 393                 timer1: timer@48318000 {
 394                         compatible = "ti,omap3430-timer";
 395                         reg = <0x48318000 0x400>;
 396                         interrupts = <37>;
 397                         ti,hwmods = "timer1";
 398                         ti,timer-alwon;
 399                 };
 400
 401                 timer2: timer@49032000 {
 402                         compatible = "ti,omap3430-timer";
 403                         reg = <0x49032000 0x400>;
 404                         interrupts = <38>;
 405                         ti,hwmods = "timer2";
 406                 };
 407
 408                 timer3: timer@49034000 {
 409                         compatible = "ti,omap3430-timer";
 410                         reg = <0x49034000 0x400>;
 411                         interrupts = <39>;
 412                         ti,hwmods = "timer3";
 413                 };
 414
 415                 timer4: timer@49036000 {
 416                         compatible = "ti,omap3430-timer";
 417                         reg = <0x49036000 0x400>;
 418                         interrupts = <40>;
 419                         ti,hwmods = "timer4";
 420                 };
 421
 422                 timer5: timer@49038000 {
 423                         compatible = "ti,omap3430-timer";
 424                         reg = <0x49038000 0x400>;
 425                         interrupts = <41>;
 426                         ti,hwmods = "timer5";
 427                         ti,timer-dsp;
 428                 };
 429
 430                 timer6: timer@4903a000 {
 431                         compatible = "ti,omap3430-timer";
 432                         reg = <0x4903a000 0x400>;
 433                         interrupts = <42>;
 434                         ti,hwmods = "timer6";
 435                         ti,timer-dsp;
 436                 };
 437
 438                 timer7: timer@4903c000 {
 439                         compatible = "ti,omap3430-timer";
 440                         reg = <0x4903c000 0x400>;
 441                         interrupts = <43>;
 442                         ti,hwmods = "timer7";
 443                         ti,timer-dsp;
 444                 };
 445
 446                 timer8: timer@4903e000 {
 447                         compatible = "ti,omap3430-timer";
 448                         reg = <0x4903e000 0x400>;
 449                         interrupts = <44>;
 450                         ti,hwmods = "timer8";
 451                         ti,timer-pwm;
 452                         ti,timer-dsp;
 453                 };
 454
 455                 timer9: timer@49040000 {
 456                         compatible = "ti,omap3430-timer";
 457                         reg = <0x49040000 0x400>;
 458                         interrupts = <45>;
 459                         ti,hwmods = "timer9";
 460                         ti,timer-pwm;
 461                 };
 462
 463                 timer10: timer@48086000 {
 464                         compatible = "ti,omap3430-timer";
 465                         reg = <0x48086000 0x400>;
 466                         interrupts = <46>;
 467                         ti,hwmods = "timer10";
 468                         ti,timer-pwm;
 469                 };
 470
 471                 timer11: timer@48088000 {
 472                         compatible = "ti,omap3430-timer";
 473                         reg = <0x48088000 0x400>;
 474                         interrupts = <47>;
 475                         ti,hwmods = "timer11";
 476                         ti,timer-pwm;
 477                 };
 478
 479                 timer12: timer@48304000 {
 480                         compatible = "ti,omap3430-timer";
 481                         reg = <0x48304000 0x400>;
 482                         interrupts = <95>;
 483                         ti,hwmods = "timer12";
 484                         ti,timer-alwon;
 485                         ti,timer-secure;
 486                 };
 487
 488                 usbhstll: usbhstll@48062000 {
 489                         compatible = "ti,usbhs-tll";
 490                         reg = <0x48062000 0x1000>;
 491                         interrupts = <78>;
 492                         ti,hwmods = "usb_tll_hs";
 493                 };
 494
 495                 usbhshost: usbhshost@48064000 {
 496                         compatible = "ti,usbhs-host";
 497                         reg = <0x48064000 0x400>;
 498                         ti,hwmods = "usb_host_hs";
 499                         #address-cells = <1>;
 500                         #size-cells = <1>;
 501                         ranges;
 502
 503                         usbhsohci: ohci@48064400 {
 504                                 compatible = "ti,ohci-omap3", "usb-ohci";
 505                                 reg = <0x48064400 0x400>;
 506                                 interrupt-parent = <&intc>;
 507                                 interrupts = <76>;
 508                         };
 509
 510                         usbhsehci: ehci@48064800 {
 511                                 compatible = "ti,ehci-omap", "usb-ehci";
 512                                 reg = <0x48064800 0x400>;
 513                                 interrupt-parent = <&intc>;
 514                                 interrupts = <77>;
 515                         };
 516                 };
 517
 518                 gpmc: gpmc@6e000000 {
 519                         compatible = "ti,omap3430-gpmc";
 520                         ti,hwmods = "gpmc";
 521                         reg = <0x6e000000 0x02d0>;
 522                         interrupts = <20>;
 523                         gpmc,num-cs = <8>;
 524                         gpmc,num-waitpins = <4>;
 525                         #address-cells = <2>;
 526                         #size-cells = <1>;
 527                 };
 528
 529                 usb_otg_hs: usb_otg_hs@480ab000 {
 530                         compatible = "ti,omap3-musb";
 531                         reg = <0x480ab000 0x1000>;
 532                         interrupts = <92>, <93>;
 533                         interrupt-names = "mc", "dma";
 534                         ti,hwmods = "usb_otg_hs";
 535                         multipoint = <1>;
 536                         num-eps = <16>;
 537                         ram-bits = <12>;
 538                 };
 539         };
 540 };