2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
32 compatible = "arm,cortex-a8";
39 compatible = "arm,cortex-a8-pmu";
41 ti,hwmods = "debugss";
45 * The soc node represents the soc top level view. It is used for IPs
46 * that are not memory mapped in the MPU view or for the MPU itself.
49 compatible = "ti,omap-infra";
51 compatible = "ti,omap3-mpu";
56 compatible = "ti,iva2.2";
60 compatible = "ti,omap3-c64";
66 * XXX: Use a flat representation of the OMAP3 interconnect.
67 * The real OMAP interconnect network is quite complex.
68 * Since that will not bring real advantage to represent that in DT for
69 * the moment, just use a fake OCP bus entry to represent the whole bus
73 compatible = "simple-bus";
77 ti,hwmods = "l3_main";
79 counter32k: counter@48320000 {
80 compatible = "ti,omap-counter32k";
81 reg = <0x48320000 0x20>;
82 ti,hwmods = "counter_32k";
85 intc: interrupt-controller@48200000 {
86 compatible = "ti,omap2-intc";
88 #interrupt-cells = <1>;
90 reg = <0x48200000 0x1000>;
93 sdma: dma-controller@48056000 {
94 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
95 reg = <0x48056000 0x1000>;
101 #dma-channels = <32>;
102 #dma-requests = <96>;
105 omap3_pmx_core: pinmux@48002030 {
106 compatible = "ti,omap3-padconf", "pinctrl-single";
107 reg = <0x48002030 0x05cc>;
108 #address-cells = <1>;
110 #interrupt-cells = <1>;
111 interrupt-controller;
112 pinctrl-single,register-width = <16>;
113 pinctrl-single,function-mask = <0x7f1f>;
116 omap3_pmx_wkup: pinmux@48002a00 {
117 compatible = "ti,omap3-padconf", "pinctrl-single";
118 reg = <0x48002a00 0x5c>;
119 #address-cells = <1>;
121 #interrupt-cells = <1>;
122 interrupt-controller;
123 pinctrl-single,register-width = <16>;
124 pinctrl-single,function-mask = <0x7f1f>;
127 gpio1: gpio@48310000 {
128 compatible = "ti,omap3-gpio";
129 reg = <0x48310000 0x200>;
135 interrupt-controller;
136 #interrupt-cells = <2>;
139 gpio2: gpio@49050000 {
140 compatible = "ti,omap3-gpio";
141 reg = <0x49050000 0x200>;
146 interrupt-controller;
147 #interrupt-cells = <2>;
150 gpio3: gpio@49052000 {
151 compatible = "ti,omap3-gpio";
152 reg = <0x49052000 0x200>;
157 interrupt-controller;
158 #interrupt-cells = <2>;
161 gpio4: gpio@49054000 {
162 compatible = "ti,omap3-gpio";
163 reg = <0x49054000 0x200>;
168 interrupt-controller;
169 #interrupt-cells = <2>;
172 gpio5: gpio@49056000 {
173 compatible = "ti,omap3-gpio";
174 reg = <0x49056000 0x200>;
179 interrupt-controller;
180 #interrupt-cells = <2>;
183 gpio6: gpio@49058000 {
184 compatible = "ti,omap3-gpio";
185 reg = <0x49058000 0x200>;
190 interrupt-controller;
191 #interrupt-cells = <2>;
194 uart1: serial@4806a000 {
195 compatible = "ti,omap3-uart";
197 clock-frequency = <48000000>;
200 uart2: serial@4806c000 {
201 compatible = "ti,omap3-uart";
203 clock-frequency = <48000000>;
206 uart3: serial@49020000 {
207 compatible = "ti,omap3-uart";
209 clock-frequency = <48000000>;
213 compatible = "ti,omap3-i2c";
214 #address-cells = <1>;
220 compatible = "ti,omap3-i2c";
221 #address-cells = <1>;
227 compatible = "ti,omap3-i2c";
228 #address-cells = <1>;
233 mcspi1: spi@48098000 {
234 compatible = "ti,omap2-mcspi";
235 #address-cells = <1>;
237 ti,hwmods = "mcspi1";
247 dma-names = "tx0", "rx0", "tx1", "rx1",
248 "tx2", "rx2", "tx3", "rx3";
251 mcspi2: spi@4809a000 {
252 compatible = "ti,omap2-mcspi";
253 #address-cells = <1>;
255 ti,hwmods = "mcspi2";
261 dma-names = "tx0", "rx0", "tx1", "rx1";
264 mcspi3: spi@480b8000 {
265 compatible = "ti,omap2-mcspi";
266 #address-cells = <1>;
268 ti,hwmods = "mcspi3";
274 dma-names = "tx0", "rx0", "tx1", "rx1";
277 mcspi4: spi@480ba000 {
278 compatible = "ti,omap2-mcspi";
279 #address-cells = <1>;
281 ti,hwmods = "mcspi4";
283 dmas = <&sdma 70>, <&sdma 71>;
284 dma-names = "tx0", "rx0";
288 compatible = "ti,omap3-hsmmc";
291 dmas = <&sdma 61>, <&sdma 62>;
292 dma-names = "tx", "rx";
296 compatible = "ti,omap3-hsmmc";
298 dmas = <&sdma 47>, <&sdma 48>;
299 dma-names = "tx", "rx";
303 compatible = "ti,omap3-hsmmc";
305 dmas = <&sdma 77>, <&sdma 78>;
306 dma-names = "tx", "rx";
310 compatible = "ti,omap3-wdt";
311 ti,hwmods = "wd_timer2";
314 mcbsp1: mcbsp@48074000 {
315 compatible = "ti,omap3-mcbsp";
316 reg = <0x48074000 0xff>;
318 interrupts = <16>, /* OCP compliant interrupt */
319 <59>, /* TX interrupt */
320 <60>; /* RX interrupt */
321 interrupt-names = "common", "tx", "rx";
322 ti,buffer-size = <128>;
323 ti,hwmods = "mcbsp1";
326 dma-names = "tx", "rx";
329 mcbsp2: mcbsp@49022000 {
330 compatible = "ti,omap3-mcbsp";
331 reg = <0x49022000 0xff>,
333 reg-names = "mpu", "sidetone";
334 interrupts = <17>, /* OCP compliant interrupt */
335 <62>, /* TX interrupt */
336 <63>, /* RX interrupt */
338 interrupt-names = "common", "tx", "rx", "sidetone";
339 ti,buffer-size = <1280>;
340 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
343 dma-names = "tx", "rx";
346 mcbsp3: mcbsp@49024000 {
347 compatible = "ti,omap3-mcbsp";
348 reg = <0x49024000 0xff>,
350 reg-names = "mpu", "sidetone";
351 interrupts = <22>, /* OCP compliant interrupt */
352 <89>, /* TX interrupt */
353 <90>, /* RX interrupt */
355 interrupt-names = "common", "tx", "rx", "sidetone";
356 ti,buffer-size = <128>;
357 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
360 dma-names = "tx", "rx";
363 mcbsp4: mcbsp@49026000 {
364 compatible = "ti,omap3-mcbsp";
365 reg = <0x49026000 0xff>;
367 interrupts = <23>, /* OCP compliant interrupt */
368 <54>, /* TX interrupt */
369 <55>; /* RX interrupt */
370 interrupt-names = "common", "tx", "rx";
371 ti,buffer-size = <128>;
372 ti,hwmods = "mcbsp4";
375 dma-names = "tx", "rx";
378 mcbsp5: mcbsp@48096000 {
379 compatible = "ti,omap3-mcbsp";
380 reg = <0x48096000 0xff>;
382 interrupts = <27>, /* OCP compliant interrupt */
383 <81>, /* TX interrupt */
384 <82>; /* RX interrupt */
385 interrupt-names = "common", "tx", "rx";
386 ti,buffer-size = <128>;
387 ti,hwmods = "mcbsp5";
390 dma-names = "tx", "rx";
393 timer1: timer@48318000 {
394 compatible = "ti,omap3430-timer";
395 reg = <0x48318000 0x400>;
397 ti,hwmods = "timer1";
401 timer2: timer@49032000 {
402 compatible = "ti,omap3430-timer";
403 reg = <0x49032000 0x400>;
405 ti,hwmods = "timer2";
408 timer3: timer@49034000 {
409 compatible = "ti,omap3430-timer";
410 reg = <0x49034000 0x400>;
412 ti,hwmods = "timer3";
415 timer4: timer@49036000 {
416 compatible = "ti,omap3430-timer";
417 reg = <0x49036000 0x400>;
419 ti,hwmods = "timer4";
422 timer5: timer@49038000 {
423 compatible = "ti,omap3430-timer";
424 reg = <0x49038000 0x400>;
426 ti,hwmods = "timer5";
430 timer6: timer@4903a000 {
431 compatible = "ti,omap3430-timer";
432 reg = <0x4903a000 0x400>;
434 ti,hwmods = "timer6";
438 timer7: timer@4903c000 {
439 compatible = "ti,omap3430-timer";
440 reg = <0x4903c000 0x400>;
442 ti,hwmods = "timer7";
446 timer8: timer@4903e000 {
447 compatible = "ti,omap3430-timer";
448 reg = <0x4903e000 0x400>;
450 ti,hwmods = "timer8";
455 timer9: timer@49040000 {
456 compatible = "ti,omap3430-timer";
457 reg = <0x49040000 0x400>;
459 ti,hwmods = "timer9";
463 timer10: timer@48086000 {
464 compatible = "ti,omap3430-timer";
465 reg = <0x48086000 0x400>;
467 ti,hwmods = "timer10";
471 timer11: timer@48088000 {
472 compatible = "ti,omap3430-timer";
473 reg = <0x48088000 0x400>;
475 ti,hwmods = "timer11";
479 timer12: timer@48304000 {
480 compatible = "ti,omap3430-timer";
481 reg = <0x48304000 0x400>;
483 ti,hwmods = "timer12";
488 usbhstll: usbhstll@48062000 {
489 compatible = "ti,usbhs-tll";
490 reg = <0x48062000 0x1000>;
492 ti,hwmods = "usb_tll_hs";
495 usbhshost: usbhshost@48064000 {
496 compatible = "ti,usbhs-host";
497 reg = <0x48064000 0x400>;
498 ti,hwmods = "usb_host_hs";
499 #address-cells = <1>;
503 usbhsohci: ohci@48064400 {
504 compatible = "ti,ohci-omap3", "usb-ohci";
505 reg = <0x48064400 0x400>;
506 interrupt-parent = <&intc>;
510 usbhsehci: ehci@48064800 {
511 compatible = "ti,ehci-omap", "usb-ehci";
512 reg = <0x48064800 0x400>;
513 interrupt-parent = <&intc>;
518 gpmc: gpmc@6e000000 {
519 compatible = "ti,omap3430-gpmc";
521 reg = <0x6e000000 0x02d0>;
524 gpmc,num-waitpins = <4>;
525 #address-cells = <2>;
529 usb_otg_hs: usb_otg_hs@480ab000 {
530 compatible = "ti,omap3-musb";
531 reg = <0x480ab000 0x1000>;
532 interrupts = <92>, <93>;
533 interrupt-names = "mc", "dma";
534 ti,hwmods = "usb_otg_hs";