2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
35 compatible = "arm,cortex-a8";
42 clock-latency = <300000>; /* From omap-cpufreq driver */
47 compatible = "arm,cortex-a8-pmu";
48 reg = <0x54000000 0x800000>;
50 ti,hwmods = "debugss";
54 * The soc node represents the soc top level view. It is used for IPs
55 * that are not memory mapped in the MPU view or for the MPU itself.
58 compatible = "ti,omap-infra";
60 compatible = "ti,omap3-mpu";
65 compatible = "ti,iva2.2";
69 compatible = "ti,omap3-c64";
75 * XXX: Use a flat representation of the OMAP3 interconnect.
76 * The real OMAP interconnect network is quite complex.
77 * Since that will not bring real advantage to represent that in DT for
78 * the moment, just use a fake OCP bus entry to represent the whole bus
82 compatible = "simple-bus";
83 reg = <0x68000000 0x10000>;
88 ti,hwmods = "l3_main";
91 compatible = "ti,omap3-aes";
93 reg = <0x480c5000 0x50>;
98 compatible = "ti,omap3-prm";
99 reg = <0x48306000 0x4000>;
102 #address-cells = <1>;
106 prm_clockdomains: clockdomains {
111 compatible = "ti,omap3-cm";
112 reg = <0x48004000 0x4000>;
115 #address-cells = <1>;
119 cm_clockdomains: clockdomains {
123 scrm: scrm@48002000 {
124 compatible = "ti,omap3-scrm";
125 reg = <0x48002000 0x2000>;
127 scrm_clocks: clocks {
128 #address-cells = <1>;
132 scrm_clockdomains: clockdomains {
136 counter32k: counter@48320000 {
137 compatible = "ti,omap-counter32k";
138 reg = <0x48320000 0x20>;
139 ti,hwmods = "counter_32k";
142 intc: interrupt-controller@48200000 {
143 compatible = "ti,omap2-intc";
144 interrupt-controller;
145 #interrupt-cells = <1>;
147 reg = <0x48200000 0x1000>;
150 sdma: dma-controller@48056000 {
151 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
152 reg = <0x48056000 0x1000>;
158 #dma-channels = <32>;
159 #dma-requests = <96>;
162 omap3_pmx_core: pinmux@48002030 {
163 compatible = "ti,omap3-padconf", "pinctrl-single";
164 reg = <0x48002030 0x0238>;
165 #address-cells = <1>;
167 #interrupt-cells = <1>;
168 interrupt-controller;
169 pinctrl-single,register-width = <16>;
170 pinctrl-single,function-mask = <0xff1f>;
173 omap3_pmx_wkup: pinmux@48002a00 {
174 compatible = "ti,omap3-padconf", "pinctrl-single";
175 reg = <0x48002a00 0x5c>;
176 #address-cells = <1>;
178 #interrupt-cells = <1>;
179 interrupt-controller;
180 pinctrl-single,register-width = <16>;
181 pinctrl-single,function-mask = <0xff1f>;
184 gpio1: gpio@48310000 {
185 compatible = "ti,omap3-gpio";
186 reg = <0x48310000 0x200>;
192 interrupt-controller;
193 #interrupt-cells = <2>;
196 gpio2: gpio@49050000 {
197 compatible = "ti,omap3-gpio";
198 reg = <0x49050000 0x200>;
203 interrupt-controller;
204 #interrupt-cells = <2>;
207 gpio3: gpio@49052000 {
208 compatible = "ti,omap3-gpio";
209 reg = <0x49052000 0x200>;
214 interrupt-controller;
215 #interrupt-cells = <2>;
218 gpio4: gpio@49054000 {
219 compatible = "ti,omap3-gpio";
220 reg = <0x49054000 0x200>;
225 interrupt-controller;
226 #interrupt-cells = <2>;
229 gpio5: gpio@49056000 {
230 compatible = "ti,omap3-gpio";
231 reg = <0x49056000 0x200>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
240 gpio6: gpio@49058000 {
241 compatible = "ti,omap3-gpio";
242 reg = <0x49058000 0x200>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
251 uart1: serial@4806a000 {
252 compatible = "ti,omap3-uart";
253 reg = <0x4806a000 0x2000>;
255 dmas = <&sdma 49 &sdma 50>;
256 dma-names = "tx", "rx";
258 clock-frequency = <48000000>;
261 uart2: serial@4806c000 {
262 compatible = "ti,omap3-uart";
263 reg = <0x4806c000 0x400>;
265 dmas = <&sdma 51 &sdma 52>;
266 dma-names = "tx", "rx";
268 clock-frequency = <48000000>;
271 uart3: serial@49020000 {
272 compatible = "ti,omap3-uart";
273 reg = <0x49020000 0x400>;
275 dmas = <&sdma 53 &sdma 54>;
276 dma-names = "tx", "rx";
278 clock-frequency = <48000000>;
282 compatible = "ti,omap3-i2c";
283 reg = <0x48070000 0x80>;
285 dmas = <&sdma 27 &sdma 28>;
286 dma-names = "tx", "rx";
287 #address-cells = <1>;
293 compatible = "ti,omap3-i2c";
294 reg = <0x48072000 0x80>;
296 dmas = <&sdma 29 &sdma 30>;
297 dma-names = "tx", "rx";
298 #address-cells = <1>;
304 compatible = "ti,omap3-i2c";
305 reg = <0x48060000 0x80>;
307 dmas = <&sdma 25 &sdma 26>;
308 dma-names = "tx", "rx";
309 #address-cells = <1>;
314 mailbox: mailbox@48094000 {
315 compatible = "ti,omap3-mailbox";
316 ti,hwmods = "mailbox";
317 reg = <0x48094000 0x200>;
321 mcspi1: spi@48098000 {
322 compatible = "ti,omap2-mcspi";
323 reg = <0x48098000 0x100>;
325 #address-cells = <1>;
327 ti,hwmods = "mcspi1";
337 dma-names = "tx0", "rx0", "tx1", "rx1",
338 "tx2", "rx2", "tx3", "rx3";
341 mcspi2: spi@4809a000 {
342 compatible = "ti,omap2-mcspi";
343 reg = <0x4809a000 0x100>;
345 #address-cells = <1>;
347 ti,hwmods = "mcspi2";
353 dma-names = "tx0", "rx0", "tx1", "rx1";
356 mcspi3: spi@480b8000 {
357 compatible = "ti,omap2-mcspi";
358 reg = <0x480b8000 0x100>;
360 #address-cells = <1>;
362 ti,hwmods = "mcspi3";
368 dma-names = "tx0", "rx0", "tx1", "rx1";
371 mcspi4: spi@480ba000 {
372 compatible = "ti,omap2-mcspi";
373 reg = <0x480ba000 0x100>;
375 #address-cells = <1>;
377 ti,hwmods = "mcspi4";
379 dmas = <&sdma 70>, <&sdma 71>;
380 dma-names = "tx0", "rx0";
383 hdqw1w: 1w@480b2000 {
384 compatible = "ti,omap3-1w";
385 reg = <0x480b2000 0x1000>;
391 compatible = "ti,omap3-hsmmc";
392 reg = <0x4809c000 0x200>;
396 dmas = <&sdma 61>, <&sdma 62>;
397 dma-names = "tx", "rx";
401 compatible = "ti,omap3-hsmmc";
402 reg = <0x480b4000 0x200>;
405 dmas = <&sdma 47>, <&sdma 48>;
406 dma-names = "tx", "rx";
410 compatible = "ti,omap3-hsmmc";
411 reg = <0x480ad000 0x200>;
414 dmas = <&sdma 77>, <&sdma 78>;
415 dma-names = "tx", "rx";
418 mmu_isp: mmu@480bd400 {
419 compatible = "ti,omap2-iommu";
420 reg = <0x480bd400 0x80>;
422 ti,hwmods = "mmu_isp";
423 ti,#tlb-entries = <8>;
426 mmu_iva: mmu@5d000000 {
427 compatible = "ti,omap2-iommu";
428 reg = <0x5d000000 0x80>;
430 ti,hwmods = "mmu_iva";
435 compatible = "ti,omap3-wdt";
436 reg = <0x48314000 0x80>;
437 ti,hwmods = "wd_timer2";
440 mcbsp1: mcbsp@48074000 {
441 compatible = "ti,omap3-mcbsp";
442 reg = <0x48074000 0xff>;
444 interrupts = <16>, /* OCP compliant interrupt */
445 <59>, /* TX interrupt */
446 <60>; /* RX interrupt */
447 interrupt-names = "common", "tx", "rx";
448 ti,buffer-size = <128>;
449 ti,hwmods = "mcbsp1";
452 dma-names = "tx", "rx";
456 mcbsp2: mcbsp@49022000 {
457 compatible = "ti,omap3-mcbsp";
458 reg = <0x49022000 0xff>,
460 reg-names = "mpu", "sidetone";
461 interrupts = <17>, /* OCP compliant interrupt */
462 <62>, /* TX interrupt */
463 <63>, /* RX interrupt */
465 interrupt-names = "common", "tx", "rx", "sidetone";
466 ti,buffer-size = <1280>;
467 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
470 dma-names = "tx", "rx";
474 mcbsp3: mcbsp@49024000 {
475 compatible = "ti,omap3-mcbsp";
476 reg = <0x49024000 0xff>,
478 reg-names = "mpu", "sidetone";
479 interrupts = <22>, /* OCP compliant interrupt */
480 <89>, /* TX interrupt */
481 <90>, /* RX interrupt */
483 interrupt-names = "common", "tx", "rx", "sidetone";
484 ti,buffer-size = <128>;
485 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
488 dma-names = "tx", "rx";
492 mcbsp4: mcbsp@49026000 {
493 compatible = "ti,omap3-mcbsp";
494 reg = <0x49026000 0xff>;
496 interrupts = <23>, /* OCP compliant interrupt */
497 <54>, /* TX interrupt */
498 <55>; /* RX interrupt */
499 interrupt-names = "common", "tx", "rx";
500 ti,buffer-size = <128>;
501 ti,hwmods = "mcbsp4";
504 dma-names = "tx", "rx";
508 mcbsp5: mcbsp@48096000 {
509 compatible = "ti,omap3-mcbsp";
510 reg = <0x48096000 0xff>;
512 interrupts = <27>, /* OCP compliant interrupt */
513 <81>, /* TX interrupt */
514 <82>; /* RX interrupt */
515 interrupt-names = "common", "tx", "rx";
516 ti,buffer-size = <128>;
517 ti,hwmods = "mcbsp5";
520 dma-names = "tx", "rx";
524 sham: sham@480c3000 {
525 compatible = "ti,omap3-sham";
527 reg = <0x480c3000 0x64>;
531 smartreflex_core: smartreflex@480cb000 {
532 compatible = "ti,omap3-smartreflex-core";
533 ti,hwmods = "smartreflex_core";
534 reg = <0x480cb000 0x400>;
538 smartreflex_mpu_iva: smartreflex@480c9000 {
539 compatible = "ti,omap3-smartreflex-iva";
540 ti,hwmods = "smartreflex_mpu_iva";
541 reg = <0x480c9000 0x400>;
545 timer1: timer@48318000 {
546 compatible = "ti,omap3430-timer";
547 reg = <0x48318000 0x400>;
549 ti,hwmods = "timer1";
553 timer2: timer@49032000 {
554 compatible = "ti,omap3430-timer";
555 reg = <0x49032000 0x400>;
557 ti,hwmods = "timer2";
560 timer3: timer@49034000 {
561 compatible = "ti,omap3430-timer";
562 reg = <0x49034000 0x400>;
564 ti,hwmods = "timer3";
567 timer4: timer@49036000 {
568 compatible = "ti,omap3430-timer";
569 reg = <0x49036000 0x400>;
571 ti,hwmods = "timer4";
574 timer5: timer@49038000 {
575 compatible = "ti,omap3430-timer";
576 reg = <0x49038000 0x400>;
578 ti,hwmods = "timer5";
582 timer6: timer@4903a000 {
583 compatible = "ti,omap3430-timer";
584 reg = <0x4903a000 0x400>;
586 ti,hwmods = "timer6";
590 timer7: timer@4903c000 {
591 compatible = "ti,omap3430-timer";
592 reg = <0x4903c000 0x400>;
594 ti,hwmods = "timer7";
598 timer8: timer@4903e000 {
599 compatible = "ti,omap3430-timer";
600 reg = <0x4903e000 0x400>;
602 ti,hwmods = "timer8";
607 timer9: timer@49040000 {
608 compatible = "ti,omap3430-timer";
609 reg = <0x49040000 0x400>;
611 ti,hwmods = "timer9";
615 timer10: timer@48086000 {
616 compatible = "ti,omap3430-timer";
617 reg = <0x48086000 0x400>;
619 ti,hwmods = "timer10";
623 timer11: timer@48088000 {
624 compatible = "ti,omap3430-timer";
625 reg = <0x48088000 0x400>;
627 ti,hwmods = "timer11";
631 timer12: timer@48304000 {
632 compatible = "ti,omap3430-timer";
633 reg = <0x48304000 0x400>;
635 ti,hwmods = "timer12";
640 usbhstll: usbhstll@48062000 {
641 compatible = "ti,usbhs-tll";
642 reg = <0x48062000 0x1000>;
644 ti,hwmods = "usb_tll_hs";
647 usbhshost: usbhshost@48064000 {
648 compatible = "ti,usbhs-host";
649 reg = <0x48064000 0x400>;
650 ti,hwmods = "usb_host_hs";
651 #address-cells = <1>;
655 usbhsohci: ohci@48064400 {
656 compatible = "ti,ohci-omap3";
657 reg = <0x48064400 0x400>;
658 interrupt-parent = <&intc>;
662 usbhsehci: ehci@48064800 {
663 compatible = "ti,ehci-omap";
664 reg = <0x48064800 0x400>;
665 interrupt-parent = <&intc>;
670 gpmc: gpmc@6e000000 {
671 compatible = "ti,omap3430-gpmc";
673 reg = <0x6e000000 0x02d0>;
676 gpmc,num-waitpins = <4>;
677 #address-cells = <2>;
681 usb_otg_hs: usb_otg_hs@480ab000 {
682 compatible = "ti,omap3-musb";
683 reg = <0x480ab000 0x1000>;
684 interrupts = <92>, <93>;
685 interrupt-names = "mc", "dma";
686 ti,hwmods = "usb_otg_hs";
694 /include/ "omap3xxx-clocks.dtsi"