arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         compatible = "ti,omap3430", "ti,omap3";
  15         interrupt-parent = <&intc>;
  16
  17         aliases {
  18                 serial0 = &uart1;
  19                 serial1 = &uart2;
  20                 serial2 = &uart3;
  21         };
  22
  23         cpus {
  24                 cpu@0 {
  25                         compatible = "arm,cortex-a8";
  26                 };
  27         };
  28
  29         /*
  30          * The soc node represents the soc top level view. It is uses for IPs
  31          * that are not memory mapped in the MPU view or for the MPU itself.
  32          */
  33         soc {
  34                 compatible = "ti,omap-infra";
  35                 mpu {
  36                         compatible = "ti,omap3-mpu";
  37                         ti,hwmods = "mpu";
  38                 };
  39
  40                 iva {
  41                         compatible = "ti,iva2.2";
  42                         ti,hwmods = "iva";
  43
  44                         dsp {
  45                                 compatible = "ti,omap3-c64";
  46                         };
  47                 };
  48         };
  49
  50         /*
  51          * XXX: Use a flat representation of the OMAP3 interconnect.
  52          * The real OMAP interconnect network is quite complex.
  53          * Since that will not bring real advantage to represent that in DT for
  54          * the moment, just use a fake OCP bus entry to represent the whole bus
  55          * hierarchy.
  56          */
  57         ocp {
  58                 compatible = "simple-bus";
  59                 #address-cells = <1>;
  60                 #size-cells = <1>;
  61                 ranges;
  62                 ti,hwmods = "l3_main";
  63
  64                 counter32k: counter@48320000 {
  65                         compatible = "ti,omap-counter32k";
  66                         reg = <0x48320000 0x20>;
  67                         ti,hwmods = "counter_32k";
  68                 };
  69
  70                 intc: interrupt-controller@48200000 {
  71                         compatible = "ti,omap2-intc";
  72                         interrupt-controller;
  73                         #interrupt-cells = <1>;
  74                         ti,intc-size = <96>;
  75                         reg = <0x48200000 0x1000>;
  76                 };
  77
  78                 omap3_pmx_core: pinmux@48002030 {
  79                         compatible = "ti,omap3-padconf", "pinctrl-single";
  80                         reg = <0x48002030 0x05cc>;
  81                         #address-cells = <1>;
  82                         #size-cells = <0>;
  83                         pinctrl-single,register-width = <16>;
  84                         pinctrl-single,function-mask = <0x7fff>;
  85                 };
  86
  87                 omap3_pmx_wkup: pinmux@0x48002a58 {
  88                         compatible = "ti,omap3-padconf", "pinctrl-single";
  89                         reg = <0x48002a58 0x5c>;
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92                         pinctrl-single,register-width = <16>;
  93                         pinctrl-single,function-mask = <0x7fff>;
  94                 };
  95
  96                 gpio1: gpio@48310000 {
  97                         compatible = "ti,omap3-gpio";
  98                         ti,hwmods = "gpio1";
  99                         gpio-controller;
 100                         #gpio-cells = <2>;
 101                         interrupt-controller;
 102                         #interrupt-cells = <1>;
 103                 };
 104
 105                 gpio2: gpio@49050000 {
 106                         compatible = "ti,omap3-gpio";
 107                         ti,hwmods = "gpio2";
 108                         gpio-controller;
 109                         #gpio-cells = <2>;
 110                         interrupt-controller;
 111                         #interrupt-cells = <1>;
 112                 };
 113
 114                 gpio3: gpio@49052000 {
 115                         compatible = "ti,omap3-gpio";
 116                         ti,hwmods = "gpio3";
 117                         gpio-controller;
 118                         #gpio-cells = <2>;
 119                         interrupt-controller;
 120                         #interrupt-cells = <1>;
 121                 };
 122
 123                 gpio4: gpio@49054000 {
 124                         compatible = "ti,omap3-gpio";
 125                         ti,hwmods = "gpio4";
 126                         gpio-controller;
 127                         #gpio-cells = <2>;
 128                         interrupt-controller;
 129                         #interrupt-cells = <1>;
 130                 };
 131
 132                 gpio5: gpio@49056000 {
 133                         compatible = "ti,omap3-gpio";
 134                         ti,hwmods = "gpio5";
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137                         interrupt-controller;
 138                         #interrupt-cells = <1>;
 139                 };
 140
 141                 gpio6: gpio@49058000 {
 142                         compatible = "ti,omap3-gpio";
 143                         ti,hwmods = "gpio6";
 144                         gpio-controller;
 145                         #gpio-cells = <2>;
 146                         interrupt-controller;
 147                         #interrupt-cells = <1>;
 148                 };
 149
 150                 uart1: serial@4806a000 {
 151                         compatible = "ti,omap3-uart";
 152                         ti,hwmods = "uart1";
 153                         clock-frequency = <48000000>;
 154                 };
 155
 156                 uart2: serial@4806c000 {
 157                         compatible = "ti,omap3-uart";
 158                         ti,hwmods = "uart2";
 159                         clock-frequency = <48000000>;
 160                 };
 161
 162                 uart3: serial@49020000 {
 163                         compatible = "ti,omap3-uart";
 164                         ti,hwmods = "uart3";
 165                         clock-frequency = <48000000>;
 166                 };
 167
 168                 i2c1: i2c@48070000 {
 169                         compatible = "ti,omap3-i2c";
 170                         #address-cells = <1>;
 171                         #size-cells = <0>;
 172                         ti,hwmods = "i2c1";
 173                 };
 174
 175                 i2c2: i2c@48072000 {
 176                         compatible = "ti,omap3-i2c";
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179                         ti,hwmods = "i2c2";
 180                 };
 181
 182                 i2c3: i2c@48060000 {
 183                         compatible = "ti,omap3-i2c";
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186                         ti,hwmods = "i2c3";
 187                 };
 188
 189                 mcspi1: spi@48098000 {
 190                         compatible = "ti,omap2-mcspi";
 191                         #address-cells = <1>;
 192                         #size-cells = <0>;
 193                         ti,hwmods = "mcspi1";
 194                         ti,spi-num-cs = <4>;
 195                 };
 196
 197                 mcspi2: spi@4809a000 {
 198                         compatible = "ti,omap2-mcspi";
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                         ti,hwmods = "mcspi2";
 202                         ti,spi-num-cs = <2>;
 203                 };
 204
 205                 mcspi3: spi@480b8000 {
 206                         compatible = "ti,omap2-mcspi";
 207                         #address-cells = <1>;
 208                         #size-cells = <0>;
 209                         ti,hwmods = "mcspi3";
 210                         ti,spi-num-cs = <2>;
 211                 };
 212
 213                 mcspi4: spi@480ba000 {
 214                         compatible = "ti,omap2-mcspi";
 215                         #address-cells = <1>;
 216                         #size-cells = <0>;
 217                         ti,hwmods = "mcspi4";
 218                         ti,spi-num-cs = <1>;
 219                 };
 220
 221                 mmc1: mmc@4809c000 {
 222                         compatible = "ti,omap3-hsmmc";
 223                         ti,hwmods = "mmc1";
 224                         ti,dual-volt;
 225                 };
 226
 227                 mmc2: mmc@480b4000 {
 228                         compatible = "ti,omap3-hsmmc";
 229                         ti,hwmods = "mmc2";
 230                 };
 231
 232                 mmc3: mmc@480ad000 {
 233                         compatible = "ti,omap3-hsmmc";
 234                         ti,hwmods = "mmc3";
 235                 };
 236
 237                 wdt2: wdt@48314000 {
 238                         compatible = "ti,omap3-wdt";
 239                         ti,hwmods = "wd_timer2";
 240                 };
 241
 242                 mcbsp1: mcbsp@48074000 {
 243                         compatible = "ti,omap3-mcbsp";
 244                         reg = <0x48074000 0xff>;
 245                         reg-names = "mpu";
 246                         interrupts = <16>, /* OCP compliant interrupt */
 247                                      <59>, /* TX interrupt */
 248                                      <60>; /* RX interrupt */
 249                         interrupt-names = "common", "tx", "rx";
 250                         ti,buffer-size = <128>;
 251                         ti,hwmods = "mcbsp1";
 252                 };
 253
 254                 mcbsp2: mcbsp@49022000 {
 255                         compatible = "ti,omap3-mcbsp";
 256                         reg = <0x49022000 0xff>,
 257                               <0x49028000 0xff>;
 258                         reg-names = "mpu", "sidetone";
 259                         interrupts = <17>, /* OCP compliant interrupt */
 260                                      <62>, /* TX interrupt */
 261                                      <63>, /* RX interrupt */
 262                                      <4>;  /* Sidetone */
 263                         interrupt-names = "common", "tx", "rx", "sidetone";
 264                         ti,buffer-size = <1280>;
 265                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 266                 };
 267
 268                 mcbsp3: mcbsp@49024000 {
 269                         compatible = "ti,omap3-mcbsp";
 270                         reg = <0x49024000 0xff>,
 271                               <0x4902a000 0xff>;
 272                         reg-names = "mpu", "sidetone";
 273                         interrupts = <22>, /* OCP compliant interrupt */
 274                                      <89>, /* TX interrupt */
 275                                      <90>, /* RX interrupt */
 276                                      <5>;  /* Sidetone */
 277                         interrupt-names = "common", "tx", "rx", "sidetone";
 278                         ti,buffer-size = <128>;
 279                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 280                 };
 281
 282                 mcbsp4: mcbsp@49026000 {
 283                         compatible = "ti,omap3-mcbsp";
 284                         reg = <0x49026000 0xff>;
 285                         reg-names = "mpu";
 286                         interrupts = <23>, /* OCP compliant interrupt */
 287                                      <54>, /* TX interrupt */
 288                                      <55>; /* RX interrupt */
 289                         interrupt-names = "common", "tx", "rx";
 290                         ti,buffer-size = <128>;
 291                         ti,hwmods = "mcbsp4";
 292                 };
 293
 294                 mcbsp5: mcbsp@48096000 {
 295                         compatible = "ti,omap3-mcbsp";
 296                         reg = <0x48096000 0xff>;
 297                         reg-names = "mpu";
 298                         interrupts = <27>, /* OCP compliant interrupt */
 299                                      <81>, /* TX interrupt */
 300                                      <82>; /* RX interrupt */
 301                         interrupt-names = "common", "tx", "rx";
 302                         ti,buffer-size = <128>;
 303                         ti,hwmods = "mcbsp5";
 304                 };
 305
 306                 timer1: timer@48318000 {
 307                         compatible = "ti,omap2-timer";
 308                         reg = <0x48318000 0x400>;
 309                         interrupts = <37>;
 310                         ti,hwmods = "timer1";
 311                         ti,timer-alwon;
 312                 };
 313
 314                 timer2: timer@49032000 {
 315                         compatible = "ti,omap2-timer";
 316                         reg = <0x49032000 0x400>;
 317                         interrupts = <38>;
 318                         ti,hwmods = "timer2";
 319                 };
 320
 321                 timer3: timer@49034000 {
 322                         compatible = "ti,omap2-timer";
 323                         reg = <0x49034000 0x400>;
 324                         interrupts = <39>;
 325                         ti,hwmods = "timer3";
 326                 };
 327
 328                 timer4: timer@49036000 {
 329                         compatible = "ti,omap2-timer";
 330                         reg = <0x49036000 0x400>;
 331                         interrupts = <40>;
 332                         ti,hwmods = "timer4";
 333                 };
 334
 335                 timer5: timer@49038000 {
 336                         compatible = "ti,omap2-timer";
 337                         reg = <0x49038000 0x400>;
 338                         interrupts = <41>;
 339                         ti,hwmods = "timer5";
 340                         ti,timer-dsp;
 341                 };
 342
 343                 timer6: timer@4903a000 {
 344                         compatible = "ti,omap2-timer";
 345                         reg = <0x4903a000 0x400>;
 346                         interrupts = <42>;
 347                         ti,hwmods = "timer6";
 348                         ti,timer-dsp;
 349                 };
 350
 351                 timer7: timer@4903c000 {
 352                         compatible = "ti,omap2-timer";
 353                         reg = <0x4903c000 0x400>;
 354                         interrupts = <43>;
 355                         ti,hwmods = "timer7";
 356                         ti,timer-dsp;
 357                 };
 358
 359                 timer8: timer@4903e000 {
 360                         compatible = "ti,omap2-timer";
 361                         reg = <0x4903e000 0x400>;
 362                         interrupts = <44>;
 363                         ti,hwmods = "timer8";
 364                         ti,timer-pwm;
 365                         ti,timer-dsp;
 366                 };
 367
 368                 timer9: timer@49040000 {
 369                         compatible = "ti,omap2-timer";
 370                         reg = <0x49040000 0x400>;
 371                         interrupts = <45>;
 372                         ti,hwmods = "timer9";
 373                         ti,timer-pwm;
 374                 };
 375
 376                 timer10: timer@48086000 {
 377                         compatible = "ti,omap2-timer";
 378                         reg = <0x48086000 0x400>;
 379                         interrupts = <46>;
 380                         ti,hwmods = "timer10";
 381                         ti,timer-pwm;
 382                 };
 383
 384                 timer11: timer@48088000 {
 385                         compatible = "ti,omap2-timer";
 386                         reg = <0x48088000 0x400>;
 387                         interrupts = <47>;
 388                         ti,hwmods = "timer11";
 389                         ti,timer-pwm;
 390                 };
 391
 392                 timer12: timer@48304000 {
 393                         compatible = "ti,omap2-timer";
 394                         reg = <0x48304000 0x400>;
 395                         interrupts = <95>;
 396                         ti,hwmods = "timer12";
 397                         ti,timer-alwon;
 398                         ti,timer-secure;
 399                 };
 400
 401                 usbhstll: usbhstll@48062000 {
 402                         compatible = "ti,usbhs-tll";
 403                         reg = <0x48062000 0x1000>;
 404                         interrupts = <78>;
 405                         ti,hwmods = "usb_tll_hs";
 406                 };
 407
 408                 usbhshost: usbhshost@48064000 {
 409                         compatible = "ti,usbhs-host";
 410                         reg = <0x48064000 0x400>;
 411                         ti,hwmods = "usb_host_hs";
 412                         #address-cells = <1>;
 413                         #size-cells = <1>;
 414                         ranges;
 415
 416                         usbhsohci: ohci@48064400 {
 417                                 compatible = "ti,ohci-omap3", "usb-ohci";
 418                                 reg = <0x48064400 0x400>;
 419                                 interrupt-parent = <&intc>;
 420                                 interrupts = <76>;
 421                         };
 422
 423                         usbhsehci: ehci@48064800 {
 424                                 compatible = "ti,ehci-omap", "usb-ehci";
 425                                 reg = <0x48064800 0x400>;
 426                                 interrupt-parent = <&intc>;
 427                                 interrupts = <77>;
 428                         };
 429                 };
 430
 431         };
 432 };