arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /*
  10  * Carveout for multimedia usecases
  11  * It should be the last 48MB of the first 512MB memory part
  12  * In theory, it should not even exist. That zone should be reserved
  13  * dynamically during the .reserve callback.
  14  */
  15 /memreserve/ 0x9d000000 0x03000000;
  16
  17 /include/ "skeleton.dtsi"
  18
  19 / {
  20         compatible = "ti,omap4430", "ti,omap4";
  21         interrupt-parent = <&gic>;
  22
  23         aliases {
  24         };
  25
  26         /*
  27          * The soc node represents the soc top level view. It is uses for IPs
  28          * that are not memory mapped in the MPU view or for the MPU itself.
  29          */
  30         soc {
  31                 compatible = "ti,omap-infra";
  32         };
  33
  34         /*
  35          * XXX: Use a flat representation of the OMAP4 interconnect.
  36          * The real OMAP interconnect network is quite complex.
  37          *
  38          * MPU -+-- MPU_PRIVATE - GIC, L2
  39          *      |
  40          *      +----------------+----------+
  41          *      |                |          |
  42          *      +            +- EMIF - DDR  |
  43          *      |            |              |
  44          *      |            +     +--------+
  45          *      |            |     |
  46          *      |            +- L4_ABE - AESS, MCBSP, TIMERs...
  47          *      |            |
  48          *      +- L3_MAIN --+- L4_CORE - IPs...
  49          *                   |
  50          *                   +- L4_PER - IPs...
  51          *                   |
  52          *                   +- L4_CFG -+- L4_WKUP - IPs...
  53          *                   |          |
  54          *                   |          +- IPs...
  55          *                   +- IPU ----+
  56          *                   |          |
  57          *                   +- DSP ----+
  58          *                   |          |
  59          *                   +- DSS ----+
  60          *
  61          * Since that will not bring real advantage to represent that in DT for
  62          * the moment, just use a fake OCP bus entry to represent the whole bus
  63          * hierarchy.
  64          */
  65         ocp {
  66                 compatible = "ti,omap4-l3-noc", "simple-bus";
  67                 #address-cells = <1>;
  68                 #size-cells = <1>;
  69                 ranges;
  70                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
  71
  72                 gic: interrupt-controller@48241000 {
  73                         compatible = "arm,cortex-a9-gic";
  74                         interrupt-controller;
  75                         #interrupt-cells = <1>;
  76                         reg = <0x48241000 0x1000>,
  77                               <0x48240100 0x0100>;
  78                 };
  79         };
  80 };