2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
13 #include "skeleton.dtsi"
16 compatible = "ti,omap4430", "ti,omap4";
17 interrupt-parent = <&wakeupgen>;
35 compatible = "arm,cortex-a9";
37 next-level-cache = <&L2>;
40 clocks = <&dpll_mpu_ck>;
43 clock-latency = <300000>; /* From omap-cpufreq driver */
46 compatible = "arm,cortex-a9";
48 next-level-cache = <&L2>;
53 gic: interrupt-controller@48241000 {
54 compatible = "arm,cortex-a9-gic";
56 #interrupt-cells = <3>;
57 reg = <0x48241000 0x1000>,
59 interrupt-parent = <&gic>;
62 L2: l2-cache-controller@48242000 {
63 compatible = "arm,pl310-cache";
64 reg = <0x48242000 0x1000>;
69 local-timer@48240600 {
70 compatible = "arm,cortex-a9-twd-timer";
71 clocks = <&mpu_periphclk>;
72 reg = <0x48240600 0x20>;
73 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
74 interrupt-parent = <&gic>;
77 wakeupgen: interrupt-controller@48281000 {
78 compatible = "ti,omap4-wugen-mpu";
80 #interrupt-cells = <3>;
81 reg = <0x48281000 0x1000>;
82 interrupt-parent = <&gic>;
86 * The soc node represents the soc top level view. It is used for IPs
87 * that are not memory mapped in the MPU view or for the MPU itself.
90 compatible = "ti,omap-infra";
92 compatible = "ti,omap4-mpu";
98 compatible = "ti,omap3-c64";
103 compatible = "ti,ivahd";
109 * XXX: Use a flat representation of the OMAP4 interconnect.
110 * The real OMAP interconnect network is quite complex.
111 * Since it will not bring real advantage to represent that in DT for
112 * the moment, just use a fake OCP bus entry to represent the whole bus
116 compatible = "ti,omap4-l3-noc", "simple-bus";
117 #address-cells = <1>;
120 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
121 reg = <0x44000000 0x1000>,
124 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
125 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
127 l4_cfg: l4@4a000000 {
128 compatible = "ti,omap4-l4-cfg", "simple-bus";
129 #address-cells = <1>;
131 ranges = <0 0x4a000000 0x1000000>;
134 compatible = "ti,omap4-cm1";
135 reg = <0x4000 0x2000>;
138 #address-cells = <1>;
142 cm1_clockdomains: clockdomains {
147 compatible = "ti,omap4-cm2";
148 reg = <0x8000 0x3000>;
151 #address-cells = <1>;
155 cm2_clockdomains: clockdomains {
159 omap4_scm_core: scm@2000 {
160 compatible = "ti,omap4-scm-core", "simple-bus";
161 reg = <0x2000 0x1000>;
162 #address-cells = <1>;
164 ranges = <0 0x2000 0x1000>;
166 scm_conf: scm_conf@0 {
167 compatible = "syscon";
169 #address-cells = <1>;
174 omap4_padconf_core: scm@100000 {
175 compatible = "ti,omap4-scm-padconf-core",
177 #address-cells = <1>;
179 ranges = <0 0x100000 0x1000>;
181 omap4_pmx_core: pinmux@40 {
182 compatible = "ti,omap4-padconf",
185 #address-cells = <1>;
187 #interrupt-cells = <1>;
188 interrupt-controller;
189 pinctrl-single,register-width = <16>;
190 pinctrl-single,function-mask = <0x7fff>;
193 omap4_padconf_global: omap4_padconf_global@5a0 {
194 compatible = "syscon",
197 #address-cells = <1>;
199 ranges = <0 0x5a0 0x170>;
201 pbias_regulator: pbias_regulator {
202 compatible = "ti,pbias-omap4", "ti,pbias-omap";
204 syscon = <&omap4_padconf_global>;
205 pbias_mmc_reg: pbias_mmc_omap4 {
206 regulator-name = "pbias_mmc_omap4";
207 regulator-min-microvolt = <1800000>;
208 regulator-max-microvolt = <3000000>;
215 compatible = "ti,omap4-l4-wkup", "simple-bus";
216 #address-cells = <1>;
218 ranges = <0 0x300000 0x40000>;
220 counter32k: counter@4000 {
221 compatible = "ti,omap-counter32k";
223 ti,hwmods = "counter_32k";
227 compatible = "ti,omap4-prm";
228 reg = <0x6000 0x3000>;
229 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
232 #address-cells = <1>;
236 prm_clockdomains: clockdomains {
241 compatible = "ti,omap4-scrm";
242 reg = <0xa000 0x2000>;
244 scrm_clocks: clocks {
245 #address-cells = <1>;
249 scrm_clockdomains: clockdomains {
253 omap4_pmx_wkup: pinmux@1e040 {
254 compatible = "ti,omap4-padconf",
256 reg = <0x1e040 0x0038>;
257 #address-cells = <1>;
259 #interrupt-cells = <1>;
260 interrupt-controller;
261 pinctrl-single,register-width = <16>;
262 pinctrl-single,function-mask = <0x7fff>;
267 ocmcram: ocmcram@40304000 {
268 compatible = "mmio-sram";
269 reg = <0x40304000 0xa000>; /* 40k */
272 sdma: dma-controller@4a056000 {
273 compatible = "ti,omap4430-sdma";
274 reg = <0x4a056000 0x1000>;
275 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
281 dma-requests = <127>;
284 gpio1: gpio@4a310000 {
285 compatible = "ti,omap4-gpio";
286 reg = <0x4a310000 0x200>;
287 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
292 interrupt-controller;
293 #interrupt-cells = <2>;
296 gpio2: gpio@48055000 {
297 compatible = "ti,omap4-gpio";
298 reg = <0x48055000 0x200>;
299 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
303 interrupt-controller;
304 #interrupt-cells = <2>;
307 gpio3: gpio@48057000 {
308 compatible = "ti,omap4-gpio";
309 reg = <0x48057000 0x200>;
310 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
314 interrupt-controller;
315 #interrupt-cells = <2>;
318 gpio4: gpio@48059000 {
319 compatible = "ti,omap4-gpio";
320 reg = <0x48059000 0x200>;
321 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
325 interrupt-controller;
326 #interrupt-cells = <2>;
329 gpio5: gpio@4805b000 {
330 compatible = "ti,omap4-gpio";
331 reg = <0x4805b000 0x200>;
332 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
336 interrupt-controller;
337 #interrupt-cells = <2>;
340 gpio6: gpio@4805d000 {
341 compatible = "ti,omap4-gpio";
342 reg = <0x4805d000 0x200>;
343 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
347 interrupt-controller;
348 #interrupt-cells = <2>;
352 compatible = "ti,am3352-elm";
353 reg = <0x48078000 0x2000>;
359 gpmc: gpmc@50000000 {
360 compatible = "ti,omap4430-gpmc";
361 reg = <0x50000000 0x1000>;
362 #address-cells = <2>;
364 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
368 gpmc,num-waitpins = <4>;
371 clocks = <&l3_div_ck>;
375 uart1: serial@4806a000 {
376 compatible = "ti,omap4-uart";
377 reg = <0x4806a000 0x100>;
378 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
380 clock-frequency = <48000000>;
383 uart2: serial@4806c000 {
384 compatible = "ti,omap4-uart";
385 reg = <0x4806c000 0x100>;
386 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
388 clock-frequency = <48000000>;
391 uart3: serial@48020000 {
392 compatible = "ti,omap4-uart";
393 reg = <0x48020000 0x100>;
394 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
396 clock-frequency = <48000000>;
399 uart4: serial@4806e000 {
400 compatible = "ti,omap4-uart";
401 reg = <0x4806e000 0x100>;
402 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
404 clock-frequency = <48000000>;
407 hwspinlock: spinlock@4a0f6000 {
408 compatible = "ti,omap4-hwspinlock";
409 reg = <0x4a0f6000 0x1000>;
410 ti,hwmods = "spinlock";
415 compatible = "ti,omap4-i2c";
416 reg = <0x48070000 0x100>;
417 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
418 #address-cells = <1>;
424 compatible = "ti,omap4-i2c";
425 reg = <0x48072000 0x100>;
426 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
427 #address-cells = <1>;
433 compatible = "ti,omap4-i2c";
434 reg = <0x48060000 0x100>;
435 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
436 #address-cells = <1>;
442 compatible = "ti,omap4-i2c";
443 reg = <0x48350000 0x100>;
444 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
445 #address-cells = <1>;
450 mcspi1: spi@48098000 {
451 compatible = "ti,omap4-mcspi";
452 reg = <0x48098000 0x200>;
453 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
454 #address-cells = <1>;
456 ti,hwmods = "mcspi1";
466 dma-names = "tx0", "rx0", "tx1", "rx1",
467 "tx2", "rx2", "tx3", "rx3";
470 mcspi2: spi@4809a000 {
471 compatible = "ti,omap4-mcspi";
472 reg = <0x4809a000 0x200>;
473 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
474 #address-cells = <1>;
476 ti,hwmods = "mcspi2";
482 dma-names = "tx0", "rx0", "tx1", "rx1";
485 mcspi3: spi@480b8000 {
486 compatible = "ti,omap4-mcspi";
487 reg = <0x480b8000 0x200>;
488 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
489 #address-cells = <1>;
491 ti,hwmods = "mcspi3";
493 dmas = <&sdma 15>, <&sdma 16>;
494 dma-names = "tx0", "rx0";
497 mcspi4: spi@480ba000 {
498 compatible = "ti,omap4-mcspi";
499 reg = <0x480ba000 0x200>;
500 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
501 #address-cells = <1>;
503 ti,hwmods = "mcspi4";
505 dmas = <&sdma 70>, <&sdma 71>;
506 dma-names = "tx0", "rx0";
510 compatible = "ti,omap4-hsmmc";
511 reg = <0x4809c000 0x400>;
512 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
515 ti,needs-special-reset;
516 dmas = <&sdma 61>, <&sdma 62>;
517 dma-names = "tx", "rx";
518 pbias-supply = <&pbias_mmc_reg>;
522 compatible = "ti,omap4-hsmmc";
523 reg = <0x480b4000 0x400>;
524 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
526 ti,needs-special-reset;
527 dmas = <&sdma 47>, <&sdma 48>;
528 dma-names = "tx", "rx";
532 compatible = "ti,omap4-hsmmc";
533 reg = <0x480ad000 0x400>;
534 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
536 ti,needs-special-reset;
537 dmas = <&sdma 77>, <&sdma 78>;
538 dma-names = "tx", "rx";
542 compatible = "ti,omap4-hsmmc";
543 reg = <0x480d1000 0x400>;
544 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
546 ti,needs-special-reset;
547 dmas = <&sdma 57>, <&sdma 58>;
548 dma-names = "tx", "rx";
552 compatible = "ti,omap4-hsmmc";
553 reg = <0x480d5000 0x400>;
554 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
556 ti,needs-special-reset;
557 dmas = <&sdma 59>, <&sdma 60>;
558 dma-names = "tx", "rx";
561 mmu_dsp: mmu@4a066000 {
562 compatible = "ti,omap4-iommu";
563 reg = <0x4a066000 0x100>;
564 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
565 ti,hwmods = "mmu_dsp";
569 mmu_ipu: mmu@55082000 {
570 compatible = "ti,omap4-iommu";
571 reg = <0x55082000 0x100>;
572 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
573 ti,hwmods = "mmu_ipu";
575 ti,iommu-bus-err-back;
579 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
580 reg = <0x4a314000 0x80>;
581 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
582 ti,hwmods = "wd_timer2";
585 mcpdm: mcpdm@40132000 {
586 compatible = "ti,omap4-mcpdm";
587 reg = <0x40132000 0x7f>, /* MPU private access */
588 <0x49032000 0x7f>; /* L3 Interconnect */
589 reg-names = "mpu", "dma";
590 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
594 dma-names = "up_link", "dn_link";
598 dmic: dmic@4012e000 {
599 compatible = "ti,omap4-dmic";
600 reg = <0x4012e000 0x7f>, /* MPU private access */
601 <0x4902e000 0x7f>; /* L3 Interconnect */
602 reg-names = "mpu", "dma";
603 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
606 dma-names = "up_link";
610 mcbsp1: mcbsp@40122000 {
611 compatible = "ti,omap4-mcbsp";
612 reg = <0x40122000 0xff>, /* MPU private access */
613 <0x49022000 0xff>; /* L3 Interconnect */
614 reg-names = "mpu", "dma";
615 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
616 interrupt-names = "common";
617 ti,buffer-size = <128>;
618 ti,hwmods = "mcbsp1";
621 dma-names = "tx", "rx";
625 mcbsp2: mcbsp@40124000 {
626 compatible = "ti,omap4-mcbsp";
627 reg = <0x40124000 0xff>, /* MPU private access */
628 <0x49024000 0xff>; /* L3 Interconnect */
629 reg-names = "mpu", "dma";
630 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
631 interrupt-names = "common";
632 ti,buffer-size = <128>;
633 ti,hwmods = "mcbsp2";
636 dma-names = "tx", "rx";
640 mcbsp3: mcbsp@40126000 {
641 compatible = "ti,omap4-mcbsp";
642 reg = <0x40126000 0xff>, /* MPU private access */
643 <0x49026000 0xff>; /* L3 Interconnect */
644 reg-names = "mpu", "dma";
645 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
646 interrupt-names = "common";
647 ti,buffer-size = <128>;
648 ti,hwmods = "mcbsp3";
651 dma-names = "tx", "rx";
655 mcbsp4: mcbsp@48096000 {
656 compatible = "ti,omap4-mcbsp";
657 reg = <0x48096000 0xff>; /* L4 Interconnect */
659 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
660 interrupt-names = "common";
661 ti,buffer-size = <128>;
662 ti,hwmods = "mcbsp4";
665 dma-names = "tx", "rx";
669 keypad: keypad@4a31c000 {
670 compatible = "ti,omap4-keypad";
671 reg = <0x4a31c000 0x80>;
672 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
678 compatible = "ti,omap4-dmm";
679 reg = <0x4e000000 0x800>;
680 interrupts = <0 113 0x4>;
684 emif1: emif@4c000000 {
685 compatible = "ti,emif-4d";
686 reg = <0x4c000000 0x100>;
687 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
691 hw-caps-read-idle-ctrl;
692 hw-caps-ll-interface;
696 emif2: emif@4d000000 {
697 compatible = "ti,emif-4d";
698 reg = <0x4d000000 0x100>;
699 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
703 hw-caps-read-idle-ctrl;
704 hw-caps-ll-interface;
709 compatible = "ti,omap-ocp2scp";
710 reg = <0x4a0ad000 0x1f>;
711 #address-cells = <1>;
714 ti,hwmods = "ocp2scp_usb_phy";
715 usb2_phy: usb2phy@4a0ad080 {
716 compatible = "ti,omap-usb2";
717 reg = <0x4a0ad080 0x58>;
718 ctrl-module = <&omap_control_usb2phy>;
719 clocks = <&usb_phy_cm_clk32k>;
720 clock-names = "wkupclk";
725 mailbox: mailbox@4a0f4000 {
726 compatible = "ti,omap4-mailbox";
727 reg = <0x4a0f4000 0x200>;
728 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
729 ti,hwmods = "mailbox";
731 ti,mbox-num-users = <3>;
732 ti,mbox-num-fifos = <8>;
734 ti,mbox-tx = <0 0 0>;
735 ti,mbox-rx = <1 0 0>;
738 ti,mbox-tx = <3 0 0>;
739 ti,mbox-rx = <2 0 0>;
743 timer1: timer@4a318000 {
744 compatible = "ti,omap3430-timer";
745 reg = <0x4a318000 0x80>;
746 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
747 ti,hwmods = "timer1";
751 timer2: timer@48032000 {
752 compatible = "ti,omap3430-timer";
753 reg = <0x48032000 0x80>;
754 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
755 ti,hwmods = "timer2";
758 timer3: timer@48034000 {
759 compatible = "ti,omap4430-timer";
760 reg = <0x48034000 0x80>;
761 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
762 ti,hwmods = "timer3";
765 timer4: timer@48036000 {
766 compatible = "ti,omap4430-timer";
767 reg = <0x48036000 0x80>;
768 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
769 ti,hwmods = "timer4";
772 timer5: timer@40138000 {
773 compatible = "ti,omap4430-timer";
774 reg = <0x40138000 0x80>,
776 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
777 ti,hwmods = "timer5";
781 timer6: timer@4013a000 {
782 compatible = "ti,omap4430-timer";
783 reg = <0x4013a000 0x80>,
785 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
786 ti,hwmods = "timer6";
790 timer7: timer@4013c000 {
791 compatible = "ti,omap4430-timer";
792 reg = <0x4013c000 0x80>,
794 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
795 ti,hwmods = "timer7";
799 timer8: timer@4013e000 {
800 compatible = "ti,omap4430-timer";
801 reg = <0x4013e000 0x80>,
803 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
804 ti,hwmods = "timer8";
809 timer9: timer@4803e000 {
810 compatible = "ti,omap4430-timer";
811 reg = <0x4803e000 0x80>;
812 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
813 ti,hwmods = "timer9";
817 timer10: timer@48086000 {
818 compatible = "ti,omap3430-timer";
819 reg = <0x48086000 0x80>;
820 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
821 ti,hwmods = "timer10";
825 timer11: timer@48088000 {
826 compatible = "ti,omap4430-timer";
827 reg = <0x48088000 0x80>;
828 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
829 ti,hwmods = "timer11";
833 usbhstll: usbhstll@4a062000 {
834 compatible = "ti,usbhs-tll";
835 reg = <0x4a062000 0x1000>;
836 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
837 ti,hwmods = "usb_tll_hs";
840 usbhshost: usbhshost@4a064000 {
841 compatible = "ti,usbhs-host";
842 reg = <0x4a064000 0x800>;
843 ti,hwmods = "usb_host_hs";
844 #address-cells = <1>;
847 clocks = <&init_60m_fclk>,
850 clock-names = "refclk_60m_int",
854 usbhsohci: ohci@4a064800 {
855 compatible = "ti,ohci-omap3";
856 reg = <0x4a064800 0x400>;
857 interrupt-parent = <&gic>;
858 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
861 usbhsehci: ehci@4a064c00 {
862 compatible = "ti,ehci-omap";
863 reg = <0x4a064c00 0x400>;
864 interrupt-parent = <&gic>;
865 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
869 omap_control_usb2phy: control-phy@4a002300 {
870 compatible = "ti,control-phy-usb2";
871 reg = <0x4a002300 0x4>;
875 omap_control_usbotg: control-phy@4a00233c {
876 compatible = "ti,control-phy-otghs";
877 reg = <0x4a00233c 0x4>;
878 reg-names = "otghs_control";
881 usb_otg_hs: usb_otg_hs@4a0ab000 {
882 compatible = "ti,omap4-musb";
883 reg = <0x4a0ab000 0x7ff>;
884 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
885 interrupt-names = "mc", "dma";
886 ti,hwmods = "usb_otg_hs";
887 usb-phy = <&usb2_phy>;
889 phy-names = "usb2-phy";
893 ctrl-module = <&omap_control_usbotg>;
897 compatible = "ti,omap4-aes";
899 reg = <0x4b501000 0xa0>;
900 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
901 dmas = <&sdma 111>, <&sdma 110>;
902 dma-names = "tx", "rx";
906 compatible = "ti,omap4-des";
908 reg = <0x480a5000 0xa0>;
909 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
910 dmas = <&sdma 117>, <&sdma 116>;
911 dma-names = "tx", "rx";
914 abb_mpu: regulator-abb-mpu {
915 compatible = "ti,abb-v2";
916 regulator-name = "abb_mpu";
917 #address-cells = <0>;
919 ti,tranxdone-status-mask = <0x80>;
920 clocks = <&sys_clkin_ck>;
921 ti,settling-time = <50>;
922 ti,clock-cycles = <16>;
927 abb_iva: regulator-abb-iva {
928 compatible = "ti,abb-v2";
929 regulator-name = "abb_iva";
930 #address-cells = <0>;
932 ti,tranxdone-status-mask = <0x80000000>;
933 clocks = <&sys_clkin_ck>;
934 ti,settling-time = <50>;
935 ti,clock-cycles = <16>;
941 compatible = "ti,omap4-dss";
942 reg = <0x58000000 0x80>;
944 ti,hwmods = "dss_core";
945 clocks = <&dss_dss_clk>;
947 #address-cells = <1>;
952 compatible = "ti,omap4-dispc";
953 reg = <0x58001000 0x1000>;
954 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
955 ti,hwmods = "dss_dispc";
956 clocks = <&dss_dss_clk>;
960 rfbi: encoder@58002000 {
961 compatible = "ti,omap4-rfbi";
962 reg = <0x58002000 0x1000>;
964 ti,hwmods = "dss_rfbi";
965 clocks = <&dss_dss_clk>, <&l3_div_ck>;
966 clock-names = "fck", "ick";
969 venc: encoder@58003000 {
970 compatible = "ti,omap4-venc";
971 reg = <0x58003000 0x1000>;
973 ti,hwmods = "dss_venc";
974 clocks = <&dss_tv_clk>;
978 dsi1: encoder@58004000 {
979 compatible = "ti,omap4-dsi";
980 reg = <0x58004000 0x200>,
983 reg-names = "proto", "phy", "pll";
984 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
986 ti,hwmods = "dss_dsi1";
987 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
988 clock-names = "fck", "sys_clk";
991 dsi2: encoder@58005000 {
992 compatible = "ti,omap4-dsi";
993 reg = <0x58005000 0x200>,
996 reg-names = "proto", "phy", "pll";
997 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
999 ti,hwmods = "dss_dsi2";
1000 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1001 clock-names = "fck", "sys_clk";
1004 hdmi: encoder@58006000 {
1005 compatible = "ti,omap4-hdmi";
1006 reg = <0x58006000 0x200>,
1009 <0x58006400 0x1000>;
1010 reg-names = "wp", "pll", "phy", "core";
1011 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1012 status = "disabled";
1013 ti,hwmods = "dss_hdmi";
1014 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1015 clock-names = "fck", "sys_clk";
1017 dma-names = "audio_tx";
1023 /include/ "omap44xx-clocks.dtsi"