2 * PHYTEC phyCORE-LPC3250 board
4 * Copyright 2012 Roland Stigge <stigge@antcom.de>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
15 #include "lpc32xx.dtsi"
18 model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
19 compatible = "phytec,phy3250", "nxp,lpc3250";
24 device_type = "memory";
25 reg = <0x80000000 0x4000000>;
29 backlight_reg: regulator@0 {
30 compatible = "regulator-fixed";
31 regulator-name = "backlight_reg";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
39 lcd_reg: regulator@1 {
40 compatible = "regulator-fixed";
41 regulator-name = "lcd_reg";
42 regulator-min-microvolt = <1800000>;
43 regulator-max-microvolt = <1800000>;
50 compatible = "regulator-fixed";
51 regulator-name = "sd_reg";
52 regulator-min-microvolt = <1800000>;
53 regulator-max-microvolt = <1800000>;
60 mac: ethernet@31060000 {
69 /* 64MB Flash via SLC NAND controller */
76 nxp,wwidth = <40000000>;
77 nxp,whold = <100000000>;
78 nxp,wsetup = <100000000>;
80 nxp,rwidth = <40000000>;
81 nxp,rhold = <66666666>;
82 nxp,rsetup = <100000000>;
84 gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */
87 label = "phy3250-boot";
88 reg = <0x00000000 0x00064000>;
93 label = "phy3250-uboot";
94 reg = <0x00064000 0x00190000>;
99 label = "phy3250-ubt-prms";
100 reg = <0x001f4000 0x00010000>;
104 label = "phy3250-kernel";
105 reg = <0x00204000 0x00400000>;
109 label = "phy3250-rootfs";
110 reg = <0x00604000 0x039fc000>;
115 uart5: serial@40090000 {
119 uart3: serial@40080000 {
124 clock-frequency = <100000>;
127 compatible = "nxp,pcf8563";
131 uda1380: uda1380@18 {
132 compatible = "nxp,uda1380";
134 power-gpio = <&gpio 0x59 0>;
135 reset-gpio = <&gpio 0x51 0>;
141 clock-frequency = <100000>;
145 #address-cells = <1>;
148 cs-gpios = <&gpio 3 5 0>;
151 pl022,interface = <0>;
152 pl022,com-mode = <0>;
153 pl022,rx-level-trig = <1>;
154 pl022,tx-level-trig = <1>;
155 pl022,ctrl-len = <11>;
156 pl022,wait-state = <0>;
159 at25,byte-len = <0x8000>;
160 at25,addr-mode = <2>;
161 at25,page-size = <64>;
163 compatible = "atmel,at25";
165 spi-max-frequency = <5000000>;
170 wp-gpios = <&gpio 3 0 0>;
171 cd-gpios = <&gpio 3 1 0>;
174 vmmc-supply = <&sd_reg>;
180 uart2: serial@40018000 {
190 keypad,num-rows = <1>;
191 keypad,num-columns = <1>;
192 nxp,debounce-delay-ms = <3>;
193 nxp,scan-delay-ms = <34>;
194 linux,keymap = <0x00000002>;
200 compatible = "gpio-leds";
203 gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */
204 default-state = "off";
208 gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */
209 linux,default-trigger = "heartbeat";
214 /* Here, choose exactly one from: ohci, usbd */
216 transceiver = <&isp1301>;
221 clock-frequency = <100000>;
223 isp1301: usb-transceiver@2c {
224 compatible = "nxp,isp1301";