2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
36 compatible = "simple-bus";
39 ranges = <0x40000000 0x40000000 0x80000000>;
41 l2-cache-controller@80040000 {
42 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
43 reg = <0x80040000 0x1000>;
45 arm,tag-latency = <1 1 1>;
46 arm,data-latency = <1 1 1>;
47 arm,filter-ranges = <0 0x40000000>;
50 intc: interrupt-controller@80020000 {
51 #interrupt-cells = <1>;
53 compatible = "sirf,prima2-intc";
54 reg = <0x80020000 0x1000>;
58 compatible = "simple-bus";
61 ranges = <0x88000000 0x88000000 0x40000>;
63 clks: clock-controller@88000000 {
64 compatible = "sirf,prima2-clkc";
65 reg = <0x88000000 0x1000>;
70 reset-controller@88010000 {
71 compatible = "sirf,prima2-rstc";
72 reg = <0x88010000 0x1000>;
75 rsc-controller@88020000 {
76 compatible = "sirf,prima2-rsc";
77 reg = <0x88020000 0x1000>;
82 compatible = "simple-bus";
85 ranges = <0x90000000 0x90000000 0x10000>;
87 memory-controller@90000000 {
88 compatible = "sirf,prima2-memc";
89 reg = <0x90000000 0x10000>;
96 compatible = "simple-bus";
99 ranges = <0x90010000 0x90010000 0x30000>;
102 compatible = "sirf,prima2-lcd";
103 reg = <0x90010000 0x20000>;
108 compatible = "sirf,prima2-vpp";
109 reg = <0x90020000 0x10000>;
116 compatible = "simple-bus";
117 #address-cells = <1>;
119 ranges = <0x98000000 0x98000000 0x8000000>;
122 compatible = "powervr,sgx531";
123 reg = <0x98000000 0x8000000>;
130 compatible = "simple-bus";
131 #address-cells = <1>;
133 ranges = <0xa0000000 0xa0000000 0x8000000>;
135 multimedia@a0000000 {
136 compatible = "sirf,prima2-video-codec";
137 reg = <0xa0000000 0x8000000>;
144 compatible = "simple-bus";
145 #address-cells = <1>;
147 ranges = <0xa8000000 0xa8000000 0x2000000>;
150 compatible = "sirf,prima2-dspif";
151 reg = <0xa8000000 0x10000>;
156 compatible = "sirf,prima2-gps";
157 reg = <0xa8010000 0x10000>;
163 compatible = "sirf,prima2-dsp";
164 reg = <0xa9000000 0x1000000>;
171 compatible = "simple-bus";
172 #address-cells = <1>;
174 ranges = <0xb0000000 0xb0000000 0x180000>,
175 <0x56000000 0x56000000 0x1b00000>;
178 compatible = "sirf,prima2-tick";
179 reg = <0xb0020000 0x1000>;
184 compatible = "sirf,prima2-nand";
185 reg = <0xb0030000 0x10000>;
191 compatible = "sirf,prima2-audio";
192 reg = <0xb0040000 0x10000>;
197 uart0: uart@b0050000 {
199 compatible = "sirf,prima2-uart";
200 reg = <0xb0050000 0x1000>;
204 sirf,uart-dma-rx-channel = <21>;
205 sirf,uart-dma-tx-channel = <2>;
208 uart1: uart@b0060000 {
210 compatible = "sirf,prima2-uart";
211 reg = <0xb0060000 0x1000>;
217 uart2: uart@b0070000 {
219 compatible = "sirf,prima2-uart";
220 reg = <0xb0070000 0x1000>;
224 sirf,uart-dma-rx-channel = <6>;
225 sirf,uart-dma-tx-channel = <7>;
230 compatible = "sirf,prima2-usp";
231 reg = <0xb0080000 0x10000>;
235 sirf,usp-dma-rx-channel = <17>;
236 sirf,usp-dma-tx-channel = <18>;
241 compatible = "sirf,prima2-usp";
242 reg = <0xb0090000 0x10000>;
246 sirf,usp-dma-rx-channel = <14>;
247 sirf,usp-dma-tx-channel = <15>;
252 compatible = "sirf,prima2-usp";
253 reg = <0xb00a0000 0x10000>;
257 sirf,usp-dma-rx-channel = <10>;
258 sirf,usp-dma-tx-channel = <11>;
261 dmac0: dma-controller@b00b0000 {
263 compatible = "sirf,prima2-dmac";
264 reg = <0xb00b0000 0x10000>;
269 dmac1: dma-controller@b0160000 {
271 compatible = "sirf,prima2-dmac";
272 reg = <0xb0160000 0x10000>;
278 compatible = "sirf,prima2-vip";
279 reg = <0xb00C0000 0x10000>;
282 sirf,vip-dma-rx-channel = <16>;
287 compatible = "sirf,prima2-spi";
288 reg = <0xb00d0000 0x10000>;
295 compatible = "sirf,prima2-spi";
296 reg = <0xb0170000 0x10000>;
303 compatible = "sirf,prima2-i2c";
304 reg = <0xb00e0000 0x10000>;
311 compatible = "sirf,prima2-i2c";
312 reg = <0xb00f0000 0x10000>;
318 compatible = "sirf,prima2-tsc";
319 reg = <0xb0110000 0x10000>;
324 gpio: pinctrl@b0120000 {
326 #interrupt-cells = <2>;
327 compatible = "sirf,prima2-pinctrl";
328 reg = <0xb0120000 0x10000>;
329 interrupts = <43 44 45 46 47>;
331 interrupt-controller;
333 lcd_16pins_a: lcd0@0 {
335 sirf,pins = "lcd_16bitsgrp";
336 sirf,function = "lcd_16bits";
339 lcd_18pins_a: lcd0@1 {
341 sirf,pins = "lcd_18bitsgrp";
342 sirf,function = "lcd_18bits";
345 lcd_24pins_a: lcd0@2 {
347 sirf,pins = "lcd_24bitsgrp";
348 sirf,function = "lcd_24bits";
351 lcdrom_pins_a: lcdrom0@0 {
353 sirf,pins = "lcdromgrp";
354 sirf,function = "lcdrom";
357 uart0_pins_a: uart0@0 {
359 sirf,pins = "uart0grp";
360 sirf,function = "uart0";
363 uart0_noflow_pins_a: uart0@1 {
365 sirf,pins = "uart0_nostreamctrlgrp";
366 sirf,function = "uart0_nostreamctrl";
369 uart1_pins_a: uart1@0 {
371 sirf,pins = "uart1grp";
372 sirf,function = "uart1";
375 uart2_pins_a: uart2@0 {
377 sirf,pins = "uart2grp";
378 sirf,function = "uart2";
381 uart2_noflow_pins_a: uart2@1 {
383 sirf,pins = "uart2_nostreamctrlgrp";
384 sirf,function = "uart2_nostreamctrl";
387 spi0_pins_a: spi0@0 {
389 sirf,pins = "spi0grp";
390 sirf,function = "spi0";
393 spi1_pins_a: spi1@0 {
395 sirf,pins = "spi1grp";
396 sirf,function = "spi1";
399 i2c0_pins_a: i2c0@0 {
401 sirf,pins = "i2c0grp";
402 sirf,function = "i2c0";
405 i2c1_pins_a: i2c1@0 {
407 sirf,pins = "i2c1grp";
408 sirf,function = "i2c1";
411 pwm0_pins_a: pwm0@0 {
413 sirf,pins = "pwm0grp";
414 sirf,function = "pwm0";
417 pwm1_pins_a: pwm1@0 {
419 sirf,pins = "pwm1grp";
420 sirf,function = "pwm1";
423 pwm2_pins_a: pwm2@0 {
425 sirf,pins = "pwm2grp";
426 sirf,function = "pwm2";
429 pwm3_pins_a: pwm3@0 {
431 sirf,pins = "pwm3grp";
432 sirf,function = "pwm3";
437 sirf,pins = "gpsgrp";
438 sirf,function = "gps";
443 sirf,pins = "vipgrp";
444 sirf,function = "vip";
447 sdmmc0_pins_a: sdmmc0@0 {
449 sirf,pins = "sdmmc0grp";
450 sirf,function = "sdmmc0";
453 sdmmc1_pins_a: sdmmc1@0 {
455 sirf,pins = "sdmmc1grp";
456 sirf,function = "sdmmc1";
459 sdmmc2_pins_a: sdmmc2@0 {
461 sirf,pins = "sdmmc2grp";
462 sirf,function = "sdmmc2";
465 sdmmc3_pins_a: sdmmc3@0 {
467 sirf,pins = "sdmmc3grp";
468 sirf,function = "sdmmc3";
471 sdmmc4_pins_a: sdmmc4@0 {
473 sirf,pins = "sdmmc4grp";
474 sirf,function = "sdmmc4";
477 sdmmc5_pins_a: sdmmc5@0 {
479 sirf,pins = "sdmmc5grp";
480 sirf,function = "sdmmc5";
485 sirf,pins = "i2sgrp";
486 sirf,function = "i2s";
489 ac97_pins_a: ac97@0 {
491 sirf,pins = "ac97grp";
492 sirf,function = "ac97";
495 nand_pins_a: nand@0 {
497 sirf,pins = "nandgrp";
498 sirf,function = "nand";
501 usp0_pins_a: usp0@0 {
503 sirf,pins = "usp0grp";
504 sirf,function = "usp0";
507 usp0_uart_nostreamctrl_pins_a: usp0@1 {
510 "usp0_uart_nostreamctrl_grp";
512 "usp0_uart_nostreamctrl";
515 usp1_pins_a: usp1@0 {
517 sirf,pins = "usp1grp";
518 sirf,function = "usp1";
521 usp1_uart_nostreamctrl_pins_a: usp1@1 {
524 "usp1_uart_nostreamctrl_grp";
526 "usp1_uart_nostreamctrl";
529 usp2_pins_a: usp2@0 {
531 sirf,pins = "usp2grp";
532 sirf,function = "usp2";
535 usp2_uart_nostreamctrl_pins_a: usp2@1 {
538 "usp2_uart_nostreamctrl_grp";
540 "usp2_uart_nostreamctrl";
543 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
545 sirf,pins = "usb0_utmi_drvbusgrp";
546 sirf,function = "usb0_utmi_drvbus";
549 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
551 sirf,pins = "usb1_utmi_drvbusgrp";
552 sirf,function = "usb1_utmi_drvbus";
555 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
557 sirf,pins = "usb1_dp_dngrp";
558 sirf,function = "usb1_dp_dn";
561 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
562 uart1_route_io_usb1 {
563 sirf,pins = "uart1_route_io_usb1grp";
564 sirf,function = "uart1_route_io_usb1";
567 warm_rst_pins_a: warm_rst@0 {
569 sirf,pins = "warm_rstgrp";
570 sirf,function = "warm_rst";
573 pulse_count_pins_a: pulse_count@0 {
575 sirf,pins = "pulse_countgrp";
576 sirf,function = "pulse_count";
579 cko0_pins_a: cko0@0 {
581 sirf,pins = "cko0grp";
582 sirf,function = "cko0";
585 cko1_pins_a: cko1@0 {
587 sirf,pins = "cko1grp";
588 sirf,function = "cko1";
594 compatible = "sirf,prima2-pwm";
595 reg = <0xb0130000 0x10000>;
600 compatible = "sirf,prima2-efuse";
601 reg = <0xb0140000 0x10000>;
606 compatible = "sirf,prima2-pulsec";
607 reg = <0xb0150000 0x10000>;
613 compatible = "sirf,prima2-pciiobg", "simple-bus";
614 #address-cells = <1>;
616 ranges = <0x56000000 0x56000000 0x1b00000>;
618 sd0: sdhci@56000000 {
620 compatible = "sirf,prima2-sdhc";
621 reg = <0x56000000 0x100000>;
625 sd1: sdhci@56100000 {
627 compatible = "sirf,prima2-sdhc";
628 reg = <0x56100000 0x100000>;
632 sd2: sdhci@56200000 {
634 compatible = "sirf,prima2-sdhc";
635 reg = <0x56200000 0x100000>;
639 sd3: sdhci@56300000 {
641 compatible = "sirf,prima2-sdhc";
642 reg = <0x56300000 0x100000>;
646 sd4: sdhci@56400000 {
648 compatible = "sirf,prima2-sdhc";
649 reg = <0x56400000 0x100000>;
653 sd5: sdhci@56500000 {
655 compatible = "sirf,prima2-sdhc";
656 reg = <0x56500000 0x100000>;
661 compatible = "sirf,prima2-pcicp";
662 reg = <0x57900000 0x100000>;
666 rom-interface@57a00000 {
667 compatible = "sirf,prima2-romif";
668 reg = <0x57a00000 0x100000>;
674 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
675 #address-cells = <1>;
677 reg = <0x80030000 0x10000>;
680 compatible = "sirf,prima2-gpsrtc";
681 reg = <0x1000 0x1000>;
682 interrupts = <55 56 57>;
686 compatible = "sirf,prima2-sysrtc";
687 reg = <0x2000 0x1000>;
688 interrupts = <52 53 54>;
692 compatible = "sirf,prima2-pwrc";
693 reg = <0x3000 0x1000>;
699 compatible = "simple-bus";
700 #address-cells = <1>;
702 ranges = <0xb8000000 0xb8000000 0x40000>;
705 compatible = "chipidea,ci13611a-prima2";
706 reg = <0xb8000000 0x10000>;
712 compatible = "chipidea,ci13611a-prima2";
713 reg = <0xb8010000 0x10000>;
719 compatible = "synopsys,dwc-ahsata";
720 reg = <0xb8020000 0x10000>;
725 compatible = "sirf,prima2-security";
726 reg = <0xb8030000 0x10000>;