2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
40 clock-latency = <150000>;
45 compatible = "simple-bus";
48 ranges = <0x40000000 0x40000000 0x80000000>;
50 l2-cache-controller@80040000 {
51 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
52 reg = <0x80040000 0x1000>;
54 arm,tag-latency = <1 1 1>;
55 arm,data-latency = <1 1 1>;
56 arm,filter-ranges = <0 0x40000000>;
59 intc: interrupt-controller@80020000 {
60 #interrupt-cells = <1>;
62 compatible = "sirf,prima2-intc";
63 reg = <0x80020000 0x1000>;
67 compatible = "simple-bus";
70 ranges = <0x88000000 0x88000000 0x40000>;
72 clks: clock-controller@88000000 {
73 compatible = "sirf,prima2-clkc";
74 reg = <0x88000000 0x1000>;
79 reset-controller@88010000 {
80 compatible = "sirf,prima2-rstc";
81 reg = <0x88010000 0x1000>;
84 rsc-controller@88020000 {
85 compatible = "sirf,prima2-rsc";
86 reg = <0x88020000 0x1000>;
90 compatible = "sirf,prima2-cphifbg";
91 reg = <0x88030000 0x1000>;
97 compatible = "simple-bus";
100 ranges = <0x90000000 0x90000000 0x10000>;
102 memory-controller@90000000 {
103 compatible = "sirf,prima2-memc";
104 reg = <0x90000000 0x2000>;
110 compatible = "sirf,prima2-memcmon";
111 reg = <0x90002000 0x200>;
118 compatible = "simple-bus";
119 #address-cells = <1>;
121 ranges = <0x90010000 0x90010000 0x30000>;
124 compatible = "sirf,prima2-lcd";
125 reg = <0x90010000 0x20000>;
130 compatible = "sirf,prima2-vpp";
131 reg = <0x90020000 0x10000>;
138 compatible = "simple-bus";
139 #address-cells = <1>;
141 ranges = <0x98000000 0x98000000 0x8000000>;
144 compatible = "powervr,sgx531";
145 reg = <0x98000000 0x8000000>;
152 compatible = "simple-bus";
153 #address-cells = <1>;
155 ranges = <0xa0000000 0xa0000000 0x8000000>;
157 multimedia@a0000000 {
158 compatible = "sirf,prima2-video-codec";
159 reg = <0xa0000000 0x8000000>;
166 compatible = "simple-bus";
167 #address-cells = <1>;
169 ranges = <0xa8000000 0xa8000000 0x2000000>;
172 compatible = "sirf,prima2-dspif";
173 reg = <0xa8000000 0x10000>;
178 compatible = "sirf,prima2-gps";
179 reg = <0xa8010000 0x10000>;
185 compatible = "sirf,prima2-dsp";
186 reg = <0xa9000000 0x1000000>;
193 compatible = "simple-bus";
194 #address-cells = <1>;
196 ranges = <0xb0000000 0xb0000000 0x180000>,
197 <0x56000000 0x56000000 0x1b00000>;
200 compatible = "sirf,prima2-tick";
201 reg = <0xb0020000 0x1000>;
206 compatible = "sirf,prima2-nand";
207 reg = <0xb0030000 0x10000>;
213 compatible = "sirf,prima2-audio";
214 reg = <0xb0040000 0x10000>;
219 uart0: uart@b0050000 {
221 compatible = "sirf,prima2-uart";
222 reg = <0xb0050000 0x1000>;
226 sirf,uart-dma-rx-channel = <21>;
227 sirf,uart-dma-tx-channel = <2>;
230 uart1: uart@b0060000 {
232 compatible = "sirf,prima2-uart";
233 reg = <0xb0060000 0x1000>;
239 uart2: uart@b0070000 {
241 compatible = "sirf,prima2-uart";
242 reg = <0xb0070000 0x1000>;
246 sirf,uart-dma-rx-channel = <6>;
247 sirf,uart-dma-tx-channel = <7>;
252 compatible = "sirf,prima2-usp";
253 reg = <0xb0080000 0x10000>;
257 sirf,usp-dma-rx-channel = <17>;
258 sirf,usp-dma-tx-channel = <18>;
263 compatible = "sirf,prima2-usp";
264 reg = <0xb0090000 0x10000>;
268 sirf,usp-dma-rx-channel = <14>;
269 sirf,usp-dma-tx-channel = <15>;
274 compatible = "sirf,prima2-usp";
275 reg = <0xb00a0000 0x10000>;
279 sirf,usp-dma-rx-channel = <10>;
280 sirf,usp-dma-tx-channel = <11>;
283 dmac0: dma-controller@b00b0000 {
285 compatible = "sirf,prima2-dmac";
286 reg = <0xb00b0000 0x10000>;
292 dmac1: dma-controller@b0160000 {
294 compatible = "sirf,prima2-dmac";
295 reg = <0xb0160000 0x10000>;
302 compatible = "sirf,prima2-vip";
303 reg = <0xb00C0000 0x10000>;
306 sirf,vip-dma-rx-channel = <16>;
311 compatible = "sirf,prima2-spi";
312 reg = <0xb00d0000 0x10000>;
314 sirf,spi-num-chipselects = <1>;
315 sirf,spi-dma-rx-channel = <25>;
316 sirf,spi-dma-tx-channel = <20>;
317 #address-cells = <1>;
325 compatible = "sirf,prima2-spi";
326 reg = <0xb0170000 0x10000>;
328 sirf,spi-num-chipselects = <1>;
329 sirf,spi-dma-rx-channel = <12>;
330 sirf,spi-dma-tx-channel = <13>;
331 #address-cells = <1>;
339 compatible = "sirf,prima2-i2c";
340 reg = <0xb00e0000 0x10000>;
343 #address-cells = <1>;
349 compatible = "sirf,prima2-i2c";
350 reg = <0xb00f0000 0x10000>;
353 #address-cells = <1>;
358 compatible = "sirf,prima2-tsc";
359 reg = <0xb0110000 0x10000>;
364 gpio: pinctrl@b0120000 {
366 #interrupt-cells = <2>;
367 compatible = "sirf,prima2-pinctrl";
368 reg = <0xb0120000 0x10000>;
369 interrupts = <43 44 45 46 47>;
371 interrupt-controller;
373 lcd_16pins_a: lcd0@0 {
375 sirf,pins = "lcd_16bitsgrp";
376 sirf,function = "lcd_16bits";
379 lcd_18pins_a: lcd0@1 {
381 sirf,pins = "lcd_18bitsgrp";
382 sirf,function = "lcd_18bits";
385 lcd_24pins_a: lcd0@2 {
387 sirf,pins = "lcd_24bitsgrp";
388 sirf,function = "lcd_24bits";
391 lcdrom_pins_a: lcdrom0@0 {
393 sirf,pins = "lcdromgrp";
394 sirf,function = "lcdrom";
397 uart0_pins_a: uart0@0 {
399 sirf,pins = "uart0grp";
400 sirf,function = "uart0";
403 uart0_noflow_pins_a: uart0@1 {
405 sirf,pins = "uart0_nostreamctrlgrp";
406 sirf,function = "uart0_nostreamctrl";
409 uart1_pins_a: uart1@0 {
411 sirf,pins = "uart1grp";
412 sirf,function = "uart1";
415 uart2_pins_a: uart2@0 {
417 sirf,pins = "uart2grp";
418 sirf,function = "uart2";
421 uart2_noflow_pins_a: uart2@1 {
423 sirf,pins = "uart2_nostreamctrlgrp";
424 sirf,function = "uart2_nostreamctrl";
427 spi0_pins_a: spi0@0 {
429 sirf,pins = "spi0grp";
430 sirf,function = "spi0";
433 spi1_pins_a: spi1@0 {
435 sirf,pins = "spi1grp";
436 sirf,function = "spi1";
439 i2c0_pins_a: i2c0@0 {
441 sirf,pins = "i2c0grp";
442 sirf,function = "i2c0";
445 i2c1_pins_a: i2c1@0 {
447 sirf,pins = "i2c1grp";
448 sirf,function = "i2c1";
451 pwm0_pins_a: pwm0@0 {
453 sirf,pins = "pwm0grp";
454 sirf,function = "pwm0";
457 pwm1_pins_a: pwm1@0 {
459 sirf,pins = "pwm1grp";
460 sirf,function = "pwm1";
463 pwm2_pins_a: pwm2@0 {
465 sirf,pins = "pwm2grp";
466 sirf,function = "pwm2";
469 pwm3_pins_a: pwm3@0 {
471 sirf,pins = "pwm3grp";
472 sirf,function = "pwm3";
477 sirf,pins = "gpsgrp";
478 sirf,function = "gps";
483 sirf,pins = "vipgrp";
484 sirf,function = "vip";
487 sdmmc0_pins_a: sdmmc0@0 {
489 sirf,pins = "sdmmc0grp";
490 sirf,function = "sdmmc0";
493 sdmmc1_pins_a: sdmmc1@0 {
495 sirf,pins = "sdmmc1grp";
496 sirf,function = "sdmmc1";
499 sdmmc2_pins_a: sdmmc2@0 {
501 sirf,pins = "sdmmc2grp";
502 sirf,function = "sdmmc2";
505 sdmmc3_pins_a: sdmmc3@0 {
507 sirf,pins = "sdmmc3grp";
508 sirf,function = "sdmmc3";
511 sdmmc4_pins_a: sdmmc4@0 {
513 sirf,pins = "sdmmc4grp";
514 sirf,function = "sdmmc4";
517 sdmmc5_pins_a: sdmmc5@0 {
519 sirf,pins = "sdmmc5grp";
520 sirf,function = "sdmmc5";
525 sirf,pins = "i2sgrp";
526 sirf,function = "i2s";
529 ac97_pins_a: ac97@0 {
531 sirf,pins = "ac97grp";
532 sirf,function = "ac97";
535 nand_pins_a: nand@0 {
537 sirf,pins = "nandgrp";
538 sirf,function = "nand";
541 usp0_pins_a: usp0@0 {
543 sirf,pins = "usp0grp";
544 sirf,function = "usp0";
547 usp0_uart_nostreamctrl_pins_a: usp0@1 {
550 "usp0_uart_nostreamctrl_grp";
552 "usp0_uart_nostreamctrl";
555 usp0_only_utfs_pins_a: usp0@2 {
557 sirf,pins = "usp0_only_utfs_grp";
558 sirf,function = "usp0_only_utfs";
561 usp0_only_urfs_pins_a: usp0@3 {
563 sirf,pins = "usp0_only_urfs_grp";
564 sirf,function = "usp0_only_urfs";
567 usp1_pins_a: usp1@0 {
569 sirf,pins = "usp1grp";
570 sirf,function = "usp1";
573 usp1_uart_nostreamctrl_pins_a: usp1@1 {
576 "usp1_uart_nostreamctrl_grp";
578 "usp1_uart_nostreamctrl";
581 usp2_pins_a: usp2@0 {
583 sirf,pins = "usp2grp";
584 sirf,function = "usp2";
587 usp2_uart_nostreamctrl_pins_a: usp2@1 {
590 "usp2_uart_nostreamctrl_grp";
592 "usp2_uart_nostreamctrl";
595 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
597 sirf,pins = "usb0_utmi_drvbusgrp";
598 sirf,function = "usb0_utmi_drvbus";
601 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
603 sirf,pins = "usb1_utmi_drvbusgrp";
604 sirf,function = "usb1_utmi_drvbus";
607 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
609 sirf,pins = "usb1_dp_dngrp";
610 sirf,function = "usb1_dp_dn";
613 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
614 uart1_route_io_usb1 {
615 sirf,pins = "uart1_route_io_usb1grp";
616 sirf,function = "uart1_route_io_usb1";
619 warm_rst_pins_a: warm_rst@0 {
621 sirf,pins = "warm_rstgrp";
622 sirf,function = "warm_rst";
625 pulse_count_pins_a: pulse_count@0 {
627 sirf,pins = "pulse_countgrp";
628 sirf,function = "pulse_count";
631 cko0_pins_a: cko0@0 {
633 sirf,pins = "cko0grp";
634 sirf,function = "cko0";
637 cko1_pins_a: cko1@0 {
639 sirf,pins = "cko1grp";
640 sirf,function = "cko1";
646 compatible = "sirf,prima2-pwm";
647 reg = <0xb0130000 0x10000>;
652 compatible = "sirf,prima2-efuse";
653 reg = <0xb0140000 0x10000>;
658 compatible = "sirf,prima2-pulsec";
659 reg = <0xb0150000 0x10000>;
665 compatible = "sirf,prima2-pciiobg", "simple-bus";
666 #address-cells = <1>;
668 ranges = <0x56000000 0x56000000 0x1b00000>;
670 sd0: sdhci@56000000 {
672 compatible = "sirf,prima2-sdhc";
673 reg = <0x56000000 0x100000>;
680 sd1: sdhci@56100000 {
682 compatible = "sirf,prima2-sdhc";
683 reg = <0x56100000 0x100000>;
690 sd2: sdhci@56200000 {
692 compatible = "sirf,prima2-sdhc";
693 reg = <0x56200000 0x100000>;
699 sd3: sdhci@56300000 {
701 compatible = "sirf,prima2-sdhc";
702 reg = <0x56300000 0x100000>;
708 sd4: sdhci@56400000 {
710 compatible = "sirf,prima2-sdhc";
711 reg = <0x56400000 0x100000>;
717 sd5: sdhci@56500000 {
719 compatible = "sirf,prima2-sdhc";
720 reg = <0x56500000 0x100000>;
726 compatible = "sirf,prima2-pcicp";
727 reg = <0x57900000 0x100000>;
731 rom-interface@57a00000 {
732 compatible = "sirf,prima2-romif";
733 reg = <0x57a00000 0x100000>;
739 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
740 #address-cells = <1>;
742 reg = <0x80030000 0x10000>;
745 compatible = "sirf,prima2-gpsrtc";
746 reg = <0x1000 0x1000>;
747 interrupts = <55 56 57>;
751 compatible = "sirf,prima2-sysrtc";
752 reg = <0x2000 0x1000>;
753 interrupts = <52 53 54>;
757 compatible = "sirf,prima2-minigpsrtc";
758 reg = <0x2000 0x1000>;
763 compatible = "sirf,prima2-pwrc";
764 reg = <0x3000 0x1000>;
770 compatible = "simple-bus";
771 #address-cells = <1>;
773 ranges = <0xb8000000 0xb8000000 0x40000>;
776 compatible = "chipidea,ci13611a-prima2";
777 reg = <0xb8000000 0x10000>;
783 compatible = "chipidea,ci13611a-prima2";
784 reg = <0xb8010000 0x10000>;
790 compatible = "synopsys,dwc-ahsata";
791 reg = <0xb8020000 0x10000>;
796 compatible = "sirf,prima2-security";
797 reg = <0xb8030000 0x10000>;