2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
36 compatible = "simple-bus";
39 ranges = <0x40000000 0x40000000 0x80000000>;
41 l2-cache-controller@80040000 {
42 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
43 reg = <0x80040000 0x1000>;
45 arm,tag-latency = <1 1 1>;
46 arm,data-latency = <1 1 1>;
47 arm,filter-ranges = <0 0x40000000>;
50 intc: interrupt-controller@80020000 {
51 #interrupt-cells = <1>;
53 compatible = "sirf,prima2-intc";
54 reg = <0x80020000 0x1000>;
58 compatible = "simple-bus";
61 ranges = <0x88000000 0x88000000 0x40000>;
63 clks: clock-controller@88000000 {
64 compatible = "sirf,prima2-clkc";
65 reg = <0x88000000 0x1000>;
70 reset-controller@88010000 {
71 compatible = "sirf,prima2-rstc";
72 reg = <0x88010000 0x1000>;
75 rsc-controller@88020000 {
76 compatible = "sirf,prima2-rsc";
77 reg = <0x88020000 0x1000>;
82 compatible = "simple-bus";
85 ranges = <0x90000000 0x90000000 0x10000>;
87 memory-controller@90000000 {
88 compatible = "sirf,prima2-memc";
89 reg = <0x90000000 0x10000>;
96 compatible = "simple-bus";
99 ranges = <0x90010000 0x90010000 0x30000>;
102 compatible = "sirf,prima2-lcd";
103 reg = <0x90010000 0x20000>;
108 compatible = "sirf,prima2-vpp";
109 reg = <0x90020000 0x10000>;
116 compatible = "simple-bus";
117 #address-cells = <1>;
119 ranges = <0x98000000 0x98000000 0x8000000>;
122 compatible = "powervr,sgx531";
123 reg = <0x98000000 0x8000000>;
130 compatible = "simple-bus";
131 #address-cells = <1>;
133 ranges = <0xa0000000 0xa0000000 0x8000000>;
135 multimedia@a0000000 {
136 compatible = "sirf,prima2-video-codec";
137 reg = <0xa0000000 0x8000000>;
144 compatible = "simple-bus";
145 #address-cells = <1>;
147 ranges = <0xa8000000 0xa8000000 0x2000000>;
150 compatible = "sirf,prima2-dspif";
151 reg = <0xa8000000 0x10000>;
156 compatible = "sirf,prima2-gps";
157 reg = <0xa8010000 0x10000>;
163 compatible = "sirf,prima2-dsp";
164 reg = <0xa9000000 0x1000000>;
171 compatible = "simple-bus";
172 #address-cells = <1>;
174 ranges = <0xb0000000 0xb0000000 0x180000>;
177 compatible = "sirf,prima2-tick";
178 reg = <0xb0020000 0x1000>;
183 compatible = "sirf,prima2-nand";
184 reg = <0xb0030000 0x10000>;
190 compatible = "sirf,prima2-audio";
191 reg = <0xb0040000 0x10000>;
196 uart0: uart@b0050000 {
198 compatible = "sirf,prima2-uart";
199 reg = <0xb0050000 0x1000>;
203 sirf,uart-dma-rx-channel = <21>;
204 sirf,uart-dma-tx-channel = <2>;
207 uart1: uart@b0060000 {
209 compatible = "sirf,prima2-uart";
210 reg = <0xb0060000 0x1000>;
216 uart2: uart@b0070000 {
218 compatible = "sirf,prima2-uart";
219 reg = <0xb0070000 0x1000>;
223 sirf,uart-dma-rx-channel = <6>;
224 sirf,uart-dma-tx-channel = <7>;
229 compatible = "sirf,prima2-usp";
230 reg = <0xb0080000 0x10000>;
234 sirf,usp-dma-rx-channel = <17>;
235 sirf,usp-dma-tx-channel = <18>;
240 compatible = "sirf,prima2-usp";
241 reg = <0xb0090000 0x10000>;
245 sirf,usp-dma-rx-channel = <14>;
246 sirf,usp-dma-tx-channel = <15>;
251 compatible = "sirf,prima2-usp";
252 reg = <0xb00a0000 0x10000>;
256 sirf,usp-dma-rx-channel = <10>;
257 sirf,usp-dma-tx-channel = <11>;
260 dmac0: dma-controller@b00b0000 {
262 compatible = "sirf,prima2-dmac";
263 reg = <0xb00b0000 0x10000>;
268 dmac1: dma-controller@b0160000 {
270 compatible = "sirf,prima2-dmac";
271 reg = <0xb0160000 0x10000>;
277 compatible = "sirf,prima2-vip";
278 reg = <0xb00C0000 0x10000>;
284 compatible = "sirf,prima2-spi";
285 reg = <0xb00d0000 0x10000>;
292 compatible = "sirf,prima2-spi";
293 reg = <0xb0170000 0x10000>;
300 compatible = "sirf,prima2-i2c";
301 reg = <0xb00e0000 0x10000>;
308 compatible = "sirf,prima2-i2c";
309 reg = <0xb00f0000 0x10000>;
315 compatible = "sirf,prima2-tsc";
316 reg = <0xb0110000 0x10000>;
321 gpio: pinctrl@b0120000 {
323 #interrupt-cells = <2>;
324 compatible = "sirf,prima2-pinctrl";
325 reg = <0xb0120000 0x10000>;
326 interrupts = <43 44 45 46 47>;
328 interrupt-controller;
330 lcd_16pins_a: lcd0@0 {
332 sirf,pins = "lcd_16bitsgrp";
333 sirf,function = "lcd_16bits";
336 lcd_18pins_a: lcd0@1 {
338 sirf,pins = "lcd_18bitsgrp";
339 sirf,function = "lcd_18bits";
342 lcd_24pins_a: lcd0@2 {
344 sirf,pins = "lcd_24bitsgrp";
345 sirf,function = "lcd_24bits";
348 lcdrom_pins_a: lcdrom0@0 {
350 sirf,pins = "lcdromgrp";
351 sirf,function = "lcdrom";
354 uart0_pins_a: uart0@0 {
356 sirf,pins = "uart0grp";
357 sirf,function = "uart0";
360 uart1_pins_a: uart1@0 {
362 sirf,pins = "uart1grp";
363 sirf,function = "uart1";
366 uart2_pins_a: uart2@0 {
368 sirf,pins = "uart2grp";
369 sirf,function = "uart2";
372 uart2_noflow_pins_a: uart2@1 {
374 sirf,pins = "uart2_nostreamctrlgrp";
375 sirf,function = "uart2_nostreamctrl";
378 spi0_pins_a: spi0@0 {
380 sirf,pins = "spi0grp";
381 sirf,function = "spi0";
384 spi1_pins_a: spi1@0 {
386 sirf,pins = "spi1grp";
387 sirf,function = "spi1";
390 i2c0_pins_a: i2c0@0 {
392 sirf,pins = "i2c0grp";
393 sirf,function = "i2c0";
396 i2c1_pins_a: i2c1@0 {
398 sirf,pins = "i2c1grp";
399 sirf,function = "i2c1";
402 pwm0_pins_a: pwm0@0 {
404 sirf,pins = "pwm0grp";
405 sirf,function = "pwm0";
408 pwm1_pins_a: pwm1@0 {
410 sirf,pins = "pwm1grp";
411 sirf,function = "pwm1";
414 pwm2_pins_a: pwm2@0 {
416 sirf,pins = "pwm2grp";
417 sirf,function = "pwm2";
420 pwm3_pins_a: pwm3@0 {
422 sirf,pins = "pwm3grp";
423 sirf,function = "pwm3";
428 sirf,pins = "gpsgrp";
429 sirf,function = "gps";
434 sirf,pins = "vipgrp";
435 sirf,function = "vip";
438 sdmmc0_pins_a: sdmmc0@0 {
440 sirf,pins = "sdmmc0grp";
441 sirf,function = "sdmmc0";
444 sdmmc1_pins_a: sdmmc1@0 {
446 sirf,pins = "sdmmc1grp";
447 sirf,function = "sdmmc1";
450 sdmmc2_pins_a: sdmmc2@0 {
452 sirf,pins = "sdmmc2grp";
453 sirf,function = "sdmmc2";
456 sdmmc3_pins_a: sdmmc3@0 {
458 sirf,pins = "sdmmc3grp";
459 sirf,function = "sdmmc3";
462 sdmmc4_pins_a: sdmmc4@0 {
464 sirf,pins = "sdmmc4grp";
465 sirf,function = "sdmmc4";
468 sdmmc5_pins_a: sdmmc5@0 {
470 sirf,pins = "sdmmc5grp";
471 sirf,function = "sdmmc5";
476 sirf,pins = "i2sgrp";
477 sirf,function = "i2s";
480 ac97_pins_a: ac97@0 {
482 sirf,pins = "ac97grp";
483 sirf,function = "ac97";
486 nand_pins_a: nand@0 {
488 sirf,pins = "nandgrp";
489 sirf,function = "nand";
492 usp0_pins_a: usp0@0 {
494 sirf,pins = "usp0grp";
495 sirf,function = "usp0";
498 usp1_pins_a: usp1@0 {
500 sirf,pins = "usp1grp";
501 sirf,function = "usp1";
504 usp2_pins_a: usp2@0 {
506 sirf,pins = "usp2grp";
507 sirf,function = "usp2";
510 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
512 sirf,pins = "usb0_utmi_drvbusgrp";
513 sirf,function = "usb0_utmi_drvbus";
516 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
518 sirf,pins = "usb1_utmi_drvbusgrp";
519 sirf,function = "usb1_utmi_drvbus";
522 warm_rst_pins_a: warm_rst@0 {
524 sirf,pins = "warm_rstgrp";
525 sirf,function = "warm_rst";
528 pulse_count_pins_a: pulse_count@0 {
530 sirf,pins = "pulse_countgrp";
531 sirf,function = "pulse_count";
534 cko0_pins_a: cko0@0 {
536 sirf,pins = "cko0grp";
537 sirf,function = "cko0";
540 cko1_pins_a: cko1@0 {
542 sirf,pins = "cko1grp";
543 sirf,function = "cko1";
549 compatible = "sirf,prima2-pwm";
550 reg = <0xb0130000 0x10000>;
555 compatible = "sirf,prima2-efuse";
556 reg = <0xb0140000 0x10000>;
561 compatible = "sirf,prima2-pulsec";
562 reg = <0xb0150000 0x10000>;
568 compatible = "sirf,prima2-pciiobg", "simple-bus";
569 #address-cells = <1>;
571 ranges = <0x56000000 0x56000000 0x1b00000>;
573 sd0: sdhci@56000000 {
575 compatible = "sirf,prima2-sdhc";
576 reg = <0x56000000 0x100000>;
580 sd1: sdhci@56100000 {
582 compatible = "sirf,prima2-sdhc";
583 reg = <0x56100000 0x100000>;
587 sd2: sdhci@56200000 {
589 compatible = "sirf,prima2-sdhc";
590 reg = <0x56200000 0x100000>;
594 sd3: sdhci@56300000 {
596 compatible = "sirf,prima2-sdhc";
597 reg = <0x56300000 0x100000>;
601 sd4: sdhci@56400000 {
603 compatible = "sirf,prima2-sdhc";
604 reg = <0x56400000 0x100000>;
608 sd5: sdhci@56500000 {
610 compatible = "sirf,prima2-sdhc";
611 reg = <0x56500000 0x100000>;
616 compatible = "sirf,prima2-pcicp";
617 reg = <0x57900000 0x100000>;
621 rom-interface@57a00000 {
622 compatible = "sirf,prima2-romif";
623 reg = <0x57a00000 0x100000>;
629 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
630 #address-cells = <1>;
632 reg = <0x80030000 0x10000>;
635 compatible = "sirf,prima2-gpsrtc";
636 reg = <0x1000 0x1000>;
637 interrupts = <55 56 57>;
641 compatible = "sirf,prima2-sysrtc";
642 reg = <0x2000 0x1000>;
643 interrupts = <52 53 54>;
647 compatible = "sirf,prima2-pwrc";
648 reg = <0x3000 0x1000>;
654 compatible = "simple-bus";
655 #address-cells = <1>;
657 ranges = <0xb8000000 0xb8000000 0x40000>;
660 compatible = "chipidea,ci13611a-prima2";
661 reg = <0xb8000000 0x10000>;
667 compatible = "chipidea,ci13611a-prima2";
668 reg = <0xb8010000 0x10000>;
674 compatible = "synopsys,dwc-ahsata";
675 reg = <0xb8020000 0x10000>;
680 compatible = "sirf,prima2-security";
681 reg = <0xb8030000 0x10000>;