2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
40 clock-latency = <150000>;
45 compatible = "simple-bus";
48 ranges = <0x40000000 0x40000000 0x80000000>;
50 l2-cache-controller@80040000 {
51 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
52 reg = <0x80040000 0x1000>;
54 arm,tag-latency = <1 1 1>;
55 arm,data-latency = <1 1 1>;
56 arm,filter-ranges = <0 0x40000000>;
59 intc: interrupt-controller@80020000 {
60 #interrupt-cells = <1>;
62 compatible = "sirf,prima2-intc";
63 reg = <0x80020000 0x1000>;
67 compatible = "simple-bus";
70 ranges = <0x88000000 0x88000000 0x40000>;
72 clks: clock-controller@88000000 {
73 compatible = "sirf,prima2-clkc";
74 reg = <0x88000000 0x1000>;
79 reset-controller@88010000 {
80 compatible = "sirf,prima2-rstc";
81 reg = <0x88010000 0x1000>;
84 rsc-controller@88020000 {
85 compatible = "sirf,prima2-rsc";
86 reg = <0x88020000 0x1000>;
90 compatible = "sirf,prima2-cphifbg";
91 reg = <0x88030000 0x1000>;
97 compatible = "simple-bus";
100 ranges = <0x90000000 0x90000000 0x10000>;
102 memory-controller@90000000 {
103 compatible = "sirf,prima2-memc";
104 reg = <0x90000000 0x2000>;
110 compatible = "sirf,prima2-memcmon";
111 reg = <0x90002000 0x200>;
118 compatible = "simple-bus";
119 #address-cells = <1>;
121 ranges = <0x90010000 0x90010000 0x30000>;
124 compatible = "sirf,prima2-lcd";
125 reg = <0x90010000 0x20000>;
130 compatible = "sirf,prima2-vpp";
131 reg = <0x90020000 0x10000>;
138 compatible = "simple-bus";
139 #address-cells = <1>;
141 ranges = <0x98000000 0x98000000 0x8000000>;
144 compatible = "powervr,sgx531";
145 reg = <0x98000000 0x8000000>;
152 compatible = "simple-bus";
153 #address-cells = <1>;
155 ranges = <0xa0000000 0xa0000000 0x8000000>;
157 multimedia@a0000000 {
158 compatible = "sirf,prima2-video-codec";
159 reg = <0xa0000000 0x8000000>;
166 compatible = "simple-bus";
167 #address-cells = <1>;
169 ranges = <0xa8000000 0xa8000000 0x2000000>;
172 compatible = "sirf,prima2-dspif";
173 reg = <0xa8000000 0x10000>;
178 compatible = "sirf,prima2-gps";
179 reg = <0xa8010000 0x10000>;
185 compatible = "sirf,prima2-dsp";
186 reg = <0xa9000000 0x1000000>;
193 compatible = "simple-bus";
194 #address-cells = <1>;
196 ranges = <0xb0000000 0xb0000000 0x180000>,
197 <0x56000000 0x56000000 0x1b00000>;
200 compatible = "sirf,prima2-tick";
201 reg = <0xb0020000 0x1000>;
206 compatible = "sirf,prima2-nand";
207 reg = <0xb0030000 0x10000>;
213 compatible = "sirf,prima2-audio";
214 reg = <0xb0040000 0x10000>;
219 uart0: uart@b0050000 {
221 compatible = "sirf,prima2-uart";
222 reg = <0xb0050000 0x1000>;
226 sirf,uart-dma-rx-channel = <21>;
227 sirf,uart-dma-tx-channel = <2>;
230 uart1: uart@b0060000 {
232 compatible = "sirf,prima2-uart";
233 reg = <0xb0060000 0x1000>;
239 uart2: uart@b0070000 {
241 compatible = "sirf,prima2-uart";
242 reg = <0xb0070000 0x1000>;
246 sirf,uart-dma-rx-channel = <6>;
247 sirf,uart-dma-tx-channel = <7>;
252 compatible = "sirf,prima2-usp";
253 reg = <0xb0080000 0x10000>;
257 sirf,usp-dma-rx-channel = <17>;
258 sirf,usp-dma-tx-channel = <18>;
263 compatible = "sirf,prima2-usp";
264 reg = <0xb0090000 0x10000>;
268 sirf,usp-dma-rx-channel = <14>;
269 sirf,usp-dma-tx-channel = <15>;
274 compatible = "sirf,prima2-usp";
275 reg = <0xb00a0000 0x10000>;
279 sirf,usp-dma-rx-channel = <10>;
280 sirf,usp-dma-tx-channel = <11>;
283 dmac0: dma-controller@b00b0000 {
285 compatible = "sirf,prima2-dmac";
286 reg = <0xb00b0000 0x10000>;
291 dmac1: dma-controller@b0160000 {
293 compatible = "sirf,prima2-dmac";
294 reg = <0xb0160000 0x10000>;
300 compatible = "sirf,prima2-vip";
301 reg = <0xb00C0000 0x10000>;
304 sirf,vip-dma-rx-channel = <16>;
309 compatible = "sirf,prima2-spi";
310 reg = <0xb00d0000 0x10000>;
312 sirf,spi-num-chipselects = <1>;
313 sirf,spi-dma-rx-channel = <25>;
314 sirf,spi-dma-tx-channel = <20>;
315 #address-cells = <1>;
323 compatible = "sirf,prima2-spi";
324 reg = <0xb0170000 0x10000>;
326 sirf,spi-num-chipselects = <1>;
327 sirf,spi-dma-rx-channel = <12>;
328 sirf,spi-dma-tx-channel = <13>;
329 #address-cells = <1>;
337 compatible = "sirf,prima2-i2c";
338 reg = <0xb00e0000 0x10000>;
341 #address-cells = <1>;
347 compatible = "sirf,prima2-i2c";
348 reg = <0xb00f0000 0x10000>;
351 #address-cells = <1>;
356 compatible = "sirf,prima2-tsc";
357 reg = <0xb0110000 0x10000>;
362 gpio: pinctrl@b0120000 {
364 #interrupt-cells = <2>;
365 compatible = "sirf,prima2-pinctrl";
366 reg = <0xb0120000 0x10000>;
367 interrupts = <43 44 45 46 47>;
369 interrupt-controller;
371 lcd_16pins_a: lcd0@0 {
373 sirf,pins = "lcd_16bitsgrp";
374 sirf,function = "lcd_16bits";
377 lcd_18pins_a: lcd0@1 {
379 sirf,pins = "lcd_18bitsgrp";
380 sirf,function = "lcd_18bits";
383 lcd_24pins_a: lcd0@2 {
385 sirf,pins = "lcd_24bitsgrp";
386 sirf,function = "lcd_24bits";
389 lcdrom_pins_a: lcdrom0@0 {
391 sirf,pins = "lcdromgrp";
392 sirf,function = "lcdrom";
395 uart0_pins_a: uart0@0 {
397 sirf,pins = "uart0grp";
398 sirf,function = "uart0";
401 uart0_noflow_pins_a: uart0@1 {
403 sirf,pins = "uart0_nostreamctrlgrp";
404 sirf,function = "uart0_nostreamctrl";
407 uart1_pins_a: uart1@0 {
409 sirf,pins = "uart1grp";
410 sirf,function = "uart1";
413 uart2_pins_a: uart2@0 {
415 sirf,pins = "uart2grp";
416 sirf,function = "uart2";
419 uart2_noflow_pins_a: uart2@1 {
421 sirf,pins = "uart2_nostreamctrlgrp";
422 sirf,function = "uart2_nostreamctrl";
425 spi0_pins_a: spi0@0 {
427 sirf,pins = "spi0grp";
428 sirf,function = "spi0";
431 spi1_pins_a: spi1@0 {
433 sirf,pins = "spi1grp";
434 sirf,function = "spi1";
437 i2c0_pins_a: i2c0@0 {
439 sirf,pins = "i2c0grp";
440 sirf,function = "i2c0";
443 i2c1_pins_a: i2c1@0 {
445 sirf,pins = "i2c1grp";
446 sirf,function = "i2c1";
449 pwm0_pins_a: pwm0@0 {
451 sirf,pins = "pwm0grp";
452 sirf,function = "pwm0";
455 pwm1_pins_a: pwm1@0 {
457 sirf,pins = "pwm1grp";
458 sirf,function = "pwm1";
461 pwm2_pins_a: pwm2@0 {
463 sirf,pins = "pwm2grp";
464 sirf,function = "pwm2";
467 pwm3_pins_a: pwm3@0 {
469 sirf,pins = "pwm3grp";
470 sirf,function = "pwm3";
475 sirf,pins = "gpsgrp";
476 sirf,function = "gps";
481 sirf,pins = "vipgrp";
482 sirf,function = "vip";
485 sdmmc0_pins_a: sdmmc0@0 {
487 sirf,pins = "sdmmc0grp";
488 sirf,function = "sdmmc0";
491 sdmmc1_pins_a: sdmmc1@0 {
493 sirf,pins = "sdmmc1grp";
494 sirf,function = "sdmmc1";
497 sdmmc2_pins_a: sdmmc2@0 {
499 sirf,pins = "sdmmc2grp";
500 sirf,function = "sdmmc2";
503 sdmmc3_pins_a: sdmmc3@0 {
505 sirf,pins = "sdmmc3grp";
506 sirf,function = "sdmmc3";
509 sdmmc4_pins_a: sdmmc4@0 {
511 sirf,pins = "sdmmc4grp";
512 sirf,function = "sdmmc4";
515 sdmmc5_pins_a: sdmmc5@0 {
517 sirf,pins = "sdmmc5grp";
518 sirf,function = "sdmmc5";
523 sirf,pins = "i2sgrp";
524 sirf,function = "i2s";
527 ac97_pins_a: ac97@0 {
529 sirf,pins = "ac97grp";
530 sirf,function = "ac97";
533 nand_pins_a: nand@0 {
535 sirf,pins = "nandgrp";
536 sirf,function = "nand";
539 usp0_pins_a: usp0@0 {
541 sirf,pins = "usp0grp";
542 sirf,function = "usp0";
545 usp0_uart_nostreamctrl_pins_a: usp0@1 {
548 "usp0_uart_nostreamctrl_grp";
550 "usp0_uart_nostreamctrl";
553 usp0_only_utfs_pins_a: usp0@2 {
555 sirf,pins = "usp0_only_utfs_grp";
556 sirf,function = "usp0_only_utfs";
559 usp0_only_urfs_pins_a: usp0@3 {
561 sirf,pins = "usp0_only_urfs_grp";
562 sirf,function = "usp0_only_urfs";
565 usp1_pins_a: usp1@0 {
567 sirf,pins = "usp1grp";
568 sirf,function = "usp1";
571 usp1_uart_nostreamctrl_pins_a: usp1@1 {
574 "usp1_uart_nostreamctrl_grp";
576 "usp1_uart_nostreamctrl";
579 usp2_pins_a: usp2@0 {
581 sirf,pins = "usp2grp";
582 sirf,function = "usp2";
585 usp2_uart_nostreamctrl_pins_a: usp2@1 {
588 "usp2_uart_nostreamctrl_grp";
590 "usp2_uart_nostreamctrl";
593 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
595 sirf,pins = "usb0_utmi_drvbusgrp";
596 sirf,function = "usb0_utmi_drvbus";
599 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
601 sirf,pins = "usb1_utmi_drvbusgrp";
602 sirf,function = "usb1_utmi_drvbus";
605 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
607 sirf,pins = "usb1_dp_dngrp";
608 sirf,function = "usb1_dp_dn";
611 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
612 uart1_route_io_usb1 {
613 sirf,pins = "uart1_route_io_usb1grp";
614 sirf,function = "uart1_route_io_usb1";
617 warm_rst_pins_a: warm_rst@0 {
619 sirf,pins = "warm_rstgrp";
620 sirf,function = "warm_rst";
623 pulse_count_pins_a: pulse_count@0 {
625 sirf,pins = "pulse_countgrp";
626 sirf,function = "pulse_count";
629 cko0_pins_a: cko0@0 {
631 sirf,pins = "cko0grp";
632 sirf,function = "cko0";
635 cko1_pins_a: cko1@0 {
637 sirf,pins = "cko1grp";
638 sirf,function = "cko1";
644 compatible = "sirf,prima2-pwm";
645 reg = <0xb0130000 0x10000>;
650 compatible = "sirf,prima2-efuse";
651 reg = <0xb0140000 0x10000>;
656 compatible = "sirf,prima2-pulsec";
657 reg = <0xb0150000 0x10000>;
663 compatible = "sirf,prima2-pciiobg", "simple-bus";
664 #address-cells = <1>;
666 ranges = <0x56000000 0x56000000 0x1b00000>;
668 sd0: sdhci@56000000 {
670 compatible = "sirf,prima2-sdhc";
671 reg = <0x56000000 0x100000>;
678 sd1: sdhci@56100000 {
680 compatible = "sirf,prima2-sdhc";
681 reg = <0x56100000 0x100000>;
688 sd2: sdhci@56200000 {
690 compatible = "sirf,prima2-sdhc";
691 reg = <0x56200000 0x100000>;
697 sd3: sdhci@56300000 {
699 compatible = "sirf,prima2-sdhc";
700 reg = <0x56300000 0x100000>;
706 sd4: sdhci@56400000 {
708 compatible = "sirf,prima2-sdhc";
709 reg = <0x56400000 0x100000>;
715 sd5: sdhci@56500000 {
717 compatible = "sirf,prima2-sdhc";
718 reg = <0x56500000 0x100000>;
724 compatible = "sirf,prima2-pcicp";
725 reg = <0x57900000 0x100000>;
729 rom-interface@57a00000 {
730 compatible = "sirf,prima2-romif";
731 reg = <0x57a00000 0x100000>;
737 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
738 #address-cells = <1>;
740 reg = <0x80030000 0x10000>;
743 compatible = "sirf,prima2-gpsrtc";
744 reg = <0x1000 0x1000>;
745 interrupts = <55 56 57>;
749 compatible = "sirf,prima2-sysrtc";
750 reg = <0x2000 0x1000>;
751 interrupts = <52 53 54>;
755 compatible = "sirf,prima2-minigpsrtc";
756 reg = <0x2000 0x1000>;
761 compatible = "sirf,prima2-pwrc";
762 reg = <0x3000 0x1000>;
768 compatible = "simple-bus";
769 #address-cells = <1>;
771 ranges = <0xb8000000 0xb8000000 0x40000>;
774 compatible = "chipidea,ci13611a-prima2";
775 reg = <0xb8000000 0x10000>;
781 compatible = "chipidea,ci13611a-prima2";
782 reg = <0xb8010000 0x10000>;
788 compatible = "synopsys,dwc-ahsata";
789 reg = <0xb8020000 0x10000>;
794 compatible = "sirf,prima2-security";
795 reg = <0xb8030000 0x10000>;