1 /* The pxa3xx skeleton simply augments the 2xx version */
5 model = "Marvell PXA3xx familiy SoC";
6 compatible = "marvell,pxa3xx";
10 compatible = "mrvl,pwri2c";
11 reg = <0x40f500c0 0x30>;
13 clocks = <&clks CLK_PWRI2C>;
14 #address-cells = <0x1>;
19 nand0: nand@43100000 {
20 compatible = "marvell,pxa3xx-nand";
21 reg = <0x43100000 90>;
23 clocks = <&clks CLK_NAND>;
29 pxairq: interrupt-controller@40d00000 {
30 marvell,intc-priority;
31 marvell,intc-nr-irqs = <56>;
35 compatible = "intel,pxa3xx-gpio";
36 reg = <0x40e00000 0x10000>;
37 clocks = <&clks CLK_GPIO>;
38 interrupt-names = "gpio0", "gpio1", "gpio_mux";
39 interrupts = <8 9 10>;
43 #interrupt-cells = <0x2>;
49 * The muxing of external clocks/internal dividers for osc* clock
50 * sources has been hidden under the carpet by now.
56 clks: pxa3xx_clks@41300004 {
57 compatible = "marvell,pxa300-clocks";
64 compatible = "marvell,pxa-timer";
65 reg = <0x40a00000 0x20>;
67 clocks = <&clks CLK_OSTIMER>;