arch/arm/boot/dts/r8a7778-bockw.dts

   1 /*
   2  * Reference Device Tree Source for the Bock-W board
   3  *
   4  * Copyright (C) 2013  Renesas Solutions Corp.
   5  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * based on r8a7779
   8  *
   9  * Copyright (C) 2013 Renesas Solutions Corp.
  10  * Copyright (C) 2013 Simon Horman
  11  *
  12  * This file is licensed under the terms of the GNU General Public License
  13  * version 2.  This program is licensed "as is" without any warranty of any
  14  * kind, whether express or implied.
  15  */
  16
  17 /dts-v1/;
  18 #include "r8a7778.dtsi"
  19 #include <dt-bindings/interrupt-controller/irq.h>
  20 #include <dt-bindings/gpio/gpio.h>
  21
  22 / {
  23         model = "bockw";
  24         compatible = "renesas,bockw", "renesas,r8a7778";
  25
  26         aliases {
  27                 serial0 = &scif0;
  28         };
  29
  30         chosen {
  31                 bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
  32                 stdout-path = &scif0;
  33         };
  34
  35         memory {
  36                 device_type = "memory";
  37                 reg = <0x60000000 0x10000000>;
  38         };
  39
  40         fixedregulator3v3: fixedregulator@0 {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "fixed-3.3V";
  43                 regulator-min-microvolt = <3300000>;
  44                 regulator-max-microvolt = <3300000>;
  45                 regulator-boot-on;
  46                 regulator-always-on;
  47         };
  48 };
  49
  50 &bsc {
  51         ethernet@18300000 {
  52                 compatible = "smsc,lan9220", "smsc,lan9115";
  53                 reg = <0x18300000 0x1000>;
  54
  55                 phy-mode = "mii";
  56                 interrupt-parent = <&irqpin>;
  57                 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
  58                 reg-io-width = <4>;
  59                 vddvario-supply = <&fixedregulator3v3>;
  60                 vdd33a-supply = <&fixedregulator3v3>;
  61         };
  62 };
  63
  64 &extal_clk {
  65         clock-frequency = <33333333>;
  66 };
  67
  68 &mmcif {
  69         pinctrl-0 = <&mmc_pins>;
  70         pinctrl-names = "default";
  71
  72         vmmc-supply = <&fixedregulator3v3>;
  73         bus-width = <8>;
  74         broken-cd;
  75         status = "okay";
  76 };
  77
  78 &irqpin {
  79         status = "okay";
  80 };
  81
  82 &tmu0 {
  83         status = "okay";
  84 };
  85
  86 &pfc {
  87         scif0_pins: serial0 {
  88                 renesas,groups = "scif0_data_a", "scif0_ctrl";
  89                 renesas,function = "scif0";
  90         };
  91
  92         mmc_pins: mmc {
  93                 renesas,groups = "mmc_data8", "mmc_ctrl";
  94                 renesas,function = "mmc";
  95         };
  96
  97         sdhi0_pins: sd0 {
  98                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
  99                                   "sdhi0_cd";
 100                 renesas,function = "sdhi0";
 101         };
 102
 103         hspi0_pins: hspi0 {
 104                 renesas,groups = "hspi0_a";
 105                 renesas,function = "hspi0";
 106         };
 107
 108         usb0_pins: usb0 {
 109                 renesas,groups = "usb0";
 110                 renesas,function = "usb0";
 111         };
 112
 113         usb1_pins: usb1 {
 114                 renesas,groups = "usb1";
 115                 renesas,function = "usb1";
 116         };
 117
 118         vin0_pins: vin0 {
 119                 renesas,groups = "vin0_data8", "vin0_clk";
 120                 renesas,function = "vin0";
 121         };
 122
 123         vin1_pins: vin1 {
 124                 renesas,groups = "vin1_data8", "vin1_clk";
 125                 renesas,function = "vin1";
 126         };
 127 };
 128
 129 &sdhi0 {
 130         pinctrl-0 = <&sdhi0_pins>;
 131         pinctrl-names = "default";
 132
 133         vmmc-supply = <&fixedregulator3v3>;
 134         bus-width = <4>;
 135         status = "okay";
 136         wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
 137 };
 138
 139 &hspi0 {
 140         pinctrl-0 = <&hspi0_pins>;
 141         pinctrl-names = "default";
 142         status = "okay";
 143
 144         flash: flash@0 {
 145                 #address-cells = <1>;
 146                 #size-cells = <1>;
 147                 compatible = "spansion,s25fl008k";
 148                 reg = <0>;
 149                 spi-max-frequency = <104000000>;
 150                 m25p,fast-read;
 151
 152                 partition@0 {
 153                         label = "data(spi)";
 154                         reg = <0x00000000 0x00100000>;
 155                 };
 156         };
 157 };
 158
 159 &scif0 {
 160         pinctrl-0 = <&scif0_pins>;
 161         pinctrl-names = "default";
 162
 163         status = "okay";
 164 };