2 * Device Tree Source for the Marzen board
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Simon Horman
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 #include "r8a7779.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
19 compatible = "renesas,marzen", "renesas,r8a7779";
27 bootargs = "ignore_loglevel root=/dev/nfs ip=on";
32 device_type = "memory";
33 reg = <0x60000000 0x40000000>;
36 fixedregulator3v3: fixedregulator@0 {
37 compatible = "regulator-fixed";
38 regulator-name = "fixed-3.3V";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
46 compatible = "smsc,lan9220", "smsc,lan9115";
47 reg = <0x18000000 0x100>;
48 pinctrl-0 = <ðernet_pins>;
49 pinctrl-names = "default";
52 interrupt-parent = <&irqpin0>;
53 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
56 vddvario-supply = <&fixedregulator3v3>;
57 vdd33a-supply = <&fixedregulator3v3>;
61 compatible = "gpio-leds";
63 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
66 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
69 gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
74 compatible = "adi,adv7123";
82 vga_enc_in: endpoint {
83 remote-endpoint = <&du_out_rgb0>;
88 vga_enc_out: endpoint {
89 remote-endpoint = <&vga_in>;
96 compatible = "vga-connector";
100 remote-endpoint = <&vga_enc_out>;
106 compatible = "thine,thc63lvdm83d";
109 #address-cells = <1>;
114 lvds_enc_in: endpoint {
115 remote-endpoint = <&du_out_rgb1>;
120 lvds_connector: endpoint {
127 compatible = "fixed-clock";
129 clock-frequency = <65000000>;
134 pinctrl-0 = <&du_pins>;
135 pinctrl-names = "default";
138 clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;
139 clock-names = "du", "dclkin.0";
144 remote-endpoint = <&vga_enc_in>;
149 remote-endpoint = <&lvds_enc_in>;
160 clock-frequency = <31250000>;
168 pinctrl-0 = <&scif_clk_pins>;
169 pinctrl-names = "default";
173 renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
174 renesas,function = "du0";
177 renesas,groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
178 renesas,function = "du1";
182 scif_clk_pins: scif_clk {
183 renesas,groups = "scif_clk_b";
184 renesas,function = "scif_clk";
187 ethernet_pins: ethernet {
189 renesas,groups = "intc_irq1_b";
190 renesas,function = "intc";
193 renesas,groups = "lbsc_ex_cs0";
194 renesas,function = "lbsc";
198 scif2_pins: serial2 {
199 renesas,groups = "scif2_data_c";
200 renesas,function = "scif2";
203 scif4_pins: serial4 {
204 renesas,groups = "scif4_data";
205 renesas,function = "scif4";
209 renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
210 renesas,function = "sdhi0";
214 renesas,groups = "hspi0";
215 renesas,function = "hspi0";
220 pinctrl-0 = <&scif2_pins>;
221 pinctrl-names = "default";
227 pinctrl-0 = <&scif4_pins>;
228 pinctrl-names = "default";
234 clock-frequency = <14745600>;
239 pinctrl-0 = <&sdhi0_pins>;
240 pinctrl-names = "default";
242 vmmc-supply = <&fixedregulator3v3>;
248 pinctrl-0 = <&hspi0_pins>;
249 pinctrl-names = "default";