2 * Device Tree Source for the r8a7790 SoC
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7790-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 compatible = "renesas,r8a7790";
19 interrupt-parent = <&gic>;
49 compatible = "arm,cortex-a15";
51 clock-frequency = <1300000000>;
52 voltage-tolerance = <1>; /* 1% */
53 clocks = <&cpg_clocks R8A7790_CLK_Z>;
54 clock-latency = <300000>; /* 300 us */
56 /* kHz - uV - OPPs unknown yet */
57 operating-points = <1400000 1000000>,
67 compatible = "arm,cortex-a15";
69 clock-frequency = <1300000000>;
74 compatible = "arm,cortex-a15";
76 clock-frequency = <1300000000>;
81 compatible = "arm,cortex-a15";
83 clock-frequency = <1300000000>;
88 compatible = "arm,cortex-a7";
90 clock-frequency = <780000000>;
95 compatible = "arm,cortex-a7";
97 clock-frequency = <780000000>;
102 compatible = "arm,cortex-a7";
104 clock-frequency = <780000000>;
109 compatible = "arm,cortex-a7";
111 clock-frequency = <780000000>;
115 gic: interrupt-controller@f1001000 {
116 compatible = "arm,gic-400";
117 #interrupt-cells = <3>;
118 #address-cells = <0>;
119 interrupt-controller;
120 reg = <0 0xf1001000 0 0x1000>,
121 <0 0xf1002000 0 0x1000>,
122 <0 0xf1004000 0 0x2000>,
123 <0 0xf1006000 0 0x2000>;
124 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
127 gpio0: gpio@e6050000 {
128 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
129 reg = <0 0xe6050000 0 0x50>;
130 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
133 gpio-ranges = <&pfc 0 0 32>;
134 #interrupt-cells = <2>;
135 interrupt-controller;
136 clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
137 power-domains = <&cpg_clocks>;
140 gpio1: gpio@e6051000 {
141 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
142 reg = <0 0xe6051000 0 0x50>;
143 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
146 gpio-ranges = <&pfc 0 32 30>;
147 #interrupt-cells = <2>;
148 interrupt-controller;
149 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
150 power-domains = <&cpg_clocks>;
153 gpio2: gpio@e6052000 {
154 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
155 reg = <0 0xe6052000 0 0x50>;
156 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
159 gpio-ranges = <&pfc 0 64 30>;
160 #interrupt-cells = <2>;
161 interrupt-controller;
162 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
163 power-domains = <&cpg_clocks>;
166 gpio3: gpio@e6053000 {
167 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
168 reg = <0 0xe6053000 0 0x50>;
169 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
172 gpio-ranges = <&pfc 0 96 32>;
173 #interrupt-cells = <2>;
174 interrupt-controller;
175 clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
176 power-domains = <&cpg_clocks>;
179 gpio4: gpio@e6054000 {
180 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
181 reg = <0 0xe6054000 0 0x50>;
182 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
185 gpio-ranges = <&pfc 0 128 32>;
186 #interrupt-cells = <2>;
187 interrupt-controller;
188 clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
189 power-domains = <&cpg_clocks>;
192 gpio5: gpio@e6055000 {
193 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
194 reg = <0 0xe6055000 0 0x50>;
195 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
198 gpio-ranges = <&pfc 0 160 32>;
199 #interrupt-cells = <2>;
200 interrupt-controller;
201 clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
202 power-domains = <&cpg_clocks>;
206 compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
207 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
208 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
209 clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
210 power-domains = <&cpg_clocks>;
214 compatible = "arm,armv7-timer";
215 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
216 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
217 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
218 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
221 cmt0: timer@ffca0000 {
222 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
223 reg = <0 0xffca0000 0 0x1004>;
224 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
226 clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
228 power-domains = <&cpg_clocks>;
230 renesas,channels-mask = <0x60>;
235 cmt1: timer@e6130000 {
236 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
237 reg = <0 0xe6130000 0 0x1004>;
238 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
240 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
241 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
242 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
243 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
248 power-domains = <&cpg_clocks>;
250 renesas,channels-mask = <0xff>;
255 irqc0: interrupt-controller@e61c0000 {
256 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
257 #interrupt-cells = <2>;
258 interrupt-controller;
259 reg = <0 0xe61c0000 0 0x200>;
260 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
265 power-domains = <&cpg_clocks>;
268 dmac0: dma-controller@e6700000 {
269 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
270 reg = <0 0xe6700000 0 0x20000>;
271 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
272 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
273 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
274 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
275 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
276 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
277 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
278 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
279 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
280 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
281 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
282 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
283 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
284 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
285 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
286 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
287 interrupt-names = "error",
288 "ch0", "ch1", "ch2", "ch3",
289 "ch4", "ch5", "ch6", "ch7",
290 "ch8", "ch9", "ch10", "ch11",
291 "ch12", "ch13", "ch14";
292 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
294 power-domains = <&cpg_clocks>;
299 dmac1: dma-controller@e6720000 {
300 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
301 reg = <0 0xe6720000 0 0x20000>;
302 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
316 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
317 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
318 interrupt-names = "error",
319 "ch0", "ch1", "ch2", "ch3",
320 "ch4", "ch5", "ch6", "ch7",
321 "ch8", "ch9", "ch10", "ch11",
322 "ch12", "ch13", "ch14";
323 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
325 power-domains = <&cpg_clocks>;
330 audma0: dma-controller@ec700000 {
331 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
332 reg = <0 0xec700000 0 0x10000>;
333 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
334 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
336 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
337 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
338 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
339 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
340 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
341 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
342 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
343 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
344 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
347 interrupt-names = "error",
348 "ch0", "ch1", "ch2", "ch3",
349 "ch4", "ch5", "ch6", "ch7",
350 "ch8", "ch9", "ch10", "ch11",
352 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
354 power-domains = <&cpg_clocks>;
359 audma1: dma-controller@ec720000 {
360 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
361 reg = <0 0xec720000 0 0x10000>;
362 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
366 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
367 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
368 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
369 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
370 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
371 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
372 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
373 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
374 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
376 interrupt-names = "error",
377 "ch0", "ch1", "ch2", "ch3",
378 "ch4", "ch5", "ch6", "ch7",
379 "ch8", "ch9", "ch10", "ch11",
381 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
383 power-domains = <&cpg_clocks>;
388 usb_dmac0: dma-controller@e65a0000 {
389 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
390 reg = <0 0xe65a0000 0 0x100>;
391 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
393 interrupt-names = "ch0", "ch1";
394 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
395 power-domains = <&cpg_clocks>;
400 usb_dmac1: dma-controller@e65b0000 {
401 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
402 reg = <0 0xe65b0000 0 0x100>;
403 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
405 interrupt-names = "ch0", "ch1";
406 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
407 power-domains = <&cpg_clocks>;
413 #address-cells = <1>;
415 compatible = "renesas,i2c-r8a7790";
416 reg = <0 0xe6508000 0 0x40>;
417 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
418 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
419 power-domains = <&cpg_clocks>;
420 i2c-scl-internal-delay-ns = <110>;
425 #address-cells = <1>;
427 compatible = "renesas,i2c-r8a7790";
428 reg = <0 0xe6518000 0 0x40>;
429 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
430 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
431 power-domains = <&cpg_clocks>;
432 i2c-scl-internal-delay-ns = <6>;
437 #address-cells = <1>;
439 compatible = "renesas,i2c-r8a7790";
440 reg = <0 0xe6530000 0 0x40>;
441 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
442 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
443 power-domains = <&cpg_clocks>;
444 i2c-scl-internal-delay-ns = <6>;
449 #address-cells = <1>;
451 compatible = "renesas,i2c-r8a7790";
452 reg = <0 0xe6540000 0 0x40>;
453 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
455 power-domains = <&cpg_clocks>;
456 i2c-scl-internal-delay-ns = <110>;
461 #address-cells = <1>;
463 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
464 reg = <0 0xe6500000 0 0x425>;
465 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
466 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
467 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
468 dma-names = "tx", "rx";
469 power-domains = <&cpg_clocks>;
474 #address-cells = <1>;
476 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
477 reg = <0 0xe6510000 0 0x425>;
478 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
479 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
480 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
481 dma-names = "tx", "rx";
482 power-domains = <&cpg_clocks>;
487 #address-cells = <1>;
489 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
490 reg = <0 0xe6520000 0 0x425>;
491 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
492 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
493 dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
494 dma-names = "tx", "rx";
495 power-domains = <&cpg_clocks>;
500 #address-cells = <1>;
502 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
503 reg = <0 0xe60b0000 0 0x425>;
504 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
505 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
506 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
507 dma-names = "tx", "rx";
508 power-domains = <&cpg_clocks>;
512 mmcif0: mmc@ee200000 {
513 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
514 reg = <0 0xee200000 0 0x80>;
515 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
516 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
517 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
518 dma-names = "tx", "rx";
519 power-domains = <&cpg_clocks>;
522 max-frequency = <97500000>;
525 mmcif1: mmc@ee220000 {
526 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
527 reg = <0 0xee220000 0 0x80>;
528 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
529 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
530 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
531 dma-names = "tx", "rx";
532 power-domains = <&cpg_clocks>;
535 max-frequency = <97500000>;
539 compatible = "renesas,pfc-r8a7790";
540 reg = <0 0xe6060000 0 0x250>;
544 compatible = "renesas,sdhi-r8a7790";
545 reg = <0 0xee100000 0 0x328>;
546 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
547 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
548 dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
549 dma-names = "tx", "rx";
550 power-domains = <&cpg_clocks>;
555 compatible = "renesas,sdhi-r8a7790";
556 reg = <0 0xee120000 0 0x328>;
557 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
559 dmas = <&dmac1 0xc9>, <&dmac1 0xca>;
560 dma-names = "tx", "rx";
561 power-domains = <&cpg_clocks>;
566 compatible = "renesas,sdhi-r8a7790";
567 reg = <0 0xee140000 0 0x100>;
568 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
569 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
570 dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
571 dma-names = "tx", "rx";
572 power-domains = <&cpg_clocks>;
577 compatible = "renesas,sdhi-r8a7790";
578 reg = <0 0xee160000 0 0x100>;
579 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
580 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
581 dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
582 dma-names = "tx", "rx";
583 power-domains = <&cpg_clocks>;
587 scifa0: serial@e6c40000 {
588 compatible = "renesas,scifa-r8a7790",
589 "renesas,rcar-gen2-scifa", "renesas,scifa";
590 reg = <0 0xe6c40000 0 64>;
591 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
592 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
594 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
595 dma-names = "tx", "rx";
596 power-domains = <&cpg_clocks>;
600 scifa1: serial@e6c50000 {
601 compatible = "renesas,scifa-r8a7790",
602 "renesas,rcar-gen2-scifa", "renesas,scifa";
603 reg = <0 0xe6c50000 0 64>;
604 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
605 clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
607 dmas = <&dmac0 0x25>, <&dmac0 0x26>;
608 dma-names = "tx", "rx";
609 power-domains = <&cpg_clocks>;
613 scifa2: serial@e6c60000 {
614 compatible = "renesas,scifa-r8a7790",
615 "renesas,rcar-gen2-scifa", "renesas,scifa";
616 reg = <0 0xe6c60000 0 64>;
617 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
618 clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
620 dmas = <&dmac0 0x27>, <&dmac0 0x28>;
621 dma-names = "tx", "rx";
622 power-domains = <&cpg_clocks>;
626 scifb0: serial@e6c20000 {
627 compatible = "renesas,scifb-r8a7790",
628 "renesas,rcar-gen2-scifb", "renesas,scifb";
629 reg = <0 0xe6c20000 0 64>;
630 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
633 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
634 dma-names = "tx", "rx";
635 power-domains = <&cpg_clocks>;
639 scifb1: serial@e6c30000 {
640 compatible = "renesas,scifb-r8a7790",
641 "renesas,rcar-gen2-scifb", "renesas,scifb";
642 reg = <0 0xe6c30000 0 64>;
643 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
644 clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
646 dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
647 dma-names = "tx", "rx";
648 power-domains = <&cpg_clocks>;
652 scifb2: serial@e6ce0000 {
653 compatible = "renesas,scifb-r8a7790",
654 "renesas,rcar-gen2-scifb", "renesas,scifb";
655 reg = <0 0xe6ce0000 0 64>;
656 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
657 clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
659 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
660 dma-names = "tx", "rx";
661 power-domains = <&cpg_clocks>;
665 scif0: serial@e6e60000 {
666 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
668 reg = <0 0xe6e60000 0 64>;
669 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
670 clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>,
672 clock-names = "fck", "brg_int", "scif_clk";
673 dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
674 dma-names = "tx", "rx";
675 power-domains = <&cpg_clocks>;
679 scif1: serial@e6e68000 {
680 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
682 reg = <0 0xe6e68000 0 64>;
683 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
684 clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>,
686 clock-names = "fck", "brg_int", "scif_clk";
687 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
688 dma-names = "tx", "rx";
689 power-domains = <&cpg_clocks>;
693 hscif0: serial@e62c0000 {
694 compatible = "renesas,hscif-r8a7790",
695 "renesas,rcar-gen2-hscif", "renesas,hscif";
696 reg = <0 0xe62c0000 0 96>;
697 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
698 clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>,
700 clock-names = "fck", "brg_int", "scif_clk";
701 dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
702 dma-names = "tx", "rx";
703 power-domains = <&cpg_clocks>;
707 hscif1: serial@e62c8000 {
708 compatible = "renesas,hscif-r8a7790",
709 "renesas,rcar-gen2-hscif", "renesas,hscif";
710 reg = <0 0xe62c8000 0 96>;
711 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>,
714 clock-names = "fck", "brg_int", "scif_clk";
715 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
716 dma-names = "tx", "rx";
717 power-domains = <&cpg_clocks>;
721 ether: ethernet@ee700000 {
722 compatible = "renesas,ether-r8a7790";
723 reg = <0 0xee700000 0 0x400>;
724 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
725 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
726 power-domains = <&cpg_clocks>;
728 #address-cells = <1>;
733 avb: ethernet@e6800000 {
734 compatible = "renesas,etheravb-r8a7790";
735 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
736 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
737 clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
738 power-domains = <&cpg_clocks>;
739 #address-cells = <1>;
744 sata0: sata@ee300000 {
745 compatible = "renesas,sata-r8a7790";
746 reg = <0 0xee300000 0 0x2000>;
747 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
748 clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
749 power-domains = <&cpg_clocks>;
753 sata1: sata@ee500000 {
754 compatible = "renesas,sata-r8a7790";
755 reg = <0 0xee500000 0 0x2000>;
756 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
757 clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
758 power-domains = <&cpg_clocks>;
762 hsusb: usb@e6590000 {
763 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
764 reg = <0 0xe6590000 0 0x100>;
765 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
767 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
768 <&usb_dmac1 0>, <&usb_dmac1 1>;
769 dma-names = "ch0", "ch1", "ch2", "ch3";
770 power-domains = <&cpg_clocks>;
771 renesas,buswait = <4>;
777 usbphy: usb-phy@e6590100 {
778 compatible = "renesas,usb-phy-r8a7790";
779 reg = <0 0xe6590100 0 0x100>;
780 #address-cells = <1>;
782 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
783 clock-names = "usbhs";
784 power-domains = <&cpg_clocks>;
787 usb0: usb-channel@0 {
791 usb2: usb-channel@2 {
797 vin0: video@e6ef0000 {
798 compatible = "renesas,vin-r8a7790";
799 reg = <0 0xe6ef0000 0 0x1000>;
800 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
801 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
802 power-domains = <&cpg_clocks>;
806 vin1: video@e6ef1000 {
807 compatible = "renesas,vin-r8a7790";
808 reg = <0 0xe6ef1000 0 0x1000>;
809 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
810 clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
811 power-domains = <&cpg_clocks>;
815 vin2: video@e6ef2000 {
816 compatible = "renesas,vin-r8a7790";
817 reg = <0 0xe6ef2000 0 0x1000>;
818 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
819 clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
820 power-domains = <&cpg_clocks>;
824 vin3: video@e6ef3000 {
825 compatible = "renesas,vin-r8a7790";
826 reg = <0 0xe6ef3000 0 0x1000>;
827 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
828 clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
829 power-domains = <&cpg_clocks>;
834 compatible = "renesas,vsp1";
835 reg = <0 0xfe920000 0 0x8000>;
836 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
837 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
838 power-domains = <&cpg_clocks>;
847 compatible = "renesas,vsp1";
848 reg = <0 0xfe928000 0 0x8000>;
849 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
850 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
851 power-domains = <&cpg_clocks>;
861 compatible = "renesas,vsp1";
862 reg = <0 0xfe930000 0 0x8000>;
863 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
864 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
865 power-domains = <&cpg_clocks>;
875 compatible = "renesas,vsp1";
876 reg = <0 0xfe938000 0 0x8000>;
877 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
879 power-domains = <&cpg_clocks>;
888 du: display@feb00000 {
889 compatible = "renesas,du-r8a7790";
890 reg = <0 0xfeb00000 0 0x70000>,
891 <0 0xfeb90000 0 0x1c>,
892 <0 0xfeb94000 0 0x1c>;
893 reg-names = "du", "lvds.0", "lvds.1";
894 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
895 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
896 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
897 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
898 <&mstp7_clks R8A7790_CLK_DU1>,
899 <&mstp7_clks R8A7790_CLK_DU2>,
900 <&mstp7_clks R8A7790_CLK_LVDS0>,
901 <&mstp7_clks R8A7790_CLK_LVDS1>;
902 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
906 #address-cells = <1>;
911 du_out_rgb: endpoint {
916 du_out_lvds0: endpoint {
921 du_out_lvds1: endpoint {
928 compatible = "renesas,can-r8a7790";
929 reg = <0 0xe6e80000 0 0x1000>;
930 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
931 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
932 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
933 clock-names = "clkp1", "clkp2", "can_clk";
934 power-domains = <&cpg_clocks>;
939 compatible = "renesas,can-r8a7790";
940 reg = <0 0xe6e88000 0 0x1000>;
941 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
942 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
943 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
944 clock-names = "clkp1", "clkp2", "can_clk";
945 power-domains = <&cpg_clocks>;
949 jpu: jpeg-codec@fe980000 {
950 compatible = "renesas,jpu-r8a7790";
951 reg = <0 0xfe980000 0 0x10300>;
952 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
953 clocks = <&mstp1_clks R8A7790_CLK_JPU>;
954 power-domains = <&cpg_clocks>;
958 #address-cells = <2>;
962 /* External root clock */
963 extal_clk: extal_clk {
964 compatible = "fixed-clock";
966 /* This value must be overriden by the board. */
967 clock-frequency = <0>;
968 clock-output-names = "extal";
971 /* External PCIe clock - can be overridden by the board */
972 pcie_bus_clk: pcie_bus_clk {
973 compatible = "fixed-clock";
975 clock-frequency = <100000000>;
976 clock-output-names = "pcie_bus";
981 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
982 * default. Boards that provide audio clocks should override them.
984 audio_clk_a: audio_clk_a {
985 compatible = "fixed-clock";
987 clock-frequency = <0>;
988 clock-output-names = "audio_clk_a";
990 audio_clk_b: audio_clk_b {
991 compatible = "fixed-clock";
993 clock-frequency = <0>;
994 clock-output-names = "audio_clk_b";
996 audio_clk_c: audio_clk_c {
997 compatible = "fixed-clock";
999 clock-frequency = <0>;
1000 clock-output-names = "audio_clk_c";
1003 /* External SCIF clock */
1005 compatible = "fixed-clock";
1007 /* This value must be overridden by the board. */
1008 clock-frequency = <0>;
1009 status = "disabled";
1012 /* External USB clock - can be overridden by the board */
1013 usb_extal_clk: usb_extal_clk {
1014 compatible = "fixed-clock";
1016 clock-frequency = <48000000>;
1017 clock-output-names = "usb_extal";
1020 /* External CAN clock */
1022 compatible = "fixed-clock";
1024 /* This value must be overridden by the board. */
1025 clock-frequency = <0>;
1026 clock-output-names = "can_clk";
1027 status = "disabled";
1030 /* Special CPG clocks */
1031 cpg_clocks: cpg_clocks@e6150000 {
1032 compatible = "renesas,r8a7790-cpg-clocks",
1033 "renesas,rcar-gen2-cpg-clocks";
1034 reg = <0 0xe6150000 0 0x1000>;
1035 clocks = <&extal_clk &usb_extal_clk>;
1037 clock-output-names = "main", "pll0", "pll1", "pll3",
1038 "lb", "qspi", "sdh", "sd0", "sd1",
1039 "z", "rcan", "adsp";
1040 #power-domain-cells = <0>;
1043 /* Variable factor clocks */
1044 sd2_clk: sd2_clk@e6150078 {
1045 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1046 reg = <0 0xe6150078 0 4>;
1047 clocks = <&pll1_div2_clk>;
1049 clock-output-names = "sd2";
1051 sd3_clk: sd3_clk@e615026c {
1052 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1053 reg = <0 0xe615026c 0 4>;
1054 clocks = <&pll1_div2_clk>;
1056 clock-output-names = "sd3";
1058 mmc0_clk: mmc0_clk@e6150240 {
1059 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1060 reg = <0 0xe6150240 0 4>;
1061 clocks = <&pll1_div2_clk>;
1063 clock-output-names = "mmc0";
1065 mmc1_clk: mmc1_clk@e6150244 {
1066 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1067 reg = <0 0xe6150244 0 4>;
1068 clocks = <&pll1_div2_clk>;
1070 clock-output-names = "mmc1";
1072 ssp_clk: ssp_clk@e6150248 {
1073 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1074 reg = <0 0xe6150248 0 4>;
1075 clocks = <&pll1_div2_clk>;
1077 clock-output-names = "ssp";
1079 ssprs_clk: ssprs_clk@e615024c {
1080 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1081 reg = <0 0xe615024c 0 4>;
1082 clocks = <&pll1_div2_clk>;
1084 clock-output-names = "ssprs";
1087 /* Fixed factor clocks */
1088 pll1_div2_clk: pll1_div2_clk {
1089 compatible = "fixed-factor-clock";
1090 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1094 clock-output-names = "pll1_div2";
1097 compatible = "fixed-factor-clock";
1098 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1102 clock-output-names = "z2";
1105 compatible = "fixed-factor-clock";
1106 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1110 clock-output-names = "zg";
1113 compatible = "fixed-factor-clock";
1114 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1118 clock-output-names = "zx";
1121 compatible = "fixed-factor-clock";
1122 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1126 clock-output-names = "zs";
1129 compatible = "fixed-factor-clock";
1130 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1134 clock-output-names = "hp";
1137 compatible = "fixed-factor-clock";
1138 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1142 clock-output-names = "i";
1145 compatible = "fixed-factor-clock";
1146 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1150 clock-output-names = "b";
1153 compatible = "fixed-factor-clock";
1154 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1158 clock-output-names = "p";
1161 compatible = "fixed-factor-clock";
1162 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1166 clock-output-names = "cl";
1169 compatible = "fixed-factor-clock";
1170 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1174 clock-output-names = "m2";
1177 compatible = "fixed-factor-clock";
1178 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1182 clock-output-names = "imp";
1184 rclk_clk: rclk_clk {
1185 compatible = "fixed-factor-clock";
1186 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1188 clock-div = <(48 * 1024)>;
1190 clock-output-names = "rclk";
1192 oscclk_clk: oscclk_clk {
1193 compatible = "fixed-factor-clock";
1194 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1196 clock-div = <(12 * 1024)>;
1198 clock-output-names = "oscclk";
1201 compatible = "fixed-factor-clock";
1202 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1206 clock-output-names = "zb3";
1208 zb3d2_clk: zb3d2_clk {
1209 compatible = "fixed-factor-clock";
1210 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1214 clock-output-names = "zb3d2";
1217 compatible = "fixed-factor-clock";
1218 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1222 clock-output-names = "ddr";
1225 compatible = "fixed-factor-clock";
1226 clocks = <&pll1_div2_clk>;
1230 clock-output-names = "mp";
1233 compatible = "fixed-factor-clock";
1234 clocks = <&extal_clk>;
1238 clock-output-names = "cp";
1242 mstp0_clks: mstp0_clks@e6150130 {
1243 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1244 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1247 clock-indices = <R8A7790_CLK_MSIOF0>;
1248 clock-output-names = "msiof0";
1250 mstp1_clks: mstp1_clks@e6150134 {
1251 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1252 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1253 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
1254 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
1255 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
1256 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
1259 R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
1260 R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
1261 R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
1262 R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
1263 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
1264 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
1265 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
1267 clock-output-names =
1268 "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
1269 "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
1270 "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
1271 "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
1273 mstp2_clks: mstp2_clks@e6150138 {
1274 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1275 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1276 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1277 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
1281 R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
1282 R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
1283 R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
1284 R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
1286 clock-output-names =
1287 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1288 "scifb1", "msiof1", "msiof3", "scifb2",
1289 "sys-dmac1", "sys-dmac0";
1291 mstp3_clks: mstp3_clks@e615013c {
1292 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1293 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1294 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
1295 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
1296 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1297 <&hp_clk>, <&hp_clk>;
1300 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
1301 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
1302 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
1303 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
1305 clock-output-names =
1306 "iic2", "tpu0", "mmcif1", "sdhi3",
1307 "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1308 "iic0", "pciec", "iic1", "ssusb", "cmt1",
1309 "usbdmac0", "usbdmac1";
1311 mstp4_clks: mstp4_clks@e6150140 {
1312 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1313 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1316 clock-indices = <R8A7790_CLK_IRQC>;
1317 clock-output-names = "irqc";
1319 mstp5_clks: mstp5_clks@e6150144 {
1320 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1321 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1322 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
1323 <&extal_clk>, <&p_clk>;
1326 R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1327 R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL
1330 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1333 mstp7_clks: mstp7_clks@e615014c {
1334 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1335 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1336 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1337 <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
1341 R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
1342 R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
1343 R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
1344 R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
1346 clock-output-names =
1347 "ehci", "hsusb", "hscif1", "hscif0", "scif1",
1348 "scif0", "du2", "du1", "du0", "lvds1", "lvds0";
1350 mstp8_clks: mstp8_clks@e6150990 {
1351 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1352 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1353 clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1354 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1358 R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
1359 R8A7790_CLK_VIN1 R8A7790_CLK_VIN0
1360 R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER
1361 R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
1363 clock-output-names =
1364 "mlb", "vin3", "vin2", "vin1", "vin0",
1365 "etheravb", "ether", "sata1", "sata0";
1367 mstp9_clks: mstp9_clks@e6150994 {
1368 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1369 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1370 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
1371 <&cp_clk>, <&cp_clk>, <&cp_clk>,
1372 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
1373 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
1376 R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
1377 R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
1378 R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
1379 R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
1381 clock-output-names =
1382 "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1383 "rcan1", "rcan0", "qspi_mod", "iic3",
1384 "i2c3", "i2c2", "i2c1", "i2c0";
1386 mstp10_clks: mstp10_clks@e6150998 {
1387 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1388 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1390 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1391 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1393 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1394 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1395 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1396 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1397 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1398 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1399 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
1404 R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
1405 R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
1407 R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
1408 R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
1409 R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
1410 R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
1412 clock-output-names =
1414 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1415 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1417 "scu-dvc1", "scu-dvc0",
1418 "scu-ctu1-mix1", "scu-ctu0-mix0",
1419 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1420 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1424 qspi: spi@e6b10000 {
1425 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1426 reg = <0 0xe6b10000 0 0x2c>;
1427 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1428 clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
1429 dmas = <&dmac0 0x17>, <&dmac0 0x18>;
1430 dma-names = "tx", "rx";
1431 power-domains = <&cpg_clocks>;
1433 #address-cells = <1>;
1435 status = "disabled";
1438 msiof0: spi@e6e20000 {
1439 compatible = "renesas,msiof-r8a7790";
1440 reg = <0 0xe6e20000 0 0x0064>;
1441 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1442 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
1443 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
1444 dma-names = "tx", "rx";
1445 power-domains = <&cpg_clocks>;
1446 #address-cells = <1>;
1448 status = "disabled";
1451 msiof1: spi@e6e10000 {
1452 compatible = "renesas,msiof-r8a7790";
1453 reg = <0 0xe6e10000 0 0x0064>;
1454 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1455 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
1456 dmas = <&dmac0 0x55>, <&dmac0 0x56>;
1457 dma-names = "tx", "rx";
1458 power-domains = <&cpg_clocks>;
1459 #address-cells = <1>;
1461 status = "disabled";
1464 msiof2: spi@e6e00000 {
1465 compatible = "renesas,msiof-r8a7790";
1466 reg = <0 0xe6e00000 0 0x0064>;
1467 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1468 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
1469 dmas = <&dmac0 0x41>, <&dmac0 0x42>;
1470 dma-names = "tx", "rx";
1471 power-domains = <&cpg_clocks>;
1472 #address-cells = <1>;
1474 status = "disabled";
1477 msiof3: spi@e6c90000 {
1478 compatible = "renesas,msiof-r8a7790";
1479 reg = <0 0xe6c90000 0 0x0064>;
1480 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1481 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
1482 dmas = <&dmac0 0x45>, <&dmac0 0x46>;
1483 dma-names = "tx", "rx";
1484 power-domains = <&cpg_clocks>;
1485 #address-cells = <1>;
1487 status = "disabled";
1490 xhci: usb@ee000000 {
1491 compatible = "renesas,xhci-r8a7790";
1492 reg = <0 0xee000000 0 0xc00>;
1493 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1494 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1495 power-domains = <&cpg_clocks>;
1498 status = "disabled";
1501 pci0: pci@ee090000 {
1502 compatible = "renesas,pci-r8a7790";
1503 device_type = "pci";
1504 reg = <0 0xee090000 0 0xc00>,
1505 <0 0xee080000 0 0x1100>;
1506 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1507 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1508 power-domains = <&cpg_clocks>;
1509 status = "disabled";
1512 #address-cells = <3>;
1514 #interrupt-cells = <1>;
1515 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1516 interrupt-map-mask = <0xff00 0 0 0x7>;
1517 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1518 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1519 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1522 reg = <0x800 0 0 0 0>;
1523 device_type = "pci";
1529 reg = <0x1000 0 0 0 0>;
1530 device_type = "pci";
1536 pci1: pci@ee0b0000 {
1537 compatible = "renesas,pci-r8a7790";
1538 device_type = "pci";
1539 reg = <0 0xee0b0000 0 0xc00>,
1540 <0 0xee0a0000 0 0x1100>;
1541 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1542 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1543 power-domains = <&cpg_clocks>;
1544 status = "disabled";
1547 #address-cells = <3>;
1549 #interrupt-cells = <1>;
1550 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1551 interrupt-map-mask = <0xff00 0 0 0x7>;
1552 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1553 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1554 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1557 pci2: pci@ee0d0000 {
1558 compatible = "renesas,pci-r8a7790";
1559 device_type = "pci";
1560 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1561 power-domains = <&cpg_clocks>;
1562 reg = <0 0xee0d0000 0 0xc00>,
1563 <0 0xee0c0000 0 0x1100>;
1564 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1565 status = "disabled";
1568 #address-cells = <3>;
1570 #interrupt-cells = <1>;
1571 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1572 interrupt-map-mask = <0xff00 0 0 0x7>;
1573 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1574 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1575 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1578 reg = <0x800 0 0 0 0>;
1579 device_type = "pci";
1585 reg = <0x1000 0 0 0 0>;
1586 device_type = "pci";
1592 pciec: pcie@fe000000 {
1593 compatible = "renesas,pcie-r8a7790";
1594 reg = <0 0xfe000000 0 0x80000>;
1595 #address-cells = <3>;
1597 bus-range = <0x00 0xff>;
1598 device_type = "pci";
1599 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1600 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1601 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1602 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1603 /* Map all possible DDR as inbound ranges */
1604 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1605 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1606 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1607 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1608 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1609 #interrupt-cells = <1>;
1610 interrupt-map-mask = <0 0 0 0>;
1611 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1612 clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
1613 clock-names = "pcie", "pcie_bus";
1614 power-domains = <&cpg_clocks>;
1615 status = "disabled";
1618 rcar_sound: sound@ec500000 {
1620 * #sound-dai-cells is required
1622 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1623 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1625 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1626 reg = <0 0xec500000 0 0x1000>, /* SCU */
1627 <0 0xec5a0000 0 0x100>, /* ADG */
1628 <0 0xec540000 0 0x1000>, /* SSIU */
1629 <0 0xec541000 0 0x280>, /* SSI */
1630 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1631 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1633 clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1634 <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
1635 <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
1636 <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>,
1637 <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>,
1638 <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>,
1639 <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>,
1640 <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>,
1641 <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
1642 <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
1643 <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
1644 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1645 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1646 <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
1647 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1648 clock-names = "ssi-all",
1649 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1650 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1651 "src.9", "src.8", "src.7", "src.6", "src.5",
1652 "src.4", "src.3", "src.2", "src.1", "src.0",
1656 "clk_a", "clk_b", "clk_c", "clk_i";
1657 power-domains = <&cpg_clocks>;
1659 status = "disabled";
1663 dmas = <&audma0 0xbc>;
1667 dmas = <&audma0 0xbe>;
1690 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1691 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1692 dma-names = "rx", "tx";
1695 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1696 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1697 dma-names = "rx", "tx";
1700 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1701 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1702 dma-names = "rx", "tx";
1705 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1706 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1707 dma-names = "rx", "tx";
1710 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1711 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1712 dma-names = "rx", "tx";
1715 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1716 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1717 dma-names = "rx", "tx";
1720 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1721 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1722 dma-names = "rx", "tx";
1725 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1726 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1727 dma-names = "rx", "tx";
1730 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1731 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1732 dma-names = "rx", "tx";
1735 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1736 dmas = <&audma0 0x97>, <&audma1 0xba>;
1737 dma-names = "rx", "tx";
1743 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1744 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1745 dma-names = "rx", "tx", "rxu", "txu";
1748 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1749 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1750 dma-names = "rx", "tx", "rxu", "txu";
1753 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1754 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1755 dma-names = "rx", "tx", "rxu", "txu";
1758 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1759 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1760 dma-names = "rx", "tx", "rxu", "txu";
1763 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1764 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1765 dma-names = "rx", "tx", "rxu", "txu";
1768 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1769 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1770 dma-names = "rx", "tx", "rxu", "txu";
1773 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1774 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1775 dma-names = "rx", "tx", "rxu", "txu";
1778 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1779 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1780 dma-names = "rx", "tx", "rxu", "txu";
1783 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1784 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1785 dma-names = "rx", "tx", "rxu", "txu";
1788 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1789 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1790 dma-names = "rx", "tx", "rxu", "txu";
1795 ipmmu_sy0: mmu@e6280000 {
1796 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1797 reg = <0 0xe6280000 0 0x1000>;
1798 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1799 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1801 status = "disabled";
1804 ipmmu_sy1: mmu@e6290000 {
1805 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1806 reg = <0 0xe6290000 0 0x1000>;
1807 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1809 status = "disabled";
1812 ipmmu_ds: mmu@e6740000 {
1813 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1814 reg = <0 0xe6740000 0 0x1000>;
1815 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1816 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1818 status = "disabled";
1821 ipmmu_mp: mmu@ec680000 {
1822 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1823 reg = <0 0xec680000 0 0x1000>;
1824 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1826 status = "disabled";
1829 ipmmu_mx: mmu@fe951000 {
1830 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1831 reg = <0 0xfe951000 0 0x1000>;
1832 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1833 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1835 status = "disabled";
1838 ipmmu_rt: mmu@ffc80000 {
1839 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1840 reg = <0 0xffc80000 0 0x1000>;
1841 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1843 status = "disabled";