2 * Device Tree Source for the r8a7791 SoC
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7791-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 compatible = "renesas,r8a7791";
19 interrupt-parent = <&gic>;
48 compatible = "arm,cortex-a15";
50 clock-frequency = <1500000000>;
51 voltage-tolerance = <1>; /* 1% */
52 clocks = <&cpg_clocks R8A7791_CLK_Z>;
53 clock-latency = <300000>; /* 300 us */
55 /* kHz - uV - OPPs unknown yet */
56 operating-points = <1500000 1000000>,
66 compatible = "arm,cortex-a15";
68 clock-frequency = <1500000000>;
72 gic: interrupt-controller@f1001000 {
73 compatible = "arm,gic-400";
74 #interrupt-cells = <3>;
77 reg = <0 0xf1001000 0 0x1000>,
78 <0 0xf1002000 0 0x1000>,
79 <0 0xf1004000 0 0x2000>,
80 <0 0xf1006000 0 0x2000>;
81 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
84 gpio0: gpio@e6050000 {
85 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
86 reg = <0 0xe6050000 0 0x50>;
87 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
90 gpio-ranges = <&pfc 0 0 32>;
91 #interrupt-cells = <2>;
93 clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
94 power-domains = <&cpg_clocks>;
97 gpio1: gpio@e6051000 {
98 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
99 reg = <0 0xe6051000 0 0x50>;
100 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
103 gpio-ranges = <&pfc 0 32 26>;
104 #interrupt-cells = <2>;
105 interrupt-controller;
106 clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
107 power-domains = <&cpg_clocks>;
110 gpio2: gpio@e6052000 {
111 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
112 reg = <0 0xe6052000 0 0x50>;
113 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
116 gpio-ranges = <&pfc 0 64 32>;
117 #interrupt-cells = <2>;
118 interrupt-controller;
119 clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
120 power-domains = <&cpg_clocks>;
123 gpio3: gpio@e6053000 {
124 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
125 reg = <0 0xe6053000 0 0x50>;
126 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
129 gpio-ranges = <&pfc 0 96 32>;
130 #interrupt-cells = <2>;
131 interrupt-controller;
132 clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
133 power-domains = <&cpg_clocks>;
136 gpio4: gpio@e6054000 {
137 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
138 reg = <0 0xe6054000 0 0x50>;
139 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
142 gpio-ranges = <&pfc 0 128 32>;
143 #interrupt-cells = <2>;
144 interrupt-controller;
145 clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
146 power-domains = <&cpg_clocks>;
149 gpio5: gpio@e6055000 {
150 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
151 reg = <0 0xe6055000 0 0x50>;
152 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
155 gpio-ranges = <&pfc 0 160 32>;
156 #interrupt-cells = <2>;
157 interrupt-controller;
158 clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
159 power-domains = <&cpg_clocks>;
162 gpio6: gpio@e6055400 {
163 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
164 reg = <0 0xe6055400 0 0x50>;
165 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
168 gpio-ranges = <&pfc 0 192 32>;
169 #interrupt-cells = <2>;
170 interrupt-controller;
171 clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
172 power-domains = <&cpg_clocks>;
175 gpio7: gpio@e6055800 {
176 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
177 reg = <0 0xe6055800 0 0x50>;
178 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
181 gpio-ranges = <&pfc 0 224 26>;
182 #interrupt-cells = <2>;
183 interrupt-controller;
184 clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
185 power-domains = <&cpg_clocks>;
189 compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
190 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
191 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
192 clocks = <&mstp5_clks R8A7791_CLK_THERMAL>;
193 power-domains = <&cpg_clocks>;
197 compatible = "arm,armv7-timer";
198 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
199 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
200 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
201 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
204 cmt0: timer@ffca0000 {
205 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
206 reg = <0 0xffca0000 0 0x1004>;
207 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
208 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
209 clocks = <&mstp1_clks R8A7791_CLK_CMT0>;
211 power-domains = <&cpg_clocks>;
213 renesas,channels-mask = <0x60>;
218 cmt1: timer@e6130000 {
219 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
220 reg = <0 0xe6130000 0 0x1004>;
221 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
222 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
229 clocks = <&mstp3_clks R8A7791_CLK_CMT1>;
231 power-domains = <&cpg_clocks>;
233 renesas,channels-mask = <0xff>;
238 irqc0: interrupt-controller@e61c0000 {
239 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
240 #interrupt-cells = <2>;
241 interrupt-controller;
242 reg = <0 0xe61c0000 0 0x200>;
243 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
246 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
247 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
248 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
249 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
251 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
253 clocks = <&mstp4_clks R8A7791_CLK_IRQC>;
254 power-domains = <&cpg_clocks>;
257 dmac0: dma-controller@e6700000 {
258 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
259 reg = <0 0xe6700000 0 0x20000>;
260 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
261 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
262 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
263 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
264 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
265 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
266 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
267 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
268 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
269 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
270 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
271 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
272 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
273 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
274 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
275 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
276 interrupt-names = "error",
277 "ch0", "ch1", "ch2", "ch3",
278 "ch4", "ch5", "ch6", "ch7",
279 "ch8", "ch9", "ch10", "ch11",
280 "ch12", "ch13", "ch14";
281 clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>;
283 power-domains = <&cpg_clocks>;
288 dmac1: dma-controller@e6720000 {
289 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
290 reg = <0 0xe6720000 0 0x20000>;
291 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
292 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
293 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
294 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
295 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
296 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
297 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
298 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
299 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
300 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
301 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
302 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
307 interrupt-names = "error",
308 "ch0", "ch1", "ch2", "ch3",
309 "ch4", "ch5", "ch6", "ch7",
310 "ch8", "ch9", "ch10", "ch11",
311 "ch12", "ch13", "ch14";
312 clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>;
314 power-domains = <&cpg_clocks>;
319 audma0: dma-controller@ec700000 {
320 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
321 reg = <0 0xec700000 0 0x10000>;
322 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
333 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
334 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
336 interrupt-names = "error",
337 "ch0", "ch1", "ch2", "ch3",
338 "ch4", "ch5", "ch6", "ch7",
339 "ch8", "ch9", "ch10", "ch11",
341 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>;
343 power-domains = <&cpg_clocks>;
348 audma1: dma-controller@ec720000 {
349 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
350 reg = <0 0xec720000 0 0x10000>;
351 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
365 interrupt-names = "error",
366 "ch0", "ch1", "ch2", "ch3",
367 "ch4", "ch5", "ch6", "ch7",
368 "ch8", "ch9", "ch10", "ch11",
370 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>;
372 power-domains = <&cpg_clocks>;
377 usb_dmac0: dma-controller@e65a0000 {
378 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
379 reg = <0 0xe65a0000 0 0x100>;
380 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
382 interrupt-names = "ch0", "ch1";
383 clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>;
384 power-domains = <&cpg_clocks>;
389 usb_dmac1: dma-controller@e65b0000 {
390 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
391 reg = <0 0xe65b0000 0 0x100>;
392 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
394 interrupt-names = "ch0", "ch1";
395 clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>;
396 power-domains = <&cpg_clocks>;
401 /* The memory map in the User's Manual maps the cores to bus numbers */
403 #address-cells = <1>;
405 compatible = "renesas,i2c-r8a7791";
406 reg = <0 0xe6508000 0 0x40>;
407 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
408 clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
409 power-domains = <&cpg_clocks>;
410 i2c-scl-internal-delay-ns = <6>;
415 #address-cells = <1>;
417 compatible = "renesas,i2c-r8a7791";
418 reg = <0 0xe6518000 0 0x40>;
419 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
420 clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
421 power-domains = <&cpg_clocks>;
422 i2c-scl-internal-delay-ns = <6>;
427 #address-cells = <1>;
429 compatible = "renesas,i2c-r8a7791";
430 reg = <0 0xe6530000 0 0x40>;
431 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
433 power-domains = <&cpg_clocks>;
434 i2c-scl-internal-delay-ns = <6>;
439 #address-cells = <1>;
441 compatible = "renesas,i2c-r8a7791";
442 reg = <0 0xe6540000 0 0x40>;
443 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
444 clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
445 power-domains = <&cpg_clocks>;
446 i2c-scl-internal-delay-ns = <6>;
451 #address-cells = <1>;
453 compatible = "renesas,i2c-r8a7791";
454 reg = <0 0xe6520000 0 0x40>;
455 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
456 clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
457 power-domains = <&cpg_clocks>;
458 i2c-scl-internal-delay-ns = <6>;
463 /* doesn't need pinmux */
464 #address-cells = <1>;
466 compatible = "renesas,i2c-r8a7791";
467 reg = <0 0xe6528000 0 0x40>;
468 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
469 clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
470 power-domains = <&cpg_clocks>;
471 i2c-scl-internal-delay-ns = <110>;
476 /* doesn't need pinmux */
477 #address-cells = <1>;
479 compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
480 reg = <0 0xe60b0000 0 0x425>;
481 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
483 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
484 dma-names = "tx", "rx";
485 power-domains = <&cpg_clocks>;
490 #address-cells = <1>;
492 compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
493 reg = <0 0xe6500000 0 0x425>;
494 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
496 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
497 dma-names = "tx", "rx";
498 power-domains = <&cpg_clocks>;
503 #address-cells = <1>;
505 compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
506 reg = <0 0xe6510000 0 0x425>;
507 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
509 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
510 dma-names = "tx", "rx";
511 power-domains = <&cpg_clocks>;
516 compatible = "renesas,pfc-r8a7791";
517 reg = <0 0xe6060000 0 0x250>;
520 mmcif0: mmc@ee200000 {
521 compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
522 reg = <0 0xee200000 0 0x80>;
523 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
524 clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>;
525 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
526 dma-names = "tx", "rx";
527 power-domains = <&cpg_clocks>;
530 max-frequency = <97500000>;
534 compatible = "renesas,sdhi-r8a7791";
535 reg = <0 0xee100000 0 0x328>;
536 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
537 clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
538 dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
539 dma-names = "tx", "rx";
540 power-domains = <&cpg_clocks>;
545 compatible = "renesas,sdhi-r8a7791";
546 reg = <0 0xee140000 0 0x100>;
547 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
548 clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
549 dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
550 dma-names = "tx", "rx";
551 power-domains = <&cpg_clocks>;
556 compatible = "renesas,sdhi-r8a7791";
557 reg = <0 0xee160000 0 0x100>;
558 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
560 dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
561 dma-names = "tx", "rx";
562 power-domains = <&cpg_clocks>;
566 scifa0: serial@e6c40000 {
567 compatible = "renesas,scifa-r8a7791",
568 "renesas,rcar-gen2-scifa", "renesas,scifa";
569 reg = <0 0xe6c40000 0 64>;
570 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
571 clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>;
573 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
574 dma-names = "tx", "rx";
575 power-domains = <&cpg_clocks>;
579 scifa1: serial@e6c50000 {
580 compatible = "renesas,scifa-r8a7791",
581 "renesas,rcar-gen2-scifa", "renesas,scifa";
582 reg = <0 0xe6c50000 0 64>;
583 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
584 clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>;
586 dmas = <&dmac0 0x25>, <&dmac0 0x26>;
587 dma-names = "tx", "rx";
588 power-domains = <&cpg_clocks>;
592 scifa2: serial@e6c60000 {
593 compatible = "renesas,scifa-r8a7791",
594 "renesas,rcar-gen2-scifa", "renesas,scifa";
595 reg = <0 0xe6c60000 0 64>;
596 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>;
599 dmas = <&dmac0 0x27>, <&dmac0 0x28>;
600 dma-names = "tx", "rx";
601 power-domains = <&cpg_clocks>;
605 scifa3: serial@e6c70000 {
606 compatible = "renesas,scifa-r8a7791",
607 "renesas,rcar-gen2-scifa", "renesas,scifa";
608 reg = <0 0xe6c70000 0 64>;
609 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
610 clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>;
612 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
613 dma-names = "tx", "rx";
614 power-domains = <&cpg_clocks>;
618 scifa4: serial@e6c78000 {
619 compatible = "renesas,scifa-r8a7791",
620 "renesas,rcar-gen2-scifa", "renesas,scifa";
621 reg = <0 0xe6c78000 0 64>;
622 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
623 clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>;
625 dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
626 dma-names = "tx", "rx";
627 power-domains = <&cpg_clocks>;
631 scifa5: serial@e6c80000 {
632 compatible = "renesas,scifa-r8a7791",
633 "renesas,rcar-gen2-scifa", "renesas,scifa";
634 reg = <0 0xe6c80000 0 64>;
635 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
636 clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>;
638 dmas = <&dmac0 0x23>, <&dmac0 0x24>;
639 dma-names = "tx", "rx";
640 power-domains = <&cpg_clocks>;
644 scifb0: serial@e6c20000 {
645 compatible = "renesas,scifb-r8a7791",
646 "renesas,rcar-gen2-scifb", "renesas,scifb";
647 reg = <0 0xe6c20000 0 64>;
648 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
651 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
652 dma-names = "tx", "rx";
653 power-domains = <&cpg_clocks>;
657 scifb1: serial@e6c30000 {
658 compatible = "renesas,scifb-r8a7791",
659 "renesas,rcar-gen2-scifb", "renesas,scifb";
660 reg = <0 0xe6c30000 0 64>;
661 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
662 clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
664 dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
665 dma-names = "tx", "rx";
666 power-domains = <&cpg_clocks>;
670 scifb2: serial@e6ce0000 {
671 compatible = "renesas,scifb-r8a7791",
672 "renesas,rcar-gen2-scifb", "renesas,scifb";
673 reg = <0 0xe6ce0000 0 64>;
674 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
675 clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
677 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
678 dma-names = "tx", "rx";
679 power-domains = <&cpg_clocks>;
683 scif0: serial@e6e60000 {
684 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
686 reg = <0 0xe6e60000 0 64>;
687 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
688 clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>,
690 clock-names = "fck", "brg_int", "scif_clk";
691 dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
692 dma-names = "tx", "rx";
693 power-domains = <&cpg_clocks>;
697 scif1: serial@e6e68000 {
698 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
700 reg = <0 0xe6e68000 0 64>;
701 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>,
704 clock-names = "fck", "brg_int", "scif_clk";
705 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
706 dma-names = "tx", "rx";
707 power-domains = <&cpg_clocks>;
711 scif2: serial@e6e58000 {
712 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
714 reg = <0 0xe6e58000 0 64>;
715 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>,
718 clock-names = "fck", "brg_int", "scif_clk";
719 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
720 dma-names = "tx", "rx";
721 power-domains = <&cpg_clocks>;
725 scif3: serial@e6ea8000 {
726 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
728 reg = <0 0xe6ea8000 0 64>;
729 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>,
732 clock-names = "fck", "brg_int", "scif_clk";
733 dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
734 dma-names = "tx", "rx";
735 power-domains = <&cpg_clocks>;
739 scif4: serial@e6ee0000 {
740 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
742 reg = <0 0xe6ee0000 0 64>;
743 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
744 clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>,
746 clock-names = "fck", "brg_int", "scif_clk";
747 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
748 dma-names = "tx", "rx";
749 power-domains = <&cpg_clocks>;
753 scif5: serial@e6ee8000 {
754 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
756 reg = <0 0xe6ee8000 0 64>;
757 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
758 clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>,
760 clock-names = "fck", "brg_int", "scif_clk";
761 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
762 dma-names = "tx", "rx";
763 power-domains = <&cpg_clocks>;
767 hscif0: serial@e62c0000 {
768 compatible = "renesas,hscif-r8a7791",
769 "renesas,rcar-gen2-hscif", "renesas,hscif";
770 reg = <0 0xe62c0000 0 96>;
771 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
772 clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>,
774 clock-names = "fck", "brg_int", "scif_clk";
775 dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
776 dma-names = "tx", "rx";
777 power-domains = <&cpg_clocks>;
781 hscif1: serial@e62c8000 {
782 compatible = "renesas,hscif-r8a7791",
783 "renesas,rcar-gen2-hscif", "renesas,hscif";
784 reg = <0 0xe62c8000 0 96>;
785 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
786 clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>,
788 clock-names = "fck", "brg_int", "scif_clk";
789 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
790 dma-names = "tx", "rx";
791 power-domains = <&cpg_clocks>;
795 hscif2: serial@e62d0000 {
796 compatible = "renesas,hscif-r8a7791",
797 "renesas,rcar-gen2-hscif", "renesas,hscif";
798 reg = <0 0xe62d0000 0 96>;
799 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
800 clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>,
802 clock-names = "fck", "brg_int", "scif_clk";
803 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
804 dma-names = "tx", "rx";
805 power-domains = <&cpg_clocks>;
809 ether: ethernet@ee700000 {
810 compatible = "renesas,ether-r8a7791";
811 reg = <0 0xee700000 0 0x400>;
812 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&mstp8_clks R8A7791_CLK_ETHER>;
814 power-domains = <&cpg_clocks>;
816 #address-cells = <1>;
821 avb: ethernet@e6800000 {
822 compatible = "renesas,etheravb-r8a7791",
823 "renesas,etheravb-rcar-gen2";
824 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
825 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>;
827 power-domains = <&cpg_clocks>;
828 #address-cells = <1>;
833 sata0: sata@ee300000 {
834 compatible = "renesas,sata-r8a7791";
835 reg = <0 0xee300000 0 0x2000>;
836 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
837 clocks = <&mstp8_clks R8A7791_CLK_SATA0>;
838 power-domains = <&cpg_clocks>;
842 sata1: sata@ee500000 {
843 compatible = "renesas,sata-r8a7791";
844 reg = <0 0xee500000 0 0x2000>;
845 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
846 clocks = <&mstp8_clks R8A7791_CLK_SATA1>;
847 power-domains = <&cpg_clocks>;
851 hsusb: usb@e6590000 {
852 compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
853 reg = <0 0xe6590000 0 0x100>;
854 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
855 clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
856 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
857 <&usb_dmac1 0>, <&usb_dmac1 1>;
858 dma-names = "ch0", "ch1", "ch2", "ch3";
859 power-domains = <&cpg_clocks>;
860 renesas,buswait = <4>;
866 usbphy: usb-phy@e6590100 {
867 compatible = "renesas,usb-phy-r8a7791";
868 reg = <0 0xe6590100 0 0x100>;
869 #address-cells = <1>;
871 clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
872 clock-names = "usbhs";
873 power-domains = <&cpg_clocks>;
876 usb0: usb-channel@0 {
880 usb2: usb-channel@2 {
886 vin0: video@e6ef0000 {
887 compatible = "renesas,vin-r8a7791";
888 reg = <0 0xe6ef0000 0 0x1000>;
889 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
890 clocks = <&mstp8_clks R8A7791_CLK_VIN0>;
891 power-domains = <&cpg_clocks>;
895 vin1: video@e6ef1000 {
896 compatible = "renesas,vin-r8a7791";
897 reg = <0 0xe6ef1000 0 0x1000>;
898 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
899 clocks = <&mstp8_clks R8A7791_CLK_VIN1>;
900 power-domains = <&cpg_clocks>;
904 vin2: video@e6ef2000 {
905 compatible = "renesas,vin-r8a7791";
906 reg = <0 0xe6ef2000 0 0x1000>;
907 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
908 clocks = <&mstp8_clks R8A7791_CLK_VIN2>;
909 power-domains = <&cpg_clocks>;
914 compatible = "renesas,vsp1";
915 reg = <0 0xfe928000 0 0x8000>;
916 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
917 clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;
918 power-domains = <&cpg_clocks>;
928 compatible = "renesas,vsp1";
929 reg = <0 0xfe930000 0 0x8000>;
930 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
931 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;
932 power-domains = <&cpg_clocks>;
942 compatible = "renesas,vsp1";
943 reg = <0 0xfe938000 0 0x8000>;
944 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
945 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;
946 power-domains = <&cpg_clocks>;
955 du: display@feb00000 {
956 compatible = "renesas,du-r8a7791";
957 reg = <0 0xfeb00000 0 0x40000>,
958 <0 0xfeb90000 0 0x1c>;
959 reg-names = "du", "lvds.0";
960 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
961 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
962 clocks = <&mstp7_clks R8A7791_CLK_DU0>,
963 <&mstp7_clks R8A7791_CLK_DU1>,
964 <&mstp7_clks R8A7791_CLK_LVDS0>;
965 clock-names = "du.0", "du.1", "lvds.0";
969 #address-cells = <1>;
974 du_out_rgb: endpoint {
979 du_out_lvds0: endpoint {
986 compatible = "renesas,can-r8a7791";
987 reg = <0 0xe6e80000 0 0x1000>;
988 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
989 clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
990 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
991 clock-names = "clkp1", "clkp2", "can_clk";
992 power-domains = <&cpg_clocks>;
997 compatible = "renesas,can-r8a7791";
998 reg = <0 0xe6e88000 0 0x1000>;
999 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1000 clocks = <&mstp9_clks R8A7791_CLK_RCAN1>,
1001 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
1002 clock-names = "clkp1", "clkp2", "can_clk";
1003 power-domains = <&cpg_clocks>;
1004 status = "disabled";
1007 jpu: jpeg-codec@fe980000 {
1008 compatible = "renesas,jpu-r8a7791";
1009 reg = <0 0xfe980000 0 0x10300>;
1010 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1011 clocks = <&mstp1_clks R8A7791_CLK_JPU>;
1012 power-domains = <&cpg_clocks>;
1016 #address-cells = <2>;
1020 /* External root clock */
1021 extal_clk: extal_clk {
1022 compatible = "fixed-clock";
1024 /* This value must be overriden by the board. */
1025 clock-frequency = <0>;
1026 clock-output-names = "extal";
1030 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
1031 * default. Boards that provide audio clocks should override them.
1033 audio_clk_a: audio_clk_a {
1034 compatible = "fixed-clock";
1036 clock-frequency = <0>;
1037 clock-output-names = "audio_clk_a";
1039 audio_clk_b: audio_clk_b {
1040 compatible = "fixed-clock";
1042 clock-frequency = <0>;
1043 clock-output-names = "audio_clk_b";
1045 audio_clk_c: audio_clk_c {
1046 compatible = "fixed-clock";
1048 clock-frequency = <0>;
1049 clock-output-names = "audio_clk_c";
1052 /* External PCIe clock - can be overridden by the board */
1053 pcie_bus_clk: pcie_bus_clk {
1054 compatible = "fixed-clock";
1056 clock-frequency = <100000000>;
1057 clock-output-names = "pcie_bus";
1058 status = "disabled";
1061 /* External SCIF clock */
1063 compatible = "fixed-clock";
1065 /* This value must be overridden by the board. */
1066 clock-frequency = <0>;
1067 status = "disabled";
1070 /* External USB clock - can be overridden by the board */
1071 usb_extal_clk: usb_extal_clk {
1072 compatible = "fixed-clock";
1074 clock-frequency = <48000000>;
1075 clock-output-names = "usb_extal";
1078 /* External CAN clock */
1080 compatible = "fixed-clock";
1082 /* This value must be overridden by the board. */
1083 clock-frequency = <0>;
1084 clock-output-names = "can_clk";
1085 status = "disabled";
1088 /* Special CPG clocks */
1089 cpg_clocks: cpg_clocks@e6150000 {
1090 compatible = "renesas,r8a7791-cpg-clocks",
1091 "renesas,rcar-gen2-cpg-clocks";
1092 reg = <0 0xe6150000 0 0x1000>;
1093 clocks = <&extal_clk &usb_extal_clk>;
1095 clock-output-names = "main", "pll0", "pll1", "pll3",
1096 "lb", "qspi", "sdh", "sd0", "z",
1098 #power-domain-cells = <0>;
1101 /* Variable factor clocks */
1102 sd2_clk: sd2_clk@e6150078 {
1103 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1104 reg = <0 0xe6150078 0 4>;
1105 clocks = <&pll1_div2_clk>;
1107 clock-output-names = "sd2";
1109 sd3_clk: sd3_clk@e615026c {
1110 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1111 reg = <0 0xe615026c 0 4>;
1112 clocks = <&pll1_div2_clk>;
1114 clock-output-names = "sd3";
1116 mmc0_clk: mmc0_clk@e6150240 {
1117 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1118 reg = <0 0xe6150240 0 4>;
1119 clocks = <&pll1_div2_clk>;
1121 clock-output-names = "mmc0";
1123 ssp_clk: ssp_clk@e6150248 {
1124 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1125 reg = <0 0xe6150248 0 4>;
1126 clocks = <&pll1_div2_clk>;
1128 clock-output-names = "ssp";
1130 ssprs_clk: ssprs_clk@e615024c {
1131 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1132 reg = <0 0xe615024c 0 4>;
1133 clocks = <&pll1_div2_clk>;
1135 clock-output-names = "ssprs";
1138 /* Fixed factor clocks */
1139 pll1_div2_clk: pll1_div2_clk {
1140 compatible = "fixed-factor-clock";
1141 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1145 clock-output-names = "pll1_div2";
1148 compatible = "fixed-factor-clock";
1149 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1153 clock-output-names = "zg";
1156 compatible = "fixed-factor-clock";
1157 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1161 clock-output-names = "zx";
1164 compatible = "fixed-factor-clock";
1165 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1169 clock-output-names = "zs";
1172 compatible = "fixed-factor-clock";
1173 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1177 clock-output-names = "hp";
1180 compatible = "fixed-factor-clock";
1181 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1185 clock-output-names = "i";
1188 compatible = "fixed-factor-clock";
1189 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1193 clock-output-names = "b";
1196 compatible = "fixed-factor-clock";
1197 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1201 clock-output-names = "p";
1204 compatible = "fixed-factor-clock";
1205 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1209 clock-output-names = "cl";
1212 compatible = "fixed-factor-clock";
1213 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1217 clock-output-names = "m2";
1219 rclk_clk: rclk_clk {
1220 compatible = "fixed-factor-clock";
1221 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1223 clock-div = <(48 * 1024)>;
1225 clock-output-names = "rclk";
1227 oscclk_clk: oscclk_clk {
1228 compatible = "fixed-factor-clock";
1229 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1231 clock-div = <(12 * 1024)>;
1233 clock-output-names = "oscclk";
1236 compatible = "fixed-factor-clock";
1237 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1241 clock-output-names = "zb3";
1243 zb3d2_clk: zb3d2_clk {
1244 compatible = "fixed-factor-clock";
1245 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1249 clock-output-names = "zb3d2";
1252 compatible = "fixed-factor-clock";
1253 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1257 clock-output-names = "ddr";
1260 compatible = "fixed-factor-clock";
1261 clocks = <&pll1_div2_clk>;
1265 clock-output-names = "mp";
1268 compatible = "fixed-factor-clock";
1269 clocks = <&extal_clk>;
1273 clock-output-names = "cp";
1277 mstp0_clks: mstp0_clks@e6150130 {
1278 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1279 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1282 clock-indices = <R8A7791_CLK_MSIOF0>;
1283 clock-output-names = "msiof0";
1285 mstp1_clks: mstp1_clks@e6150134 {
1286 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1287 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1288 clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>,
1289 <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1290 <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>,
1294 R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU
1295 R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG
1296 R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0
1297 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0
1298 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0
1301 clock-output-names =
1302 "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg",
1303 "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0",
1304 "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy";
1306 mstp2_clks: mstp2_clks@e6150138 {
1307 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1308 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1309 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1310 <&mp_clk>, <&mp_clk>, <&mp_clk>,
1311 <&zs_clk>, <&zs_clk>;
1314 R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
1315 R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1
1316 R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
1317 R8A7791_CLK_SYS_DMAC1 R8A7791_CLK_SYS_DMAC0
1319 clock-output-names =
1320 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1321 "scifb1", "msiof1", "scifb2",
1322 "sys-dmac1", "sys-dmac0";
1324 mstp3_clks: mstp3_clks@e615013c {
1325 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1326 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1327 clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
1328 <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1329 <&hp_clk>, <&hp_clk>;
1332 R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
1333 R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
1334 R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
1335 R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
1337 clock-output-names =
1338 "tpu0", "sdhi2", "sdhi1", "sdhi0",
1339 "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
1340 "usbdmac0", "usbdmac1";
1342 mstp4_clks: mstp4_clks@e6150140 {
1343 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1344 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1347 clock-indices = <R8A7791_CLK_IRQC>;
1348 clock-output-names = "irqc";
1350 mstp5_clks: mstp5_clks@e6150144 {
1351 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1352 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1353 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
1354 <&extal_clk>, <&p_clk>;
1357 R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
1358 R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
1361 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1364 mstp7_clks: mstp7_clks@e615014c {
1365 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1366 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1367 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
1368 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1369 <&zx_clk>, <&zx_clk>, <&zx_clk>;
1372 R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
1373 R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
1374 R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
1375 R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
1378 clock-output-names =
1379 "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
1380 "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
1382 mstp8_clks: mstp8_clks@e6150990 {
1383 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1384 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1385 clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>,
1386 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1390 R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
1391 R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
1392 R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER
1393 R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
1395 clock-output-names =
1396 "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0",
1397 "etheravb", "ether", "sata1", "sata0";
1399 mstp9_clks: mstp9_clks@e6150994 {
1400 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1401 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1402 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1403 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1404 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
1405 <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
1406 <&hp_clk>, <&hp_clk>;
1409 R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
1410 R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
1411 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
1412 R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
1413 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
1415 clock-output-names =
1416 "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1417 "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
1420 mstp10_clks: mstp10_clks@e6150998 {
1421 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1422 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1424 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1425 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1427 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1428 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1429 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1430 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1431 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1432 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1433 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
1438 R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
1439 R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
1441 R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
1442 R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
1443 R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
1444 R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
1446 clock-output-names =
1448 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1449 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1451 "scu-dvc1", "scu-dvc0",
1452 "scu-ctu1-mix1", "scu-ctu0-mix0",
1453 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1454 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1456 mstp11_clks: mstp11_clks@e615099c {
1457 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1458 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
1459 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
1462 R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5
1464 clock-output-names = "scifa3", "scifa4", "scifa5";
1468 qspi: spi@e6b10000 {
1469 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
1470 reg = <0 0xe6b10000 0 0x2c>;
1471 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1472 clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
1473 dmas = <&dmac0 0x17>, <&dmac0 0x18>;
1474 dma-names = "tx", "rx";
1475 power-domains = <&cpg_clocks>;
1477 #address-cells = <1>;
1479 status = "disabled";
1482 msiof0: spi@e6e20000 {
1483 compatible = "renesas,msiof-r8a7791";
1484 reg = <0 0xe6e20000 0 0x0064>;
1485 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1486 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
1487 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
1488 dma-names = "tx", "rx";
1489 power-domains = <&cpg_clocks>;
1490 #address-cells = <1>;
1492 status = "disabled";
1495 msiof1: spi@e6e10000 {
1496 compatible = "renesas,msiof-r8a7791";
1497 reg = <0 0xe6e10000 0 0x0064>;
1498 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1499 clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
1500 dmas = <&dmac0 0x55>, <&dmac0 0x56>;
1501 dma-names = "tx", "rx";
1502 power-domains = <&cpg_clocks>;
1503 #address-cells = <1>;
1505 status = "disabled";
1508 msiof2: spi@e6e00000 {
1509 compatible = "renesas,msiof-r8a7791";
1510 reg = <0 0xe6e00000 0 0x0064>;
1511 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1512 clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
1513 dmas = <&dmac0 0x41>, <&dmac0 0x42>;
1514 dma-names = "tx", "rx";
1515 power-domains = <&cpg_clocks>;
1516 #address-cells = <1>;
1518 status = "disabled";
1521 xhci: usb@ee000000 {
1522 compatible = "renesas,xhci-r8a7791";
1523 reg = <0 0xee000000 0 0xc00>;
1524 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&mstp3_clks R8A7791_CLK_SSUSB>;
1526 power-domains = <&cpg_clocks>;
1529 status = "disabled";
1532 pci0: pci@ee090000 {
1533 compatible = "renesas,pci-r8a7791";
1534 device_type = "pci";
1535 reg = <0 0xee090000 0 0xc00>,
1536 <0 0xee080000 0 0x1100>;
1537 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1538 clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
1539 power-domains = <&cpg_clocks>;
1540 status = "disabled";
1543 #address-cells = <3>;
1545 #interrupt-cells = <1>;
1546 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1547 interrupt-map-mask = <0xff00 0 0 0x7>;
1548 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1549 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1550 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1553 reg = <0x800 0 0 0 0>;
1554 device_type = "pci";
1560 reg = <0x1000 0 0 0 0>;
1561 device_type = "pci";
1567 pci1: pci@ee0d0000 {
1568 compatible = "renesas,pci-r8a7791";
1569 device_type = "pci";
1570 reg = <0 0xee0d0000 0 0xc00>,
1571 <0 0xee0c0000 0 0x1100>;
1572 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1573 clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
1574 power-domains = <&cpg_clocks>;
1575 status = "disabled";
1578 #address-cells = <3>;
1580 #interrupt-cells = <1>;
1581 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1582 interrupt-map-mask = <0xff00 0 0 0x7>;
1583 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1584 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1585 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1588 reg = <0x800 0 0 0 0>;
1589 device_type = "pci";
1595 reg = <0x1000 0 0 0 0>;
1596 device_type = "pci";
1602 pciec: pcie@fe000000 {
1603 compatible = "renesas,pcie-r8a7791";
1604 reg = <0 0xfe000000 0 0x80000>;
1605 #address-cells = <3>;
1607 bus-range = <0x00 0xff>;
1608 device_type = "pci";
1609 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1610 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1611 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1612 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1613 /* Map all possible DDR as inbound ranges */
1614 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1615 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1616 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1617 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1618 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1619 #interrupt-cells = <1>;
1620 interrupt-map-mask = <0 0 0 0>;
1621 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1622 clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>;
1623 clock-names = "pcie", "pcie_bus";
1624 power-domains = <&cpg_clocks>;
1625 status = "disabled";
1628 ipmmu_sy0: mmu@e6280000 {
1629 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1630 reg = <0 0xe6280000 0 0x1000>;
1631 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1632 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1634 status = "disabled";
1637 ipmmu_sy1: mmu@e6290000 {
1638 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1639 reg = <0 0xe6290000 0 0x1000>;
1640 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1642 status = "disabled";
1645 ipmmu_ds: mmu@e6740000 {
1646 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1647 reg = <0 0xe6740000 0 0x1000>;
1648 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1649 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1651 status = "disabled";
1654 ipmmu_mp: mmu@ec680000 {
1655 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1656 reg = <0 0xec680000 0 0x1000>;
1657 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1659 status = "disabled";
1662 ipmmu_mx: mmu@fe951000 {
1663 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1664 reg = <0 0xfe951000 0 0x1000>;
1665 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1666 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1668 status = "disabled";
1671 ipmmu_rt: mmu@ffc80000 {
1672 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1673 reg = <0 0xffc80000 0 0x1000>;
1674 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1676 status = "disabled";
1679 ipmmu_gp: mmu@e62a0000 {
1680 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1681 reg = <0 0xe62a0000 0 0x1000>;
1682 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1683 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1685 status = "disabled";
1688 rcar_sound: sound@ec500000 {
1690 * #sound-dai-cells is required
1692 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1693 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1695 compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
1696 reg = <0 0xec500000 0 0x1000>, /* SCU */
1697 <0 0xec5a0000 0 0x100>, /* ADG */
1698 <0 0xec540000 0 0x1000>, /* SSIU */
1699 <0 0xec541000 0 0x280>, /* SSI */
1700 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1701 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1703 clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1704 <&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>,
1705 <&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>,
1706 <&mstp10_clks R8A7791_CLK_SSI5>, <&mstp10_clks R8A7791_CLK_SSI4>,
1707 <&mstp10_clks R8A7791_CLK_SSI3>, <&mstp10_clks R8A7791_CLK_SSI2>,
1708 <&mstp10_clks R8A7791_CLK_SSI1>, <&mstp10_clks R8A7791_CLK_SSI0>,
1709 <&mstp10_clks R8A7791_CLK_SCU_SRC9>, <&mstp10_clks R8A7791_CLK_SCU_SRC8>,
1710 <&mstp10_clks R8A7791_CLK_SCU_SRC7>, <&mstp10_clks R8A7791_CLK_SCU_SRC6>,
1711 <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
1712 <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
1713 <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
1714 <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
1715 <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
1716 <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
1717 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1718 clock-names = "ssi-all",
1719 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1720 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1721 "src.9", "src.8", "src.7", "src.6", "src.5",
1722 "src.4", "src.3", "src.2", "src.1", "src.0",
1726 "clk_a", "clk_b", "clk_c", "clk_i";
1727 power-domains = <&cpg_clocks>;
1729 status = "disabled";
1733 dmas = <&audma0 0xbc>;
1737 dmas = <&audma0 0xbe>;
1760 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1761 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1762 dma-names = "rx", "tx";
1765 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1766 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1767 dma-names = "rx", "tx";
1770 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1771 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1772 dma-names = "rx", "tx";
1775 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1776 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1777 dma-names = "rx", "tx";
1780 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1781 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1782 dma-names = "rx", "tx";
1785 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1786 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1787 dma-names = "rx", "tx";
1790 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1791 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1792 dma-names = "rx", "tx";
1795 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1796 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1797 dma-names = "rx", "tx";
1800 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1801 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1802 dma-names = "rx", "tx";
1805 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1806 dmas = <&audma0 0x97>, <&audma1 0xba>;
1807 dma-names = "rx", "tx";
1813 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1814 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1815 dma-names = "rx", "tx", "rxu", "txu";
1818 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1819 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1820 dma-names = "rx", "tx", "rxu", "txu";
1823 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1824 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1825 dma-names = "rx", "tx", "rxu", "txu";
1828 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1829 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1830 dma-names = "rx", "tx", "rxu", "txu";
1833 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1834 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1835 dma-names = "rx", "tx", "rxu", "txu";
1838 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1839 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1840 dma-names = "rx", "tx", "rxu", "txu";
1843 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1844 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1845 dma-names = "rx", "tx", "rxu", "txu";
1848 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1849 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1850 dma-names = "rx", "tx", "rxu", "txu";
1853 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1854 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1855 dma-names = "rx", "tx", "rxu", "txu";
1858 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1859 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1860 dma-names = "rx", "tx", "rxu", "txu";