2 * Device Tree Source for the r8a7791 SoC
4 * Copyright (C) 2013-2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7791-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 compatible = "renesas,r8a7791";
19 interrupt-parent = <&gic>;
48 compatible = "arm,cortex-a15";
50 clock-frequency = <1500000000>;
51 voltage-tolerance = <1>; /* 1% */
52 clocks = <&cpg_clocks R8A7791_CLK_Z>;
53 clock-latency = <300000>; /* 300 us */
54 next-level-cache = <&L2_CA15>;
56 /* kHz - uV - OPPs unknown yet */
57 operating-points = <1500000 1000000>,
67 compatible = "arm,cortex-a15";
69 clock-frequency = <1500000000>;
70 next-level-cache = <&L2_CA15>;
75 cpu_thermal: cpu-thermal {
76 polling-delay-passive = <0>;
79 thermal-sensors = <&thermal>;
83 temperature = <115000>;
93 L2_CA15: cache-controller@0 {
99 gic: interrupt-controller@f1001000 {
100 compatible = "arm,gic-400";
101 #interrupt-cells = <3>;
102 #address-cells = <0>;
103 interrupt-controller;
104 reg = <0 0xf1001000 0 0x1000>,
105 <0 0xf1002000 0 0x1000>,
106 <0 0xf1004000 0 0x2000>,
107 <0 0xf1006000 0 0x2000>;
108 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
111 gpio0: gpio@e6050000 {
112 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
113 reg = <0 0xe6050000 0 0x50>;
114 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
117 gpio-ranges = <&pfc 0 0 32>;
118 #interrupt-cells = <2>;
119 interrupt-controller;
120 clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
121 power-domains = <&cpg_clocks>;
124 gpio1: gpio@e6051000 {
125 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
126 reg = <0 0xe6051000 0 0x50>;
127 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
130 gpio-ranges = <&pfc 0 32 26>;
131 #interrupt-cells = <2>;
132 interrupt-controller;
133 clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
134 power-domains = <&cpg_clocks>;
137 gpio2: gpio@e6052000 {
138 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
139 reg = <0 0xe6052000 0 0x50>;
140 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
143 gpio-ranges = <&pfc 0 64 32>;
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
147 power-domains = <&cpg_clocks>;
150 gpio3: gpio@e6053000 {
151 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
152 reg = <0 0xe6053000 0 0x50>;
153 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
156 gpio-ranges = <&pfc 0 96 32>;
157 #interrupt-cells = <2>;
158 interrupt-controller;
159 clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
160 power-domains = <&cpg_clocks>;
163 gpio4: gpio@e6054000 {
164 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
165 reg = <0 0xe6054000 0 0x50>;
166 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
169 gpio-ranges = <&pfc 0 128 32>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
172 clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
173 power-domains = <&cpg_clocks>;
176 gpio5: gpio@e6055000 {
177 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
178 reg = <0 0xe6055000 0 0x50>;
179 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
182 gpio-ranges = <&pfc 0 160 32>;
183 #interrupt-cells = <2>;
184 interrupt-controller;
185 clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
186 power-domains = <&cpg_clocks>;
189 gpio6: gpio@e6055400 {
190 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
191 reg = <0 0xe6055400 0 0x50>;
192 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
195 gpio-ranges = <&pfc 0 192 32>;
196 #interrupt-cells = <2>;
197 interrupt-controller;
198 clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
199 power-domains = <&cpg_clocks>;
202 gpio7: gpio@e6055800 {
203 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
204 reg = <0 0xe6055800 0 0x50>;
205 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
208 gpio-ranges = <&pfc 0 224 26>;
209 #interrupt-cells = <2>;
210 interrupt-controller;
211 clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
212 power-domains = <&cpg_clocks>;
215 thermal: thermal@e61f0000 {
216 compatible = "renesas,thermal-r8a7791",
217 "renesas,rcar-gen2-thermal",
218 "renesas,rcar-thermal";
219 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
220 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
221 clocks = <&mstp5_clks R8A7791_CLK_THERMAL>;
222 power-domains = <&cpg_clocks>;
223 #thermal-sensor-cells = <0>;
227 compatible = "arm,armv7-timer";
228 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
229 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
230 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
231 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
234 cmt0: timer@ffca0000 {
235 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
236 reg = <0 0xffca0000 0 0x1004>;
237 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
238 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
239 clocks = <&mstp1_clks R8A7791_CLK_CMT0>;
241 power-domains = <&cpg_clocks>;
243 renesas,channels-mask = <0x60>;
248 cmt1: timer@e6130000 {
249 compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2";
250 reg = <0 0xe6130000 0 0x1004>;
251 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
252 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
254 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
255 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
256 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
257 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
258 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
259 clocks = <&mstp3_clks R8A7791_CLK_CMT1>;
261 power-domains = <&cpg_clocks>;
263 renesas,channels-mask = <0xff>;
268 irqc0: interrupt-controller@e61c0000 {
269 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
270 #interrupt-cells = <2>;
271 interrupt-controller;
272 reg = <0 0xe61c0000 0 0x200>;
273 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
274 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
275 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
278 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
283 clocks = <&mstp4_clks R8A7791_CLK_IRQC>;
284 power-domains = <&cpg_clocks>;
287 dmac0: dma-controller@e6700000 {
288 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
289 reg = <0 0xe6700000 0 0x20000>;
290 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
291 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
292 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
293 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
294 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
295 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
296 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
297 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
298 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
299 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
300 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
301 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
302 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
306 interrupt-names = "error",
307 "ch0", "ch1", "ch2", "ch3",
308 "ch4", "ch5", "ch6", "ch7",
309 "ch8", "ch9", "ch10", "ch11",
310 "ch12", "ch13", "ch14";
311 clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>;
313 power-domains = <&cpg_clocks>;
318 dmac1: dma-controller@e6720000 {
319 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
320 reg = <0 0xe6720000 0 0x20000>;
321 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
329 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
330 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
331 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
332 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
333 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
334 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
336 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
337 interrupt-names = "error",
338 "ch0", "ch1", "ch2", "ch3",
339 "ch4", "ch5", "ch6", "ch7",
340 "ch8", "ch9", "ch10", "ch11",
341 "ch12", "ch13", "ch14";
342 clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>;
344 power-domains = <&cpg_clocks>;
349 audma0: dma-controller@ec700000 {
350 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
351 reg = <0 0xec700000 0 0x10000>;
352 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
361 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
362 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
363 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
364 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
366 interrupt-names = "error",
367 "ch0", "ch1", "ch2", "ch3",
368 "ch4", "ch5", "ch6", "ch7",
369 "ch8", "ch9", "ch10", "ch11",
371 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>;
373 power-domains = <&cpg_clocks>;
378 audma1: dma-controller@ec720000 {
379 compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac";
380 reg = <0 0xec720000 0 0x10000>;
381 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
395 interrupt-names = "error",
396 "ch0", "ch1", "ch2", "ch3",
397 "ch4", "ch5", "ch6", "ch7",
398 "ch8", "ch9", "ch10", "ch11",
400 clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>;
402 power-domains = <&cpg_clocks>;
407 usb_dmac0: dma-controller@e65a0000 {
408 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
409 reg = <0 0xe65a0000 0 0x100>;
410 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
412 interrupt-names = "ch0", "ch1";
413 clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>;
414 power-domains = <&cpg_clocks>;
419 usb_dmac1: dma-controller@e65b0000 {
420 compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac";
421 reg = <0 0xe65b0000 0 0x100>;
422 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
424 interrupt-names = "ch0", "ch1";
425 clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>;
426 power-domains = <&cpg_clocks>;
431 /* The memory map in the User's Manual maps the cores to bus numbers */
433 #address-cells = <1>;
435 compatible = "renesas,i2c-r8a7791";
436 reg = <0 0xe6508000 0 0x40>;
437 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
438 clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
439 power-domains = <&cpg_clocks>;
440 i2c-scl-internal-delay-ns = <6>;
445 #address-cells = <1>;
447 compatible = "renesas,i2c-r8a7791";
448 reg = <0 0xe6518000 0 0x40>;
449 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
450 clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
451 power-domains = <&cpg_clocks>;
452 i2c-scl-internal-delay-ns = <6>;
457 #address-cells = <1>;
459 compatible = "renesas,i2c-r8a7791";
460 reg = <0 0xe6530000 0 0x40>;
461 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
462 clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
463 power-domains = <&cpg_clocks>;
464 i2c-scl-internal-delay-ns = <6>;
469 #address-cells = <1>;
471 compatible = "renesas,i2c-r8a7791";
472 reg = <0 0xe6540000 0 0x40>;
473 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
474 clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
475 power-domains = <&cpg_clocks>;
476 i2c-scl-internal-delay-ns = <6>;
481 #address-cells = <1>;
483 compatible = "renesas,i2c-r8a7791";
484 reg = <0 0xe6520000 0 0x40>;
485 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
486 clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
487 power-domains = <&cpg_clocks>;
488 i2c-scl-internal-delay-ns = <6>;
493 /* doesn't need pinmux */
494 #address-cells = <1>;
496 compatible = "renesas,i2c-r8a7791";
497 reg = <0 0xe6528000 0 0x40>;
498 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
500 power-domains = <&cpg_clocks>;
501 i2c-scl-internal-delay-ns = <110>;
506 /* doesn't need pinmux */
507 #address-cells = <1>;
509 compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
510 reg = <0 0xe60b0000 0 0x425>;
511 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
512 clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
513 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
514 dma-names = "tx", "rx";
515 power-domains = <&cpg_clocks>;
520 #address-cells = <1>;
522 compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
523 reg = <0 0xe6500000 0 0x425>;
524 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
525 clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
526 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
527 dma-names = "tx", "rx";
528 power-domains = <&cpg_clocks>;
533 #address-cells = <1>;
535 compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
536 reg = <0 0xe6510000 0 0x425>;
537 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
538 clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
539 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
540 dma-names = "tx", "rx";
541 power-domains = <&cpg_clocks>;
546 compatible = "renesas,pfc-r8a7791";
547 reg = <0 0xe6060000 0 0x250>;
550 mmcif0: mmc@ee200000 {
551 compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif";
552 reg = <0 0xee200000 0 0x80>;
553 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
554 clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>;
555 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
556 dma-names = "tx", "rx";
557 power-domains = <&cpg_clocks>;
560 max-frequency = <97500000>;
564 compatible = "renesas,sdhi-r8a7791";
565 reg = <0 0xee100000 0 0x328>;
566 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
567 clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
568 dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
569 dma-names = "tx", "rx";
570 power-domains = <&cpg_clocks>;
575 compatible = "renesas,sdhi-r8a7791";
576 reg = <0 0xee140000 0 0x100>;
577 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
578 clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
579 dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
580 dma-names = "tx", "rx";
581 power-domains = <&cpg_clocks>;
586 compatible = "renesas,sdhi-r8a7791";
587 reg = <0 0xee160000 0 0x100>;
588 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
590 dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
591 dma-names = "tx", "rx";
592 power-domains = <&cpg_clocks>;
596 scifa0: serial@e6c40000 {
597 compatible = "renesas,scifa-r8a7791",
598 "renesas,rcar-gen2-scifa", "renesas,scifa";
599 reg = <0 0xe6c40000 0 64>;
600 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
601 clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>;
603 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
604 dma-names = "tx", "rx";
605 power-domains = <&cpg_clocks>;
609 scifa1: serial@e6c50000 {
610 compatible = "renesas,scifa-r8a7791",
611 "renesas,rcar-gen2-scifa", "renesas,scifa";
612 reg = <0 0xe6c50000 0 64>;
613 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>;
616 dmas = <&dmac0 0x25>, <&dmac0 0x26>;
617 dma-names = "tx", "rx";
618 power-domains = <&cpg_clocks>;
622 scifa2: serial@e6c60000 {
623 compatible = "renesas,scifa-r8a7791",
624 "renesas,rcar-gen2-scifa", "renesas,scifa";
625 reg = <0 0xe6c60000 0 64>;
626 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
627 clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>;
629 dmas = <&dmac0 0x27>, <&dmac0 0x28>;
630 dma-names = "tx", "rx";
631 power-domains = <&cpg_clocks>;
635 scifa3: serial@e6c70000 {
636 compatible = "renesas,scifa-r8a7791",
637 "renesas,rcar-gen2-scifa", "renesas,scifa";
638 reg = <0 0xe6c70000 0 64>;
639 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
640 clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>;
642 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
643 dma-names = "tx", "rx";
644 power-domains = <&cpg_clocks>;
648 scifa4: serial@e6c78000 {
649 compatible = "renesas,scifa-r8a7791",
650 "renesas,rcar-gen2-scifa", "renesas,scifa";
651 reg = <0 0xe6c78000 0 64>;
652 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
653 clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>;
655 dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
656 dma-names = "tx", "rx";
657 power-domains = <&cpg_clocks>;
661 scifa5: serial@e6c80000 {
662 compatible = "renesas,scifa-r8a7791",
663 "renesas,rcar-gen2-scifa", "renesas,scifa";
664 reg = <0 0xe6c80000 0 64>;
665 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
666 clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>;
668 dmas = <&dmac0 0x23>, <&dmac0 0x24>;
669 dma-names = "tx", "rx";
670 power-domains = <&cpg_clocks>;
674 scifb0: serial@e6c20000 {
675 compatible = "renesas,scifb-r8a7791",
676 "renesas,rcar-gen2-scifb", "renesas,scifb";
677 reg = <0 0xe6c20000 0 64>;
678 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
679 clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>;
681 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
682 dma-names = "tx", "rx";
683 power-domains = <&cpg_clocks>;
687 scifb1: serial@e6c30000 {
688 compatible = "renesas,scifb-r8a7791",
689 "renesas,rcar-gen2-scifb", "renesas,scifb";
690 reg = <0 0xe6c30000 0 64>;
691 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
692 clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>;
694 dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
695 dma-names = "tx", "rx";
696 power-domains = <&cpg_clocks>;
700 scifb2: serial@e6ce0000 {
701 compatible = "renesas,scifb-r8a7791",
702 "renesas,rcar-gen2-scifb", "renesas,scifb";
703 reg = <0 0xe6ce0000 0 64>;
704 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
705 clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>;
707 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
708 dma-names = "tx", "rx";
709 power-domains = <&cpg_clocks>;
713 scif0: serial@e6e60000 {
714 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
716 reg = <0 0xe6e60000 0 64>;
717 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
718 clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>,
720 clock-names = "fck", "brg_int", "scif_clk";
721 dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
722 dma-names = "tx", "rx";
723 power-domains = <&cpg_clocks>;
727 scif1: serial@e6e68000 {
728 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
730 reg = <0 0xe6e68000 0 64>;
731 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
732 clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>,
734 clock-names = "fck", "brg_int", "scif_clk";
735 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
736 dma-names = "tx", "rx";
737 power-domains = <&cpg_clocks>;
741 scif2: serial@e6e58000 {
742 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
744 reg = <0 0xe6e58000 0 64>;
745 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
746 clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>,
748 clock-names = "fck", "brg_int", "scif_clk";
749 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
750 dma-names = "tx", "rx";
751 power-domains = <&cpg_clocks>;
755 scif3: serial@e6ea8000 {
756 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
758 reg = <0 0xe6ea8000 0 64>;
759 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
760 clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>,
762 clock-names = "fck", "brg_int", "scif_clk";
763 dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
764 dma-names = "tx", "rx";
765 power-domains = <&cpg_clocks>;
769 scif4: serial@e6ee0000 {
770 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
772 reg = <0 0xe6ee0000 0 64>;
773 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>,
776 clock-names = "fck", "brg_int", "scif_clk";
777 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
778 dma-names = "tx", "rx";
779 power-domains = <&cpg_clocks>;
783 scif5: serial@e6ee8000 {
784 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
786 reg = <0 0xe6ee8000 0 64>;
787 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
788 clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>,
790 clock-names = "fck", "brg_int", "scif_clk";
791 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
792 dma-names = "tx", "rx";
793 power-domains = <&cpg_clocks>;
797 hscif0: serial@e62c0000 {
798 compatible = "renesas,hscif-r8a7791",
799 "renesas,rcar-gen2-hscif", "renesas,hscif";
800 reg = <0 0xe62c0000 0 96>;
801 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
802 clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>,
804 clock-names = "fck", "brg_int", "scif_clk";
805 dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
806 dma-names = "tx", "rx";
807 power-domains = <&cpg_clocks>;
811 hscif1: serial@e62c8000 {
812 compatible = "renesas,hscif-r8a7791",
813 "renesas,rcar-gen2-hscif", "renesas,hscif";
814 reg = <0 0xe62c8000 0 96>;
815 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
816 clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>,
818 clock-names = "fck", "brg_int", "scif_clk";
819 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
820 dma-names = "tx", "rx";
821 power-domains = <&cpg_clocks>;
825 hscif2: serial@e62d0000 {
826 compatible = "renesas,hscif-r8a7791",
827 "renesas,rcar-gen2-hscif", "renesas,hscif";
828 reg = <0 0xe62d0000 0 96>;
829 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
830 clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>,
832 clock-names = "fck", "brg_int", "scif_clk";
833 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
834 dma-names = "tx", "rx";
835 power-domains = <&cpg_clocks>;
839 ether: ethernet@ee700000 {
840 compatible = "renesas,ether-r8a7791";
841 reg = <0 0xee700000 0 0x400>;
842 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
843 clocks = <&mstp8_clks R8A7791_CLK_ETHER>;
844 power-domains = <&cpg_clocks>;
846 #address-cells = <1>;
851 avb: ethernet@e6800000 {
852 compatible = "renesas,etheravb-r8a7791",
853 "renesas,etheravb-rcar-gen2";
854 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
855 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
856 clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>;
857 power-domains = <&cpg_clocks>;
858 #address-cells = <1>;
863 sata0: sata@ee300000 {
864 compatible = "renesas,sata-r8a7791";
865 reg = <0 0xee300000 0 0x2000>;
866 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
867 clocks = <&mstp8_clks R8A7791_CLK_SATA0>;
868 power-domains = <&cpg_clocks>;
872 sata1: sata@ee500000 {
873 compatible = "renesas,sata-r8a7791";
874 reg = <0 0xee500000 0 0x2000>;
875 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
876 clocks = <&mstp8_clks R8A7791_CLK_SATA1>;
877 power-domains = <&cpg_clocks>;
881 hsusb: usb@e6590000 {
882 compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs";
883 reg = <0 0xe6590000 0 0x100>;
884 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
885 clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
886 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
887 <&usb_dmac1 0>, <&usb_dmac1 1>;
888 dma-names = "ch0", "ch1", "ch2", "ch3";
889 power-domains = <&cpg_clocks>;
890 renesas,buswait = <4>;
896 usbphy: usb-phy@e6590100 {
897 compatible = "renesas,usb-phy-r8a7791";
898 reg = <0 0xe6590100 0 0x100>;
899 #address-cells = <1>;
901 clocks = <&mstp7_clks R8A7791_CLK_HSUSB>;
902 clock-names = "usbhs";
903 power-domains = <&cpg_clocks>;
906 usb0: usb-channel@0 {
910 usb2: usb-channel@2 {
916 vin0: video@e6ef0000 {
917 compatible = "renesas,vin-r8a7791";
918 reg = <0 0xe6ef0000 0 0x1000>;
919 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
920 clocks = <&mstp8_clks R8A7791_CLK_VIN0>;
921 power-domains = <&cpg_clocks>;
925 vin1: video@e6ef1000 {
926 compatible = "renesas,vin-r8a7791";
927 reg = <0 0xe6ef1000 0 0x1000>;
928 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
929 clocks = <&mstp8_clks R8A7791_CLK_VIN1>;
930 power-domains = <&cpg_clocks>;
934 vin2: video@e6ef2000 {
935 compatible = "renesas,vin-r8a7791";
936 reg = <0 0xe6ef2000 0 0x1000>;
937 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
938 clocks = <&mstp8_clks R8A7791_CLK_VIN2>;
939 power-domains = <&cpg_clocks>;
944 compatible = "renesas,vsp1";
945 reg = <0 0xfe928000 0 0x8000>;
946 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
947 clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>;
948 power-domains = <&cpg_clocks>;
958 compatible = "renesas,vsp1";
959 reg = <0 0xfe930000 0 0x8000>;
960 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
961 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>;
962 power-domains = <&cpg_clocks>;
972 compatible = "renesas,vsp1";
973 reg = <0 0xfe938000 0 0x8000>;
974 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>;
976 power-domains = <&cpg_clocks>;
985 du: display@feb00000 {
986 compatible = "renesas,du-r8a7791";
987 reg = <0 0xfeb00000 0 0x40000>,
988 <0 0xfeb90000 0 0x1c>;
989 reg-names = "du", "lvds.0";
990 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
991 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
992 clocks = <&mstp7_clks R8A7791_CLK_DU0>,
993 <&mstp7_clks R8A7791_CLK_DU1>,
994 <&mstp7_clks R8A7791_CLK_LVDS0>;
995 clock-names = "du.0", "du.1", "lvds.0";
999 #address-cells = <1>;
1004 du_out_rgb: endpoint {
1009 du_out_lvds0: endpoint {
1015 can0: can@e6e80000 {
1016 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1017 reg = <0 0xe6e80000 0 0x1000>;
1018 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1019 clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
1020 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
1021 clock-names = "clkp1", "clkp2", "can_clk";
1022 power-domains = <&cpg_clocks>;
1023 status = "disabled";
1026 can1: can@e6e88000 {
1027 compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can";
1028 reg = <0 0xe6e88000 0 0x1000>;
1029 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1030 clocks = <&mstp9_clks R8A7791_CLK_RCAN1>,
1031 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
1032 clock-names = "clkp1", "clkp2", "can_clk";
1033 power-domains = <&cpg_clocks>;
1034 status = "disabled";
1037 jpu: jpeg-codec@fe980000 {
1038 compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu";
1039 reg = <0 0xfe980000 0 0x10300>;
1040 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1041 clocks = <&mstp1_clks R8A7791_CLK_JPU>;
1042 power-domains = <&cpg_clocks>;
1046 #address-cells = <2>;
1050 /* External root clock */
1052 compatible = "fixed-clock";
1054 /* This value must be overriden by the board. */
1055 clock-frequency = <0>;
1059 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
1060 * default. Boards that provide audio clocks should override them.
1062 audio_clk_a: audio_clk_a {
1063 compatible = "fixed-clock";
1065 clock-frequency = <0>;
1067 audio_clk_b: audio_clk_b {
1068 compatible = "fixed-clock";
1070 clock-frequency = <0>;
1072 audio_clk_c: audio_clk_c {
1073 compatible = "fixed-clock";
1075 clock-frequency = <0>;
1078 /* External PCIe clock - can be overridden by the board */
1079 pcie_bus_clk: pcie_bus {
1080 compatible = "fixed-clock";
1082 clock-frequency = <0>;
1085 /* External SCIF clock */
1087 compatible = "fixed-clock";
1089 /* This value must be overridden by the board. */
1090 clock-frequency = <0>;
1093 /* External USB clock - can be overridden by the board */
1094 usb_extal_clk: usb_extal {
1095 compatible = "fixed-clock";
1097 clock-frequency = <48000000>;
1100 /* External CAN clock */
1102 compatible = "fixed-clock";
1104 /* This value must be overridden by the board. */
1105 clock-frequency = <0>;
1108 /* Special CPG clocks */
1109 cpg_clocks: cpg_clocks@e6150000 {
1110 compatible = "renesas,r8a7791-cpg-clocks",
1111 "renesas,rcar-gen2-cpg-clocks";
1112 reg = <0 0xe6150000 0 0x1000>;
1113 clocks = <&extal_clk &usb_extal_clk>;
1115 clock-output-names = "main", "pll0", "pll1", "pll3",
1116 "lb", "qspi", "sdh", "sd0", "z",
1118 #power-domain-cells = <0>;
1121 /* Variable factor clocks */
1122 sd2_clk: sd2@e6150078 {
1123 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1124 reg = <0 0xe6150078 0 4>;
1125 clocks = <&pll1_div2_clk>;
1128 sd3_clk: sd3@e615026c {
1129 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1130 reg = <0 0xe615026c 0 4>;
1131 clocks = <&pll1_div2_clk>;
1134 mmc0_clk: mmc0@e6150240 {
1135 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1136 reg = <0 0xe6150240 0 4>;
1137 clocks = <&pll1_div2_clk>;
1140 ssp_clk: ssp@e6150248 {
1141 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1142 reg = <0 0xe6150248 0 4>;
1143 clocks = <&pll1_div2_clk>;
1146 ssprs_clk: ssprs@e615024c {
1147 compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
1148 reg = <0 0xe615024c 0 4>;
1149 clocks = <&pll1_div2_clk>;
1153 /* Fixed factor clocks */
1154 pll1_div2_clk: pll1_div2 {
1155 compatible = "fixed-factor-clock";
1156 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1162 compatible = "fixed-factor-clock";
1163 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1169 compatible = "fixed-factor-clock";
1170 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1176 compatible = "fixed-factor-clock";
1177 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1183 compatible = "fixed-factor-clock";
1184 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1190 compatible = "fixed-factor-clock";
1191 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1197 compatible = "fixed-factor-clock";
1198 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1204 compatible = "fixed-factor-clock";
1205 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1211 compatible = "fixed-factor-clock";
1212 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1218 compatible = "fixed-factor-clock";
1219 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1225 compatible = "fixed-factor-clock";
1226 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1228 clock-div = <(48 * 1024)>;
1231 oscclk_clk: oscclk {
1232 compatible = "fixed-factor-clock";
1233 clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
1235 clock-div = <(12 * 1024)>;
1239 compatible = "fixed-factor-clock";
1240 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1246 compatible = "fixed-factor-clock";
1247 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1253 compatible = "fixed-factor-clock";
1254 clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
1260 compatible = "fixed-factor-clock";
1261 clocks = <&pll1_div2_clk>;
1267 compatible = "fixed-factor-clock";
1268 clocks = <&extal_clk>;
1275 mstp0_clks: mstp0_clks@e6150130 {
1276 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1277 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1280 clock-indices = <R8A7791_CLK_MSIOF0>;
1281 clock-output-names = "msiof0";
1283 mstp1_clks: mstp1_clks@e6150134 {
1284 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1285 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1286 clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>,
1287 <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1288 <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>,
1292 R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU
1293 R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG
1294 R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0
1295 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0
1296 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0
1299 clock-output-names =
1300 "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg",
1301 "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0",
1302 "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy";
1304 mstp2_clks: mstp2_clks@e6150138 {
1305 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1306 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1307 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1308 <&mp_clk>, <&mp_clk>, <&mp_clk>,
1309 <&zs_clk>, <&zs_clk>;
1312 R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
1313 R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1
1314 R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2
1315 R8A7791_CLK_SYS_DMAC1 R8A7791_CLK_SYS_DMAC0
1317 clock-output-names =
1318 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1319 "scifb1", "msiof1", "scifb2",
1320 "sys-dmac1", "sys-dmac0";
1322 mstp3_clks: mstp3_clks@e615013c {
1323 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1324 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1325 clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
1326 <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1327 <&hp_clk>, <&hp_clk>;
1330 R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
1331 R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
1332 R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
1333 R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
1335 clock-output-names =
1336 "tpu0", "sdhi2", "sdhi1", "sdhi0",
1337 "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
1338 "usbdmac0", "usbdmac1";
1340 mstp4_clks: mstp4_clks@e6150140 {
1341 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1342 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1345 clock-indices = <R8A7791_CLK_IRQC>;
1346 clock-output-names = "irqc";
1348 mstp5_clks: mstp5_clks@e6150144 {
1349 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1350 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1351 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>,
1352 <&extal_clk>, <&p_clk>;
1355 R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1
1356 R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL
1359 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1362 mstp7_clks: mstp7_clks@e615014c {
1363 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1364 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1365 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
1366 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1367 <&zx_clk>, <&zx_clk>, <&zx_clk>;
1370 R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
1371 R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
1372 R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
1373 R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
1376 clock-output-names =
1377 "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
1378 "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
1380 mstp8_clks: mstp8_clks@e6150990 {
1381 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1382 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1383 clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>,
1384 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1388 R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB
1389 R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0
1390 R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER
1391 R8A7791_CLK_SATA1 R8A7791_CLK_SATA0
1393 clock-output-names =
1394 "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0",
1395 "etheravb", "ether", "sata1", "sata0";
1397 mstp9_clks: mstp9_clks@e6150994 {
1398 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1399 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1400 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1401 <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
1402 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
1403 <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
1404 <&hp_clk>, <&hp_clk>;
1407 R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
1408 R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
1409 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
1410 R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
1411 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
1413 clock-output-names =
1414 "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1415 "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
1418 mstp10_clks: mstp10_clks@e6150998 {
1419 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1420 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1422 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1423 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1425 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1426 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1427 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1428 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1429 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1430 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>,
1431 <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>;
1436 R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
1437 R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
1439 R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0
1440 R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0
1441 R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5
1442 R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0
1444 clock-output-names =
1446 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1447 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1449 "scu-dvc1", "scu-dvc0",
1450 "scu-ctu1-mix1", "scu-ctu0-mix0",
1451 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1452 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1454 mstp11_clks: mstp11_clks@e615099c {
1455 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
1456 reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
1457 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
1460 R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5
1462 clock-output-names = "scifa3", "scifa4", "scifa5";
1466 qspi: spi@e6b10000 {
1467 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
1468 reg = <0 0xe6b10000 0 0x2c>;
1469 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1470 clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
1471 dmas = <&dmac0 0x17>, <&dmac0 0x18>;
1472 dma-names = "tx", "rx";
1473 power-domains = <&cpg_clocks>;
1475 #address-cells = <1>;
1477 status = "disabled";
1480 msiof0: spi@e6e20000 {
1481 compatible = "renesas,msiof-r8a7791";
1482 reg = <0 0xe6e20000 0 0x0064>;
1483 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1484 clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
1485 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
1486 dma-names = "tx", "rx";
1487 power-domains = <&cpg_clocks>;
1488 #address-cells = <1>;
1490 status = "disabled";
1493 msiof1: spi@e6e10000 {
1494 compatible = "renesas,msiof-r8a7791";
1495 reg = <0 0xe6e10000 0 0x0064>;
1496 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1497 clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
1498 dmas = <&dmac0 0x55>, <&dmac0 0x56>;
1499 dma-names = "tx", "rx";
1500 power-domains = <&cpg_clocks>;
1501 #address-cells = <1>;
1503 status = "disabled";
1506 msiof2: spi@e6e00000 {
1507 compatible = "renesas,msiof-r8a7791";
1508 reg = <0 0xe6e00000 0 0x0064>;
1509 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1510 clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
1511 dmas = <&dmac0 0x41>, <&dmac0 0x42>;
1512 dma-names = "tx", "rx";
1513 power-domains = <&cpg_clocks>;
1514 #address-cells = <1>;
1516 status = "disabled";
1519 xhci: usb@ee000000 {
1520 compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci";
1521 reg = <0 0xee000000 0 0xc00>;
1522 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1523 clocks = <&mstp3_clks R8A7791_CLK_SSUSB>;
1524 power-domains = <&cpg_clocks>;
1527 status = "disabled";
1530 pci0: pci@ee090000 {
1531 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1532 device_type = "pci";
1533 reg = <0 0xee090000 0 0xc00>,
1534 <0 0xee080000 0 0x1100>;
1535 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1536 clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
1537 power-domains = <&cpg_clocks>;
1538 status = "disabled";
1541 #address-cells = <3>;
1543 #interrupt-cells = <1>;
1544 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1545 interrupt-map-mask = <0xff00 0 0 0x7>;
1546 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1547 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1548 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1551 reg = <0x800 0 0 0 0>;
1552 device_type = "pci";
1558 reg = <0x1000 0 0 0 0>;
1559 device_type = "pci";
1565 pci1: pci@ee0d0000 {
1566 compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2";
1567 device_type = "pci";
1568 reg = <0 0xee0d0000 0 0xc00>,
1569 <0 0xee0c0000 0 0x1100>;
1570 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1571 clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
1572 power-domains = <&cpg_clocks>;
1573 status = "disabled";
1576 #address-cells = <3>;
1578 #interrupt-cells = <1>;
1579 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1580 interrupt-map-mask = <0xff00 0 0 0x7>;
1581 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1582 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1583 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1586 reg = <0x800 0 0 0 0>;
1587 device_type = "pci";
1593 reg = <0x1000 0 0 0 0>;
1594 device_type = "pci";
1600 pciec: pcie@fe000000 {
1601 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
1602 reg = <0 0xfe000000 0 0x80000>;
1603 #address-cells = <3>;
1605 bus-range = <0x00 0xff>;
1606 device_type = "pci";
1607 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1608 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1609 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1610 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1611 /* Map all possible DDR as inbound ranges */
1612 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1613 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1614 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1615 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1616 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1617 #interrupt-cells = <1>;
1618 interrupt-map-mask = <0 0 0 0>;
1619 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1620 clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>;
1621 clock-names = "pcie", "pcie_bus";
1622 power-domains = <&cpg_clocks>;
1623 status = "disabled";
1626 ipmmu_sy0: mmu@e6280000 {
1627 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1628 reg = <0 0xe6280000 0 0x1000>;
1629 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1630 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1632 status = "disabled";
1635 ipmmu_sy1: mmu@e6290000 {
1636 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1637 reg = <0 0xe6290000 0 0x1000>;
1638 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1640 status = "disabled";
1643 ipmmu_ds: mmu@e6740000 {
1644 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1645 reg = <0 0xe6740000 0 0x1000>;
1646 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1647 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1649 status = "disabled";
1652 ipmmu_mp: mmu@ec680000 {
1653 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1654 reg = <0 0xec680000 0 0x1000>;
1655 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1657 status = "disabled";
1660 ipmmu_mx: mmu@fe951000 {
1661 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1662 reg = <0 0xfe951000 0 0x1000>;
1663 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1664 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1666 status = "disabled";
1669 ipmmu_rt: mmu@ffc80000 {
1670 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1671 reg = <0 0xffc80000 0 0x1000>;
1672 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1674 status = "disabled";
1677 ipmmu_gp: mmu@e62a0000 {
1678 compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa";
1679 reg = <0 0xe62a0000 0 0x1000>;
1680 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1681 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1683 status = "disabled";
1686 rcar_sound: sound@ec500000 {
1688 * #sound-dai-cells is required
1690 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1691 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1693 compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
1694 reg = <0 0xec500000 0 0x1000>, /* SCU */
1695 <0 0xec5a0000 0 0x100>, /* ADG */
1696 <0 0xec540000 0 0x1000>, /* SSIU */
1697 <0 0xec541000 0 0x280>, /* SSI */
1698 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1699 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1701 clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>,
1702 <&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>,
1703 <&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>,
1704 <&mstp10_clks R8A7791_CLK_SSI5>, <&mstp10_clks R8A7791_CLK_SSI4>,
1705 <&mstp10_clks R8A7791_CLK_SSI3>, <&mstp10_clks R8A7791_CLK_SSI2>,
1706 <&mstp10_clks R8A7791_CLK_SSI1>, <&mstp10_clks R8A7791_CLK_SSI0>,
1707 <&mstp10_clks R8A7791_CLK_SCU_SRC9>, <&mstp10_clks R8A7791_CLK_SCU_SRC8>,
1708 <&mstp10_clks R8A7791_CLK_SCU_SRC7>, <&mstp10_clks R8A7791_CLK_SCU_SRC6>,
1709 <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>,
1710 <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>,
1711 <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>,
1712 <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
1713 <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>,
1714 <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>,
1715 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1716 clock-names = "ssi-all",
1717 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1718 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1719 "src.9", "src.8", "src.7", "src.6", "src.5",
1720 "src.4", "src.3", "src.2", "src.1", "src.0",
1724 "clk_a", "clk_b", "clk_c", "clk_i";
1725 power-domains = <&cpg_clocks>;
1727 status = "disabled";
1731 dmas = <&audma0 0xbc>;
1735 dmas = <&audma0 0xbe>;
1758 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1759 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1760 dma-names = "rx", "tx";
1763 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1764 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1765 dma-names = "rx", "tx";
1768 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1769 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1770 dma-names = "rx", "tx";
1773 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1774 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1775 dma-names = "rx", "tx";
1778 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1779 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1780 dma-names = "rx", "tx";
1783 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1784 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1785 dma-names = "rx", "tx";
1788 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1789 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1790 dma-names = "rx", "tx";
1793 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1794 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1795 dma-names = "rx", "tx";
1798 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1799 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1800 dma-names = "rx", "tx";
1803 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1804 dmas = <&audma0 0x97>, <&audma1 0xba>;
1805 dma-names = "rx", "tx";
1811 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1812 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1813 dma-names = "rx", "tx", "rxu", "txu";
1816 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1817 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1818 dma-names = "rx", "tx", "rxu", "txu";
1821 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1822 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1823 dma-names = "rx", "tx", "rxu", "txu";
1826 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1827 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1828 dma-names = "rx", "tx", "rxu", "txu";
1831 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1832 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1833 dma-names = "rx", "tx", "rxu", "txu";
1836 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1837 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1838 dma-names = "rx", "tx", "rxu", "txu";
1841 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1842 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1843 dma-names = "rx", "tx", "rxu", "txu";
1846 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1847 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1848 dma-names = "rx", "tx", "rxu", "txu";
1851 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1852 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1853 dma-names = "rx", "tx", "rxu", "txu";
1856 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1857 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1858 dma-names = "rx", "tx", "rxu", "txu";