arch/arm/boot/dts/r8a7793-gose.dts

   1 /*
   2  * Device Tree Source for the Gose board
   3  *
   4  * Copyright (C) 2014-2015 Renesas Electronics Corporation
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /dts-v1/;
  12 #include "r8a7793.dtsi"
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         model = "Gose";
  18         compatible = "renesas,gose", "renesas,r8a7793";
  19
  20         aliases {
  21                 serial0 = &scif0;
  22                 serial1 = &scif1;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@40000000 {
  31                 device_type = "memory";
  32                 reg = <0 0x40000000 0 0x40000000>;
  33         };
  34 };
  35
  36 &extal_clk {
  37         clock-frequency = <20000000>;
  38 };
  39
  40 &pfc {
  41         scif0_pins: serial0 {
  42                 renesas,groups = "scif0_data_d";
  43                 renesas,function = "scif0";
  44         };
  45
  46         scif1_pins: serial1 {
  47                 renesas,groups = "scif1_data_d";
  48                 renesas,function = "scif1";
  49         };
  50
  51         ether_pins: ether {
  52                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
  53                 renesas,function = "eth";
  54         };
  55
  56         phy1_pins: phy1 {
  57                 renesas,groups = "intc_irq0";
  58                 renesas,function = "intc";
  59         };
  60
  61         qspi_pins: spi0 {
  62                 renesas,groups = "qspi_ctrl", "qspi_data4";
  63                 renesas,function = "qspi";
  64         };
  65 };
  66
  67 &ether {
  68         pinctrl-0 = <&ether_pins &phy1_pins>;
  69         pinctrl-names = "default";
  70
  71         phy-handle = <&phy1>;
  72         renesas,ether-link-active-low;
  73         status = "okay";
  74
  75         phy1: ethernet-phy@1 {
  76                 reg = <1>;
  77                 interrupt-parent = <&irqc0>;
  78                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  79                 micrel,led-mode = <1>;
  80         };
  81 };
  82
  83 &cmt0 {
  84         status = "okay";
  85 };
  86
  87 &scif0 {
  88         pinctrl-0 = <&scif0_pins>;
  89         pinctrl-names = "default";
  90
  91         status = "okay";
  92 };
  93
  94 &scif1 {
  95         pinctrl-0 = <&scif1_pins>;
  96         pinctrl-names = "default";
  97
  98         status = "okay";
  99 };
 100
 101 &qspi {
 102         pinctrl-0 = <&qspi_pins>;
 103         pinctrl-names = "default";
 104
 105         status = "okay";
 106
 107         flash@0 {
 108                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 109                 reg = <0>;
 110                 spi-max-frequency = <30000000>;
 111                 spi-tx-bus-width = <4>;
 112                 spi-rx-bus-width = <4>;
 113                 spi-cpol;
 114                 spi-cpha;
 115                 m25p,fast-read;
 116
 117                 partitions {
 118                         compatible = "fixed-partitions";
 119                         #address-cells = <1>;
 120                         #size-cells = <1>;
 121
 122                         partition@0 {
 123                                 label = "loader";
 124                                 reg = <0x00000000 0x00040000>;
 125                                 read-only;
 126                         };
 127                         partition@40000 {
 128                                 label = "user";
 129                                 reg = <0x00040000 0x00400000>;
 130                                 read-only;
 131                         };
 132                         partition@440000 {
 133                                 label = "flash";
 134                                 reg = <0x00440000 0x03bc0000>;
 135                         };
 136                 };
 137         };
 138 };