2 * Device Tree Source for the Alt board
4 * Copyright (C) 2014 Renesas Electronics Corporation
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
12 #include "r8a7794.dtsi"
16 compatible = "renesas,alt", "renesas,r8a7794";
23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
24 stdout-path = "serial0:115200n8";
28 device_type = "memory";
29 reg = <0 0x40000000 0 0x40000000>;
38 compatible = "adi,adv7123";
46 adv7123_in: endpoint {
47 remote-endpoint = <&du_out_rgb1>;
52 adv7123_out: endpoint {
53 remote-endpoint = <&vga_in>;
60 compatible = "vga-connector";
64 remote-endpoint = <&adv7123_out>;
70 compatible = "fixed-clock";
72 clock-frequency = <74250000>;
76 compatible = "fixed-clock";
78 clock-frequency = <148500000>;
83 pinctrl-0 = <&du_pins>;
84 pinctrl-names = "default";
87 clocks = <&mstp7_clks R8A7794_CLK_DU0>,
88 <&mstp7_clks R8A7794_CLK_DU0>,
89 <&x13_clk>, <&x2_clk>;
90 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
95 remote-endpoint = <&adv7123_in>;
102 clock-frequency = <20000000>;
106 pinctrl-0 = <&scif_clk_pins>;
107 pinctrl-names = "default";
110 renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
111 renesas,function = "du";
114 scif2_pins: serial2 {
115 renesas,groups = "scif2_data";
116 renesas,function = "scif2";
119 scif_clk_pins: scif_clk {
120 renesas,groups = "scif_clk";
121 renesas,function = "scif_clk";
125 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
126 renesas,function = "eth";
130 renesas,groups = "intc_irq8";
131 renesas,function = "intc";
135 renesas,groups = "i2c1";
136 renesas,function = "i2c1";
140 renesas,groups = "vin0_data8", "vin0_clk";
141 renesas,function = "vin0";
151 renesas,groups = "qspi_ctrl", "qspi_data4";
152 renesas,function = "qspi";
157 pinctrl-0 = <ðer_pins &phy1_pins>;
158 pinctrl-names = "default";
160 phy-handle = <&phy1>;
161 renesas,ether-link-active-low;
164 phy1: ethernet-phy@1 {
166 interrupt-parent = <&irqc0>;
167 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
168 micrel,led-mode = <1>;
173 pinctrl-0 = <&i2c1_pins>;
174 pinctrl-names = "default";
177 clock-frequency = <400000>;
180 compatible = "adi,adv7180";
187 remote-endpoint = <&vin0ep>;
195 pinctrl-0 = <&vin0_pins>;
196 pinctrl-names = "default";
199 #address-cells = <1>;
203 remote-endpoint = <&adv7180>;
210 pinctrl-0 = <&scif2_pins>;
211 pinctrl-names = "default";
217 clock-frequency = <14745600>;
222 pinctrl-0 = <&qspi_pins>;
223 pinctrl-names = "default";
228 compatible = "spansion,s25fl512s", "jedec,spi-nor";
230 spi-max-frequency = <30000000>;
231 spi-tx-bus-width = <4>;
232 spi-rx-bus-width = <4>;
238 compatible = "fixed-partitions";
239 #address-cells = <1>;
244 reg = <0x00000000 0x00040000>;
249 reg = <0x00040000 0x00040000>;
254 reg = <0x00080000 0x03f80000>;