arch/arm/boot/dts/sama5d3.dtsi

   1 /*
   2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
   3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC
   4  *
   5  *  Copyright (C) 2013 Atmel,
   6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         model = "Atmel SAMA5D3 family SoC";
  15         compatible = "atmel,sama5d3", "atmel,sama5";
  16         interrupt-parent = <&aic>;
  17
  18         aliases {
  19                 serial0 = &dbgu;
  20                 serial1 = &usart0;
  21                 serial2 = &usart1;
  22                 serial3 = &usart2;
  23                 serial4 = &usart3;
  24                 gpio0 = &pioA;
  25                 gpio1 = &pioB;
  26                 gpio2 = &pioC;
  27                 gpio3 = &pioD;
  28                 gpio4 = &pioE;
  29                 tcb0 = &tcb0;
  30                 tcb1 = &tcb1;
  31                 i2c0 = &i2c0;
  32                 i2c1 = &i2c1;
  33                 i2c2 = &i2c2;
  34                 ssc0 = &ssc0;
  35                 ssc1 = &ssc1;
  36         };
  37         cpus {
  38                 cpu@0 {
  39                         compatible = "arm,cortex-a5";
  40                 };
  41         };
  42
  43         memory {
  44                 reg = <0x20000000 0x8000000>;
  45         };
  46
  47         ahb {
  48                 compatible = "simple-bus";
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 ranges;
  52
  53                 apb {
  54                         compatible = "simple-bus";
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges;
  58
  59                         mmc0: mmc@f0000000 {
  60                                 compatible = "atmel,hsmci";
  61                                 reg = <0xf0000000 0x600>;
  62                                 interrupts = <21 4 0>;
  63                                 pinctrl-names = "default";
  64                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
  65                                 status = "disabled";
  66                                 #address-cells = <1>;
  67                                 #size-cells = <0>;
  68                         };
  69
  70                         spi0: spi@f0004000 {
  71                                 #address-cells = <1>;
  72                                 #size-cells = <0>;
  73                                 compatible = "atmel,at91sam9x5-spi";
  74                                 reg = <0xf0004000 0x100>;
  75                                 interrupts = <24 4 3>;
  76                                 cs-gpios = <&pioD 13 0
  77                                             &pioD 14 0 /* conflicts with SCK0 and CANRX0 */
  78                                             &pioD 15 0 /* conflicts with CTS0 and CANTX0 */
  79                                             &pioD 16 0 /* conflicts with RTS0 and PWMFI3 */
  80                                            >;
  81                                 pinctrl-names = "default";
  82                                 pinctrl-0 = <&pinctrl_spi0>;
  83                                 status = "disabled";
  84                         };
  85
  86                         ssc0: ssc@f0008000 {
  87                                 compatible = "atmel,at91sam9g45-ssc";
  88                                 reg = <0xf0008000 0x4000>;
  89                                 interrupts = <38 4 4>;
  90                                 pinctrl-names = "default";
  91                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
  92                                 status = "disabled";
  93                         };
  94
  95                         can0: can@f000c000 {
  96                                 compatible = "atmel,at91sam9x5-can";
  97                                 reg = <0xf000c000 0x300>;
  98                                 interrupts = <40 4 3>;
  99                                 pinctrl-names = "default";
 100                                 pinctrl-0 = <&pinctrl_can0_rx_tx>;
 101                                 status = "disabled";
 102                         };
 103
 104                         tcb0: timer@f0010000 {
 105                                 compatible = "atmel,at91sam9x5-tcb";
 106                                 reg = <0xf0010000 0x100>;
 107                                 interrupts = <26 4 0>;
 108                         };
 109
 110                         i2c0: i2c@f0014000 {
 111                                 compatible = "atmel,at91sam9x5-i2c";
 112                                 reg = <0xf0014000 0x4000>;
 113                                 interrupts = <18 4 6>;
 114                                 dmas = <&dma0 2 7>,
 115                                        <&dma0 2 8>;
 116                                 dma-names = "tx", "rx";
 117                                 pinctrl-names = "default";
 118                                 pinctrl-0 = <&pinctrl_i2c0>;
 119                                 #address-cells = <1>;
 120                                 #size-cells = <0>;
 121                                 status = "disabled";
 122                         };
 123
 124                         i2c1: i2c@f0018000 {
 125                                 compatible = "atmel,at91sam9x5-i2c";
 126                                 reg = <0xf0018000 0x4000>;
 127                                 interrupts = <19 4 6>;
 128                                 dmas = <&dma0 2 9>,
 129                                        <&dma0 2 10>;
 130                                 dma-names = "tx", "rx";
 131                                 pinctrl-names = "default";
 132                                 pinctrl-0 = <&pinctrl_i2c1>;
 133                                 #address-cells = <1>;
 134                                 #size-cells = <0>;
 135                                 status = "disabled";
 136                         };
 137
 138                         usart0: serial@f001c000 {
 139                                 compatible = "atmel,at91sam9260-usart";
 140                                 reg = <0xf001c000 0x100>;
 141                                 interrupts = <12 4 5>;
 142                                 pinctrl-names = "default";
 143                                 pinctrl-0 = <&pinctrl_usart0>;
 144                                 status = "disabled";
 145                         };
 146
 147                         usart1: serial@f0020000 {
 148                                 compatible = "atmel,at91sam9260-usart";
 149                                 reg = <0xf0020000 0x100>;
 150                                 interrupts = <13 4 5>;
 151                                 pinctrl-names = "default";
 152                                 pinctrl-0 = <&pinctrl_usart1>;
 153                                 status = "disabled";
 154                         };
 155
 156                         macb0: ethernet@f0028000 {
 157                                 compatible = "cnds,pc302-gem", "cdns,gem";
 158                                 reg = <0xf0028000 0x100>;
 159                                 interrupts = <34 4 3>;
 160                                 pinctrl-names = "default";
 161                                 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
 162                                 status = "disabled";
 163                         };
 164
 165                         isi: isi@f0034000 {
 166                                 compatible = "atmel,at91sam9g45-isi";
 167                                 reg = <0xf0034000 0x4000>;
 168                                 interrupts = <37 4 5>;
 169                                 status = "disabled";
 170                         };
 171
 172                         mmc1: mmc@f8000000 {
 173                                 compatible = "atmel,hsmci";
 174                                 reg = <0xf8000000 0x600>;
 175                                 interrupts = <22 4 0>;
 176                                 pinctrl-names = "default";
 177                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 178                                 status = "disabled";
 179                                 #address-cells = <1>;
 180                                 #size-cells = <0>;
 181                         };
 182
 183                         mmc2: mmc@f8004000 {
 184                                 compatible = "atmel,hsmci";
 185                                 reg = <0xf8004000 0x600>;
 186                                 interrupts = <23 4 0>;
 187                                 pinctrl-names = "default";
 188                                 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
 189                                 status = "disabled";
 190                                 #address-cells = <1>;
 191                                 #size-cells = <0>;
 192                         };
 193
 194                         spi1: spi@f8008000 {
 195                                 #address-cells = <1>;
 196                                 #size-cells = <0>;
 197                                 compatible = "atmel,at91sam9x5-spi";
 198                                 reg = <0xf8008000 0x100>;
 199                                 interrupts = <25 4 3>;
 200                                 cs-gpios = <&pioC 25 0
 201                                             &pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */
 202                                             &pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */
 203                                             &pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */
 204                                            >;
 205                                 pinctrl-names = "default";
 206                                 pinctrl-0 = <&pinctrl_spi1>;
 207                                 status = "disabled";
 208                         };
 209
 210                         ssc1: ssc@f800c000 {
 211                                 compatible = "atmel,at91sam9g45-ssc";
 212                                 reg = <0xf800c000 0x4000>;
 213                                 interrupts = <39 4 4>;
 214                                 pinctrl-names = "default";
 215                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 216                                 status = "disabled";
 217                         };
 218
 219                         can1: can@f8010000 {
 220                                 compatible = "atmel,at91sam9x5-can";
 221                                 reg = <0xf8010000 0x300>;
 222                                 interrupts = <41 4 3>;
 223                                 pinctrl-names = "default";
 224                                 pinctrl-0 = <&pinctrl_can1_rx_tx>;
 225                         };
 226
 227                         tcb1: timer@f8014000 {
 228                                 compatible = "atmel,at91sam9x5-tcb";
 229                                 reg = <0xf8014000 0x100>;
 230                                 interrupts = <27 4 0>;
 231                         };
 232
 233                         adc0: adc@f8018000 {
 234                                 compatible = "atmel,at91sam9260-adc";
 235                                 reg = <0xf8018000 0x100>;
 236                                 interrupts = <29 4 5>;
 237                                 pinctrl-names = "default";
 238                                 pinctrl-0 = <
 239                                         &pinctrl_adc0_adtrg
 240                                         &pinctrl_adc0_ad0
 241                                         &pinctrl_adc0_ad1
 242                                         &pinctrl_adc0_ad2
 243                                         &pinctrl_adc0_ad3
 244                                         &pinctrl_adc0_ad4
 245                                         &pinctrl_adc0_ad5
 246                                         &pinctrl_adc0_ad6
 247                                         &pinctrl_adc0_ad7
 248                                         &pinctrl_adc0_ad8
 249                                         &pinctrl_adc0_ad9
 250                                         &pinctrl_adc0_ad10
 251                                         &pinctrl_adc0_ad11
 252                                         >;
 253                                 atmel,adc-channel-base = <0x50>;
 254                                 atmel,adc-channels-used = <0xfff>;
 255                                 atmel,adc-drdy-mask = <0x1000000>;
 256                                 atmel,adc-num-channels = <12>;
 257                                 atmel,adc-startup-time = <40>;
 258                                 atmel,adc-status-register = <0x30>;
 259                                 atmel,adc-trigger-register = <0xc0>;
 260                                 atmel,adc-use-external;
 261                                 atmel,adc-vref = <3000>;
 262                                 atmel,adc-res = <10 12>;
 263                                 atmel,adc-res-names = "lowres", "highres";
 264                                 status = "disabled";
 265
 266                                 trigger@0 {
 267                                         trigger-name = "external-rising";
 268                                         trigger-value = <0x1>;
 269                                         trigger-external;
 270                                 };
 271                                 trigger@1 {
 272                                         trigger-name = "external-falling";
 273                                         trigger-value = <0x2>;
 274                                         trigger-external;
 275                                 };
 276                                 trigger@2 {
 277                                         trigger-name = "external-any";
 278                                         trigger-value = <0x3>;
 279                                         trigger-external;
 280                                 };
 281                                 trigger@3 {
 282                                         trigger-name = "continuous";
 283                                         trigger-value = <0x6>;
 284                                 };
 285                         };
 286
 287                         tsadcc: tsadcc@f8018000 {
 288                                 compatible = "atmel,at91sam9x5-tsadcc";
 289                                 reg = <0xf8018000 0x4000>;
 290                                 interrupts = <29 4 5>;
 291                                 atmel,tsadcc_clock = <300000>;
 292                                 atmel,filtering_average = <0x03>;
 293                                 atmel,pendet_debounce = <0x08>;
 294                                 atmel,pendet_sensitivity = <0x02>;
 295                                 atmel,ts_sample_hold_time = <0x0a>;
 296                                 status = "disabled";
 297                         };
 298
 299                         i2c2: i2c@f801c000 {
 300                                 compatible = "atmel,at91sam9x5-i2c";
 301                                 reg = <0xf801c000 0x4000>;
 302                                 interrupts = <20 4 6>;
 303                                 dmas = <&dma1 2 11>,
 304                                        <&dma1 2 12>;
 305                                 dma-names = "tx", "rx";
 306                                 #address-cells = <1>;
 307                                 #size-cells = <0>;
 308                                 status = "disabled";
 309                         };
 310
 311                         usart2: serial@f8020000 {
 312                                 compatible = "atmel,at91sam9260-usart";
 313                                 reg = <0xf8020000 0x100>;
 314                                 interrupts = <14 4 5>;
 315                                 pinctrl-names = "default";
 316                                 pinctrl-0 = <&pinctrl_usart2>;
 317                                 status = "disabled";
 318                         };
 319
 320                         usart3: serial@f8024000 {
 321                                 compatible = "atmel,at91sam9260-usart";
 322                                 reg = <0xf8024000 0x100>;
 323                                 interrupts = <15 4 5>;
 324                                 pinctrl-names = "default";
 325                                 pinctrl-0 = <&pinctrl_usart3>;
 326                                 status = "disabled";
 327                         };
 328
 329                         macb1: ethernet@f802c000 {
 330                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
 331                                 reg = <0xf802c000 0x100>;
 332                                 interrupts = <35 4 3>;
 333                                 pinctrl-names = "default";
 334                                 pinctrl-0 = <&pinctrl_macb1_rmii>;
 335                                 status = "disabled";
 336                         };
 337
 338                         sha@f8034000 {
 339                                 compatible = "atmel,sam9g46-sha";
 340                                 reg = <0xf8034000 0x100>;
 341                                 interrupts = <42 4 0>;
 342                         };
 343
 344                         aes@f8038000 {
 345                                 compatible = "atmel,sam9g46-aes";
 346                                 reg = <0xf8038000 0x100>;
 347                                 interrupts = <43 4 0>;
 348                         };
 349
 350                         tdes@f803c000 {
 351                                 compatible = "atmel,sam9g46-tdes";
 352                                 reg = <0xf803c000 0x100>;
 353                                 interrupts = <44 4 0>;
 354                         };
 355
 356                         dma0: dma-controller@ffffe600 {
 357                                 compatible = "atmel,at91sam9g45-dma";
 358                                 reg = <0xffffe600 0x200>;
 359                                 interrupts = <30 4 0>;
 360                                 #dma-cells = <2>;
 361                         };
 362
 363                         dma1: dma-controller@ffffe800 {
 364                                 compatible = "atmel,at91sam9g45-dma";
 365                                 reg = <0xffffe800 0x200>;
 366                                 interrupts = <31 4 0>;
 367                                 #dma-cells = <2>;
 368                         };
 369
 370                         ramc0: ramc@ffffea00 {
 371                                 compatible = "atmel,at91sam9g45-ddramc";
 372                                 reg = <0xffffea00 0x200>;
 373                         };
 374
 375                         dbgu: serial@ffffee00 {
 376                                 compatible = "atmel,at91sam9260-usart";
 377                                 reg = <0xffffee00 0x200>;
 378                                 interrupts = <2 4 7>;
 379                                 pinctrl-names = "default";
 380                                 pinctrl-0 = <&pinctrl_dbgu>;
 381                                 status = "disabled";
 382                         };
 383
 384                         aic: interrupt-controller@fffff000 {
 385                                 #interrupt-cells = <3>;
 386                                 compatible = "atmel,sama5d3-aic";
 387                                 interrupt-controller;
 388                                 reg = <0xfffff000 0x200>;
 389                                 atmel,external-irqs = <47>;
 390                         };
 391
 392                         pinctrl@fffff200 {
 393                                 #address-cells = <1>;
 394                                 #size-cells = <1>;
 395                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 396                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 397                                 atmel,mux-mask = <
 398                                         /*   A          B          C  */
 399                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
 400                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
 401                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
 402                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
 403                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
 404                                         >;
 405
 406                                 /* shared pinctrl settings */
 407                                 adc0 {
 408                                         pinctrl_adc0_adtrg: adc0_adtrg {
 409                                                 atmel,pins =
 410                                                         <3 19 0x1 0x0>; /* PD19 periph A ADTRG */
 411                                         };
 412                                         pinctrl_adc0_ad0: adc0_ad0 {
 413                                                 atmel,pins =
 414                                                         <3 20 0x1 0x0>; /* PD20 periph A AD0 */
 415                                         };
 416                                         pinctrl_adc0_ad1: adc0_ad1 {
 417                                                 atmel,pins =
 418                                                         <3 21 0x1 0x0>; /* PD21 periph A AD1 */
 419                                         };
 420                                         pinctrl_adc0_ad2: adc0_ad2 {
 421                                                 atmel,pins =
 422                                                         <3 22 0x1 0x0>; /* PD22 periph A AD2 */
 423                                         };
 424                                         pinctrl_adc0_ad3: adc0_ad3 {
 425                                                 atmel,pins =
 426                                                         <3 23 0x1 0x0>; /* PD23 periph A AD3 */
 427                                         };
 428                                         pinctrl_adc0_ad4: adc0_ad4 {
 429                                                 atmel,pins =
 430                                                         <3 24 0x1 0x0>; /* PD24 periph A AD4 */
 431                                         };
 432                                         pinctrl_adc0_ad5: adc0_ad5 {
 433                                                 atmel,pins =
 434                                                         <3 25 0x1 0x0>; /* PD25 periph A AD5 */
 435                                         };
 436                                         pinctrl_adc0_ad6: adc0_ad6 {
 437                                                 atmel,pins =
 438                                                         <3 26 0x1 0x0>; /* PD26 periph A AD6 */
 439                                         };
 440                                         pinctrl_adc0_ad7: adc0_ad7 {
 441                                                 atmel,pins =
 442                                                         <3 27 0x1 0x0>; /* PD27 periph A AD7 */
 443                                         };
 444                                         pinctrl_adc0_ad8: adc0_ad8 {
 445                                                 atmel,pins =
 446                                                         <3 28 0x1 0x0>; /* PD28 periph A AD8 */
 447                                         };
 448                                         pinctrl_adc0_ad9: adc0_ad9 {
 449                                                 atmel,pins =
 450                                                         <3 29 0x1 0x0>; /* PD29 periph A AD9 */
 451                                         };
 452                                         pinctrl_adc0_ad10: adc0_ad10 {
 453                                                 atmel,pins =
 454                                                         <3 30 0x1 0x0>; /* PD30 periph A AD10, conflicts with PCK0 */
 455                                         };
 456                                         pinctrl_adc0_ad11: adc0_ad11 {
 457                                                 atmel,pins =
 458                                                         <3 31 0x1 0x0>; /* PD31 periph A AD11, conflicts with PCK1 */
 459                                         };
 460                                 };
 461
 462                                 can0 {
 463                                         pinctrl_can0_rx_tx: can0_rx_tx {
 464                                                 atmel,pins =
 465                                                         <3 14 0x3 0x0   /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
 466                                                          3 15 0x3 0x0>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
 467                                         };
 468                                 };
 469
 470                                 can1 {
 471                                         pinctrl_can1_rx_tx: can1_rx_tx {
 472                                                 atmel,pins =
 473                                                         <1 14 0x2 0x0   /* PB14 periph B RX, conflicts with GCRS */
 474                                                          1 15 0x2 0x0>; /* PB15 periph B TX, conflicts with GCOL */
 475                                         };
 476                                 };
 477
 478                                 dbgu {
 479                                         pinctrl_dbgu: dbgu-0 {
 480                                                 atmel,pins =
 481                                                         <1 30 0x1 0x0   /* PB30 periph A */
 482                                                          1 31 0x1 0x1>; /* PB31 periph A with pullup */
 483                                         };
 484                                 };
 485
 486                                 i2c0 {
 487                                         pinctrl_i2c0: i2c0-0 {
 488                                                 atmel,pins =
 489                                                         <0 30 0x1 0x0   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
 490                                                          0 31 0x1 0x0>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
 491                                         };
 492                                 };
 493
 494                                 i2c1 {
 495                                         pinctrl_i2c1: i2c1-0 {
 496                                                 atmel,pins =
 497                                                         <2 26 0x2 0x0   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
 498                                                          2 27 0x2 0x0>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
 499                                         };
 500                                 };
 501
 502                                 isi {
 503                                         pinctrl_isi: isi-0 {
 504                                                 atmel,pins =
 505                                                         <0 16 0x3 0x0   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
 506                                                          0 17 0x3 0x0   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
 507                                                          0 18 0x3 0x0   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
 508                                                          0 19 0x3 0x0   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
 509                                                          0 20 0x3 0x0   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
 510                                                          0 21 0x3 0x0   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
 511                                                          0 22 0x3 0x0   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
 512                                                          0 23 0x3 0x0   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
 513                                                          2 30 0x3 0x0   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
 514                                                          0 31 0x3 0x0   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
 515                                                          0 30 0x3 0x0   /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
 516                                                          2 29 0x3 0x0   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
 517                                                          2 28 0x3 0x0>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
 518                                         };
 519                                         pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
 520                                                 atmel,pins =
 521                                                         <3 31 0x2 0x0>; /* PD31 periph B ISI_MCK */
 522                                         };
 523                                 };
 524
 525                                 lcd {
 526                                         pinctrl_lcd: lcd-0 {
 527                                                 atmel,pins =
 528                                                         <0 24 0x1 0x0   /* PA24 periph A LCDPWM */
 529                                                          0 26 0x1 0x0   /* PA26 periph A LCDVSYNC */
 530                                                          0 27 0x1 0x0   /* PA27 periph A LCDHSYNC */
 531                                                          0 25 0x1 0x0   /* PA25 periph A LCDDISP */
 532                                                          0 29 0x1 0x0   /* PA29 periph A LCDDEN */
 533                                                          0 28 0x1 0x0   /* PA28 periph A LCDPCK */
 534                                                          0 0 0x1 0x0    /* PA0 periph A LCDD0 pin */
 535                                                          0 1 0x1 0x0    /* PA1 periph A LCDD1 pin */
 536                                                          0 2 0x1 0x0    /* PA2 periph A LCDD2 pin */
 537                                                          0 3 0x1 0x0    /* PA3 periph A LCDD3 pin */
 538                                                          0 4 0x1 0x0    /* PA4 periph A LCDD4 pin */
 539                                                          0 5 0x1 0x0    /* PA5 periph A LCDD5 pin */
 540                                                          0 6 0x1 0x0    /* PA6 periph A LCDD6 pin */
 541                                                          0 7 0x1 0x0    /* PA7 periph A LCDD7 pin */
 542                                                          0 8 0x1 0x0    /* PA8 periph A LCDD8 pin */
 543                                                          0 9 0x1 0x0    /* PA9 periph A LCDD9 pin */
 544                                                          0 10 0x1 0x0   /* PA10 periph A LCDD10 pin */
 545                                                          0 11 0x1 0x0   /* PA11 periph A LCDD11 pin */
 546                                                          0 12 0x1 0x0   /* PA12 periph A LCDD12 pin */
 547                                                          0 13 0x1 0x0   /* PA13 periph A LCDD13 pin */
 548                                                          0 14 0x1 0x0   /* PA14 periph A LCDD14 pin */
 549                                                          0 15 0x1 0x0   /* PA15 periph A LCDD15 pin */
 550                                                          2 14 0x3 0x0   /* PC14 periph C LCDD16 pin */
 551                                                          2 13 0x3 0x0   /* PC13 periph C LCDD17 pin */
 552                                                          2 12 0x3 0x0   /* PC12 periph C LCDD18 pin */
 553                                                          2 11 0x3 0x0   /* PC11 periph C LCDD19 pin */
 554                                                          2 10 0x3 0x0   /* PC10 periph C LCDD20 pin */
 555                                                          2 15 0x3 0x0   /* PC15 periph C LCDD21 pin */
 556                                                          4 27 0x3 0x0   /* PE27 periph C LCDD22 pin */
 557                                                          4 28 0x3 0x0>; /* PE28 periph C LCDD23 pin */
 558                                         };
 559                                 };
 560
 561                                 macb0 {
 562                                         pinctrl_macb0_data_rgmii: macb0_data_rgmii {
 563                                                 atmel,pins =
 564                                                         <1 0 0x1 0x0    /* PB0 periph A GTX0, conflicts with PWMH0 */
 565                                                          1 1 0x1 0x0    /* PB1 periph A GTX1, conflicts with PWML0 */
 566                                                          1 2 0x1 0x0    /* PB2 periph A GTX2, conflicts with TK1 */
 567                                                          1 3 0x1 0x0    /* PB3 periph A GTX3, conflicts with TF1 */
 568                                                          1 4 0x1 0x0    /* PB4 periph A GRX0, conflicts with PWMH1 */
 569                                                          1 5 0x1 0x0    /* PB5 periph A GRX1, conflicts with PWML1 */
 570                                                          1 6 0x1 0x0    /* PB6 periph A GRX2, conflicts with TD1 */
 571                                                          1 7 0x1 0x0>;  /* PB7 periph A GRX3, conflicts with RK1 */
 572                                         };
 573                                         pinctrl_macb0_data_gmii: macb0_data_gmii {
 574                                                 atmel,pins =
 575                                                         <1 19 0x2 0x0   /* PB19 periph B GTX4, conflicts with MCI1_CDA */
 576                                                          1 20 0x2 0x0   /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
 577                                                          1 21 0x2 0x0   /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
 578                                                          1 22 0x2 0x0   /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
 579                                                          1 23 0x2 0x0   /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
 580                                                          1 24 0x2 0x0   /* PB24 periph B GRX5, conflicts with MCI1_CK */
 581                                                          1 25 0x2 0x0   /* PB25 periph B GRX6, conflicts with SCK1 */
 582                                                          1 26 0x2 0x0>; /* PB26 periph B GRX7, conflicts with CTS1 */
 583                                         };
 584                                         pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
 585                                                 atmel,pins =
 586                                                         <1 8 0x1 0x0    /* PB8 periph A GTXCK, conflicts with PWMH2 */
 587                                                          1 9 0x1 0x0    /* PB9 periph A GTXEN, conflicts with PWML2 */
 588                                                          1 11 0x1 0x0   /* PB11 periph A GRXCK, conflicts with RD1 */
 589                                                          1 13 0x1 0x0   /* PB13 periph A GRXER, conflicts with PWML3 */
 590                                                          1 16 0x1 0x0   /* PB16 periph A GMDC */
 591                                                          1 17 0x1 0x0   /* PB17 periph A GMDIO */
 592                                                          1 18 0x1 0x0>; /* PB18 periph A G125CK */
 593                                         };
 594                                         pinctrl_macb0_signal_gmii: macb0_signal_gmii {
 595                                                 atmel,pins =
 596                                                         <1 9 0x1 0x0    /* PB9 periph A GTXEN, conflicts with PWML2 */
 597                                                          1 10 0x1 0x0   /* PB10 periph A GTXER, conflicts with RF1 */
 598                                                          1 11 0x1 0x0   /* PB11 periph A GRXCK, conflicts with RD1 */
 599                                                          1 12 0x1 0x0   /* PB12 periph A GRXDV, conflicts with PWMH3 */
 600                                                          1 13 0x1 0x0   /* PB13 periph A GRXER, conflicts with PWML3 */
 601                                                          1 14 0x1 0x0   /* PB14 periph A GCRS, conflicts with CANRX1 */
 602                                                          1 15 0x1 0x0   /* PB15 periph A GCOL, conflicts with CANTX1 */
 603                                                          1 16 0x1 0x0   /* PB16 periph A GMDC */
 604                                                          1 17 0x1 0x0   /* PB17 periph A GMDIO */
 605                                                          1 27 0x2 0x0>; /* PB27 periph B G125CKO */
 606                                         };
 607
 608                                 };
 609
 610                                 macb1 {
 611                                         pinctrl_macb1_rmii: macb1_rmii-0 {
 612                                                 atmel,pins =
 613                                                         <2 0 0x1 0x0    /* PC0 periph A ETX0, conflicts with TIOA3 */
 614                                                          2 1 0x1 0x0    /* PC1 periph A ETX1, conflicts with TIOB3 */
 615                                                          2 2 0x1 0x0    /* PC2 periph A ERX0, conflicts with TCLK3 */
 616                                                          2 3 0x1 0x0    /* PC3 periph A ERX1, conflicts with TIOA4 */
 617                                                          2 4 0x1 0x0    /* PC4 periph A ETXEN, conflicts with TIOB4 */
 618                                                          2 5 0x1 0x0    /* PC5 periph A ECRSDV,conflicts with TCLK4 */
 619                                                          2 6 0x1 0x0    /* PC6 periph A ERXER, conflicts with TIOA5 */
 620                                                          2 7 0x1 0x0    /* PC7 periph A EREFCK, conflicts with TIOB5 */
 621                                                          2 8 0x1 0x0    /* PC8 periph A EMDC, conflicts with TCLK5 */
 622                                                          2 9 0x1 0x0>;  /* PC9 periph A EMDIO  */
 623                                         };
 624                                 };
 625
 626                                 mmc0 {
 627                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 628                                                 atmel,pins =
 629                                                         <3 9 0x1 0x0    /* PD9 periph A MCI0_CK */
 630                                                          3 0 0x1 0x1    /* PD0 periph A MCI0_CDA with pullup */
 631                                                          3 1 0x1 0x1>;  /* PD1 periph A MCI0_DA0 with pullup */
 632                                         };
 633                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 634                                                 atmel,pins =
 635                                                         <3 2 0x1 0x1    /* PD2 periph A MCI0_DA1 with pullup */
 636                                                          3 3 0x1 0x1    /* PD3 periph A MCI0_DA2 with pullup */
 637                                                          3 4 0x1 0x1>;  /* PD4 periph A MCI0_DA3 with pullup */
 638                                         };
 639                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
 640                                                 atmel,pins =
 641                                                         <3 5 0x1 0x1    /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
 642                                                          3 6 0x1 0x1    /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
 643                                                          3 7 0x1 0x1    /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
 644                                                          3 8 0x1 0x1>;  /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
 645                                         };
 646                                 };
 647
 648                                 mmc1 {
 649                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
 650                                                 atmel,pins =
 651                                                         <1 24 0x1 0x0   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
 652                                                          1 19 0x1 0x1   /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
 653                                                          1 20 0x1 0x1>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
 654                                         };
 655                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
 656                                                 atmel,pins =
 657                                                         <1 21 0x1 0x1   /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
 658                                                          1 22 0x1 0x1   /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
 659                                                          1 23 0x1 0x1>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
 660                                         };
 661                                 };
 662
 663                                 mmc2 {
 664                                         pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
 665                                                 atmel,pins =
 666                                                         <2 15 0x1 0x0   /* PC15 periph A MCI2_CK, conflicts with PCK2 */
 667                                                          2 10 0x1 0x1   /* PC10 periph A MCI2_CDA with pullup */
 668                                                          2 11 0x1 0x1>; /* PC11 periph A MCI2_DA0 with pullup */
 669                                         };
 670                                         pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
 671                                                 atmel,pins =
 672                                                         <2 12 0x1 0x0   /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
 673                                                          2 13 0x1 0x0   /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
 674                                                          2 14 0x1 0x0>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
 675                                         };
 676                                 };
 677
 678                                 nand0 {
 679                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
 680                                                 atmel,pins =
 681                                                         <4 21 0x1 0x1   /* PE21 periph A with pullup */
 682                                                          4 22 0x1 0x1>; /* PE22 periph A with pullup */
 683                                         };
 684                                 };
 685
 686                                 pioA: gpio@fffff200 {
 687                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 688                                         reg = <0xfffff200 0x100>;
 689                                         interrupts = <6 4 1>;
 690                                         #gpio-cells = <2>;
 691                                         gpio-controller;
 692                                         interrupt-controller;
 693                                         #interrupt-cells = <2>;
 694                                 };
 695
 696                                 pioB: gpio@fffff400 {
 697                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 698                                         reg = <0xfffff400 0x100>;
 699                                         interrupts = <7 4 1>;
 700                                         #gpio-cells = <2>;
 701                                         gpio-controller;
 702                                         interrupt-controller;
 703                                         #interrupt-cells = <2>;
 704                                 };
 705
 706                                 pioC: gpio@fffff600 {
 707                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 708                                         reg = <0xfffff600 0x100>;
 709                                         interrupts = <8 4 1>;
 710                                         #gpio-cells = <2>;
 711                                         gpio-controller;
 712                                         interrupt-controller;
 713                                         #interrupt-cells = <2>;
 714                                 };
 715
 716                                 pioD: gpio@fffff800 {
 717                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 718                                         reg = <0xfffff800 0x100>;
 719                                         interrupts = <9 4 1>;
 720                                         #gpio-cells = <2>;
 721                                         gpio-controller;
 722                                         interrupt-controller;
 723                                         #interrupt-cells = <2>;
 724                                 };
 725
 726                                 pioE: gpio@fffffa00 {
 727                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 728                                         reg = <0xfffffa00 0x100>;
 729                                         interrupts = <10 4 1>;
 730                                         #gpio-cells = <2>;
 731                                         gpio-controller;
 732                                         interrupt-controller;
 733                                         #interrupt-cells = <2>;
 734                                 };
 735
 736                                 spi0 {
 737                                         pinctrl_spi0: spi0-0 {
 738                                                 atmel,pins =
 739                                                         <3 10 0x1 0x0   /* PD10 periph A SPI0_MISO pin */
 740                                                          3 11 0x1 0x0   /* PD11 periph A SPI0_MOSI pin */
 741                                                          3 12 0x1 0x0   /* PD12 periph A SPI0_SPCK pin */
 742                                                          3 13 0x0 0x0>; /* PD13 GPIO SPI0_NPCS0 pin */
 743                                         };
 744                                 };
 745
 746                                 spi1 {
 747                                         pinctrl_spi1: spi1-0 {
 748                                                 atmel,pins =
 749                                                         <2 22 0x1 0x0   /* PC22 periph A SPI1_MISO pin */
 750                                                          2 23 0x1 0x0   /* PC23 periph A SPI1_MOSI pin */
 751                                                          2 24 0x1 0x0   /* PC24 periph A SPI1_SPCK pin */
 752                                                          2 25 0x0 0x0>; /* PC25 GPIO SPI1_NPCS0 pin */
 753                                         };
 754                                 };
 755
 756                                 ssc0 {
 757                                         pinctrl_ssc0_tx: ssc0_tx {
 758                                                 atmel,pins =
 759                                                         <2 16 0x1 0x0   /* PC16 periph A TK0 */
 760                                                          2 17 0x1 0x0   /* PC17 periph A TF0 */
 761                                                          2 18 0x1 0x0>; /* PC18 periph A TD0 */
 762                                         };
 763
 764                                         pinctrl_ssc0_rx: ssc0_rx {
 765                                                 atmel,pins =
 766                                                         <2 19 0x1 0x0   /* PC19 periph A RK0 */
 767                                                          2 20 0x1 0x0   /* PC20 periph A RF0 */
 768                                                          2 21 0x1 0x0>; /* PC21 periph A RD0 */
 769                                         };
 770                                 };
 771
 772                                 ssc1 {
 773                                         pinctrl_ssc1_tx: ssc1_tx {
 774                                                 atmel,pins =
 775                                                         <1 2 0x2 0x0    /* PB2 periph B TK1, conflicts with GTX2 */
 776                                                          1 3 0x2 0x0    /* PB3 periph B TF1, conflicts with GTX3 */
 777                                                          1 6 0x2 0x0>;  /* PB6 periph B TD1, conflicts with TD1 */
 778                                         };
 779
 780                                         pinctrl_ssc1_rx: ssc1_rx {
 781                                                 atmel,pins =
 782                                                         <1 7 0x2 0x0    /* PB7 periph B RK1, conflicts with EREFCK */
 783                                                          1 10 0x2 0x0   /* PB10 periph B RF1, conflicts with GTXER */
 784                                                          1 11 0x2 0x0>; /* PB11 periph B RD1, conflicts with GRXCK */
 785                                         };
 786                                 };
 787
 788                                 uart0 {
 789                                         pinctrl_uart0: uart0-0 {
 790                                                 atmel,pins =
 791                                                         <2 29 0x1 0x0   /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
 792                                                          2 30 0x1 0x1>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
 793                                         };
 794                                 };
 795
 796                                 uart1 {
 797                                         pinctrl_uart1: uart1-0 {
 798                                                 atmel,pins =
 799                                                         <0 30 0x2 0x0   /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
 800                                                          0 31 0x2 0x1>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
 801                                         };
 802                                 };
 803
 804                                 usart0 {
 805                                         pinctrl_usart0: usart0-0 {
 806                                                 atmel,pins =
 807                                                         <3 17 0x1 0x0   /* PD17 periph A */
 808                                                          3 18 0x1 0x1>; /* PD18 periph A with pullup */
 809                                         };
 810
 811                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
 812                                                 atmel,pins =
 813                                                         <3 15 0x1 0x0   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
 814                                                          3 16 0x1 0x0>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
 815                                         };
 816                                 };
 817
 818                                 usart1 {
 819                                         pinctrl_usart1: usart1-0 {
 820                                                 atmel,pins =
 821                                                         <1 28 0x1 0x0   /* PB28 periph A */
 822                                                          1 29 0x1 0x1>; /* PB29 periph A with pullup */
 823                                         };
 824
 825                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
 826                                                 atmel,pins =
 827                                                         <1 26 0x1 0x0   /* PB26 periph A, conflicts with GRX7 */
 828                                                          1 27 0x1 0x0>; /* PB27 periph A, conflicts with G125CKO */
 829                                         };
 830                                 };
 831
 832                                 usart2 {
 833                                         pinctrl_usart2: usart2-0 {
 834                                                 atmel,pins =
 835                                                         <4 25 0x2 0x0   /* PE25 periph B, conflicts with A25 */
 836                                                          4 26 0x2 0x1>; /* PE26 periph B with pullup, conflicts NCS0 */
 837                                         };
 838
 839                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
 840                                                 atmel,pins =
 841                                                         <4 23 0x2 0x0   /* PE23 periph B, conflicts with A23 */
 842                                                          4 24 0x2 0x0>; /* PE24 periph B, conflicts with A24 */
 843                                         };
 844                                 };
 845
 846                                 usart3 {
 847                                         pinctrl_usart3: usart3-0 {
 848                                                 atmel,pins =
 849                                                         <4 18 0x2 0x0   /* PE18 periph B, conflicts with A18 */
 850                                                          4 19 0x2 0x1>; /* PE19 periph B with pullup, conflicts with A19 */
 851                                         };
 852
 853                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
 854                                                 atmel,pins =
 855                                                         <4 16 0x2 0x0   /* PE16 periph B, conflicts with A16 */
 856                                                          4 17 0x2 0x0>; /* PE17 periph B, conflicts with A17 */
 857                                         };
 858                                 };
 859                         };
 860
 861                         pmc: pmc@fffffc00 {
 862                                 compatible = "atmel,at91rm9200-pmc";
 863                                 reg = <0xfffffc00 0x120>;
 864                         };
 865
 866                         rstc@fffffe00 {
 867                                 compatible = "atmel,at91sam9g45-rstc";
 868                                 reg = <0xfffffe00 0x10>;
 869                         };
 870
 871                         pit: timer@fffffe30 {
 872                                 compatible = "atmel,at91sam9260-pit";
 873                                 reg = <0xfffffe30 0xf>;
 874                                 interrupts = <3 4 5>;
 875                         };
 876
 877                         watchdog@fffffe40 {
 878                                 compatible = "atmel,at91sam9260-wdt";
 879                                 reg = <0xfffffe40 0x10>;
 880                                 status = "disabled";
 881                         };
 882
 883                         rtc@fffffeb0 {
 884                                 compatible = "atmel,at91rm9200-rtc";
 885                                 reg = <0xfffffeb0 0x30>;
 886                                 interrupts = <1 4 7>;
 887                         };
 888                 };
 889
 890                 usb0: gadget@00500000 {
 891                         #address-cells = <1>;
 892                         #size-cells = <0>;
 893                         compatible = "atmel,at91sam9rl-udc";
 894                         reg = <0x00500000 0x100000
 895                                0xf8030000 0x4000>;
 896                         interrupts = <33 4 2>;
 897                         status = "disabled";
 898
 899                         ep0 {
 900                                 reg = <0>;
 901                                 atmel,fifo-size = <64>;
 902                                 atmel,nb-banks = <1>;
 903                         };
 904
 905                         ep1 {
 906                                 reg = <1>;
 907                                 atmel,fifo-size = <1024>;
 908                                 atmel,nb-banks = <3>;
 909                                 atmel,can-dma;
 910                                 atmel,can-isoc;
 911                         };
 912
 913                         ep2 {
 914                                 reg = <2>;
 915                                 atmel,fifo-size = <1024>;
 916                                 atmel,nb-banks = <3>;
 917                                 atmel,can-dma;
 918                                 atmel,can-isoc;
 919                         };
 920
 921                         ep3 {
 922                                 reg = <3>;
 923                                 atmel,fifo-size = <1024>;
 924                                 atmel,nb-banks = <2>;
 925                                 atmel,can-dma;
 926                         };
 927
 928                         ep4 {
 929                                 reg = <4>;
 930                                 atmel,fifo-size = <1024>;
 931                                 atmel,nb-banks = <2>;
 932                                 atmel,can-dma;
 933                         };
 934
 935                         ep5 {
 936                                 reg = <5>;
 937                                 atmel,fifo-size = <1024>;
 938                                 atmel,nb-banks = <2>;
 939                                 atmel,can-dma;
 940                         };
 941
 942                         ep6 {
 943                                 reg = <6>;
 944                                 atmel,fifo-size = <1024>;
 945                                 atmel,nb-banks = <2>;
 946                                 atmel,can-dma;
 947                         };
 948
 949                         ep7 {
 950                                 reg = <7>;
 951                                 atmel,fifo-size = <1024>;
 952                                 atmel,nb-banks = <2>;
 953                                 atmel,can-dma;
 954                         };
 955
 956                         ep8 {
 957                                 reg = <8>;
 958                                 atmel,fifo-size = <1024>;
 959                                 atmel,nb-banks = <2>;
 960                         };
 961
 962                         ep9 {
 963                                 reg = <9>;
 964                                 atmel,fifo-size = <1024>;
 965                                 atmel,nb-banks = <2>;
 966                         };
 967
 968                         ep10 {
 969                                 reg = <10>;
 970                                 atmel,fifo-size = <1024>;
 971                                 atmel,nb-banks = <2>;
 972                         };
 973
 974                         ep11 {
 975                                 reg = <11>;
 976                                 atmel,fifo-size = <1024>;
 977                                 atmel,nb-banks = <2>;
 978                         };
 979
 980                         ep12 {
 981                                 reg = <12>;
 982                                 atmel,fifo-size = <1024>;
 983                                 atmel,nb-banks = <2>;
 984                         };
 985
 986                         ep13 {
 987                                 reg = <13>;
 988                                 atmel,fifo-size = <1024>;
 989                                 atmel,nb-banks = <2>;
 990                         };
 991
 992                         ep14 {
 993                                 reg = <14>;
 994                                 atmel,fifo-size = <1024>;
 995                                 atmel,nb-banks = <2>;
 996                         };
 997
 998                         ep15 {
 999                                 reg = <15>;
1000                                 atmel,fifo-size = <1024>;
1001                                 atmel,nb-banks = <2>;
1002                         };
1003                 };
1004
1005                 usb1: ohci@00600000 {
1006                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1007                         reg = <0x00600000 0x100000>;
1008                         interrupts = <32 4 2>;
1009                         status = "disabled";
1010                 };
1011
1012                 usb2: ehci@00700000 {
1013                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1014                         reg = <0x00700000 0x100000>;
1015                         interrupts = <32 4 2>;
1016                         status = "disabled";
1017                 };
1018
1019                 nand0: nand@60000000 {
1020                         compatible = "atmel,at91rm9200-nand";
1021                         #address-cells = <1>;
1022                         #size-cells = <1>;
1023                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
1024                                 0xffffc070 0x00000490   /* SMC PMECC regs */
1025                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
1026                                 0x00100000 0x00100000   /* ROM code */
1027                                 0x70000000 0x10000000   /* NFC Command Registers */
1028                                 0xffffc000 0x00000070   /* NFC HSMC regs */
1029                                 0x00200000 0x00100000   /* NFC SRAM banks */
1030                                 >;
1031                         interrupts = <5 4 6>;
1032                         atmel,nand-addr-offset = <21>;
1033                         atmel,nand-cmd-offset = <22>;
1034                         pinctrl-names = "default";
1035                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1036                         atmel,pmecc-lookup-table-offset = <0x10000 0x18000>;
1037                         status = "disabled";
1038                 };
1039         };
1040 };