2 * DTS file for SPEAr320 SoC
4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
14 /include/ "spear3xx.dtsi"
20 compatible = "simple-bus";
21 ranges = <0x40000000 0x40000000 0x80000000
22 0xd0000000 0xd0000000 0x30000000>;
24 pinmux: pinmux@b3000000 {
25 compatible = "st,spear320-pinmux";
26 reg = <0xb3000000 0x1000>;
27 #gpio-range-cells = <3>;
31 compatible = "arm,pl110", "arm,primecell";
32 reg = <0x90000000 0x1000>;
34 interrupt-parent = <&shirq>;
38 fsmc: flash@4c000000 {
39 compatible = "st,spear600-fsmc-nand";
42 reg = <0x4c000000 0x1000 /* FSMC Register */
43 0x50000000 0x0010 /* NAND Base DATA */
44 0x50020000 0x0010 /* NAND Base ADDR */
45 0x50010000 0x0010>; /* NAND Base CMD */
46 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
51 compatible = "st,sdhci-spear";
52 reg = <0x70000000 0x100>;
54 interrupt-parent = <&shirq>;
58 shirq: interrupt-controller@0xb3000000 {
59 compatible = "st,spear320-shirq";
60 reg = <0xb3000000 0x1000>;
61 interrupts = <30 28 29 1>;
62 #interrupt-cells = <1>;
67 compatible = "arm,pl022", "arm,primecell";
68 reg = <0xa5000000 0x1000>;
70 interrupt-parent = <&shirq>;
77 compatible = "arm,pl022", "arm,primecell";
78 reg = <0xa6000000 0x1000>;
80 interrupt-parent = <&shirq>;
87 compatible ="st,spear-pwm";
88 reg = <0xa8000000 0x1000>;
96 compatible = "simple-bus";
97 ranges = <0xa0000000 0xa0000000 0x20000000
98 0xd0000000 0xd0000000 0x30000000>;
101 #address-cells = <1>;
103 compatible = "snps,designware-i2c";
104 reg = <0xa7000000 0x1000>;
106 interrupt-parent = <&shirq>;
111 compatible = "arm,pl011", "arm,primecell";
112 reg = <0xa3000000 0x1000>;
114 interrupt-parent = <&shirq>;
119 compatible = "arm,pl011", "arm,primecell";
120 reg = <0xa4000000 0x1000>;
122 interrupt-parent = <&shirq>;
126 gpiopinctrl: gpio@b3000000 {
127 compatible = "st,spear-plgpio";
128 reg = <0xb3000000 0x1000>;
129 #interrupt-cells = <1>;
130 interrupt-controller;
133 gpio-ranges = <&pinmux 0 0 102>;
136 st-plgpio,ngpio = <102>;
137 st-plgpio,enb-reg = <0x24>;
138 st-plgpio,wdata-reg = <0x34>;
139 st-plgpio,dir-reg = <0x44>;
140 st-plgpio,ie-reg = <0x64>;
141 st-plgpio,rdata-reg = <0x54>;
142 st-plgpio,mis-reg = <0x84>;
143 st-plgpio,eit-reg = <0x94>;