2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
24 cache-size = <131072>;
26 cache-line-size = <32>;
27 /* At full speed latency must be >=2 */
28 arm,tag-latency = <8>;
29 arm,data-latency = <8 8>;
30 arm,dirty-latency = <8>;
34 /* Nomadik system timer */
35 compatible = "st,nomadik-mtu";
36 reg = <0x101e2000 0x1000>;
37 interrupt-parent = <&vica>;
39 clocks = <&timclk>, <&pclk>;
40 clock-names = "timclk", "apb_pclk";
45 reg = <0x101e3000 0x1000>;
46 interrupt-parent = <&vica>;
48 clocks = <&timclk>, <&pclk>;
49 clock-names = "timclk", "apb_pclk";
52 gpio0: gpio@101e4000 {
53 compatible = "st,nomadik-gpio";
54 reg = <0x101e4000 0x80>;
55 interrupt-parent = <&vica>;
58 #interrupt-cells = <2>;
62 gpio-ranges = <&pinctrl 0 0 32>;
66 gpio1: gpio@101e5000 {
67 compatible = "st,nomadik-gpio";
68 reg = <0x101e5000 0x80>;
69 interrupt-parent = <&vica>;
72 #interrupt-cells = <2>;
76 gpio-ranges = <&pinctrl 0 32 32>;
80 gpio2: gpio@101e6000 {
81 compatible = "st,nomadik-gpio";
82 reg = <0x101e6000 0x80>;
83 interrupt-parent = <&vica>;
86 #interrupt-cells = <2>;
90 gpio-ranges = <&pinctrl 0 64 32>;
94 gpio3: gpio@101e7000 {
95 compatible = "st,nomadik-gpio";
96 reg = <0x101e7000 0x80>;
98 interrupt-parent = <&vica>;
100 interrupt-controller;
101 #interrupt-cells = <2>;
105 gpio-ranges = <&pinctrl 0 96 28>;
110 compatible = "stericsson,stn8815-pinctrl";
111 nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
112 /* Pin configurations */
114 uart1_default_mux: uart1_mux {
122 mmcsd_default_mux: mmcsd_mux {
125 groups = "mmcsd_a_1", "mmcsd_b_1";
128 mmcsd_default_mode: mmcsd_default {
131 * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2
132 * MCCMD, MCDAT3-0, MCMSFBCLK
134 pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11",
135 "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12",
136 "GPIO16_C13", "GPIO23_D15", "GPIO24_C15";
142 i2c0_default_mux: i2c0_mux {
148 i2c0_default_mode: i2c0_default {
150 pins = "GPIO62_D3", "GPIO63_D2";
156 i2c1_default_mux: i2c1_mux {
162 i2c1_default_mode: i2c1_default {
164 pins = "GPIO53_L4", "GPIO54_L3";
172 compatible = "stericsson,nomadik-src";
173 reg = <0x101e0000 0x1000>;
176 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
177 * that is parent of TIMCLK, PLL1 and PLL2
181 compatible = "fixed-clock";
182 clock-frequency = <19200000>;
186 * The 2.4 MHz TIMCLK reference clock is active at
187 * boot time, this is actually the MXTALCLK @19.2 MHz
188 * divided by 8. This clock is used by the timers and
189 * watchdog. See page 105 ff.
191 timclk: timclk@2.4M {
193 compatible = "fixed-factor-clock";
199 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
202 compatible = "st,nomadik-pll-clock";
207 /* HCLK divides the PLL1 with 1,2,3 or 4 */
210 compatible = "st,nomadik-hclk-clock";
213 /* The PCLK domain uses HCLK right off */
216 compatible = "fixed-factor-clock";
222 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
225 compatible = "st,nomadik-pll-clock";
229 clk216: clk216@216M {
231 compatible = "fixed-factor-clock";
236 clk108: clk108@108M {
238 compatible = "fixed-factor-clock";
245 compatible = "fixed-factor-clock";
246 /* The data sheet does not say how this is derived */
253 compatible = "fixed-factor-clock";
254 /* The data sheet does not say how this is derived */
261 compatible = "fixed-factor-clock";
267 /* This apparently exists as well */
268 ulpiclk: ulpiclk@60M {
270 compatible = "fixed-clock";
271 clock-frequency = <60000000>;
275 * IP AMBA bus clocks, driving the bus side of the
276 * peripheral clocking, clock gates.
279 hclkdma0: hclkdma0@48M {
281 compatible = "st,nomadik-src-clock";
285 hclksmc: hclksmc@48M {
287 compatible = "st,nomadik-src-clock";
291 hclksdram: hclksdram@48M {
293 compatible = "st,nomadik-src-clock";
297 hclkdma1: hclkdma1@48M {
299 compatible = "st,nomadik-src-clock";
303 hclkclcd: hclkclcd@48M {
305 compatible = "st,nomadik-src-clock";
309 pclkirda: pclkirda@48M {
311 compatible = "st,nomadik-src-clock";
315 pclkssp: pclkssp@48M {
317 compatible = "st,nomadik-src-clock";
321 pclkuart0: pclkuart0@48M {
323 compatible = "st,nomadik-src-clock";
327 pclksdi: pclksdi@48M {
329 compatible = "st,nomadik-src-clock";
333 pclki2c0: pclki2c0@48M {
335 compatible = "st,nomadik-src-clock";
339 pclki2c1: pclki2c1@48M {
341 compatible = "st,nomadik-src-clock";
345 pclkuart1: pclkuart1@48M {
347 compatible = "st,nomadik-src-clock";
351 pclkmsp0: pclkmsp0@48M {
353 compatible = "st,nomadik-src-clock";
357 hclkusb: hclkusb@48M {
359 compatible = "st,nomadik-src-clock";
363 hclkdif: hclkdif@48M {
365 compatible = "st,nomadik-src-clock";
369 hclksaa: hclksaa@48M {
371 compatible = "st,nomadik-src-clock";
375 hclksva: hclksva@48M {
377 compatible = "st,nomadik-src-clock";
381 pclkhsi: pclkhsi@48M {
383 compatible = "st,nomadik-src-clock";
387 pclkxti: pclkxti@48M {
389 compatible = "st,nomadik-src-clock";
393 pclkuart2: pclkuart2@48M {
395 compatible = "st,nomadik-src-clock";
399 pclkmsp1: pclkmsp1@48M {
401 compatible = "st,nomadik-src-clock";
405 pclkmsp2: pclkmsp2@48M {
407 compatible = "st,nomadik-src-clock";
411 pclkowm: pclkowm@48M {
413 compatible = "st,nomadik-src-clock";
417 hclkhpi: hclkhpi@48M {
419 compatible = "st,nomadik-src-clock";
423 pclkske: pclkske@48M {
425 compatible = "st,nomadik-src-clock";
429 pclkhsem: pclkhsem@48M {
431 compatible = "st,nomadik-src-clock";
437 compatible = "st,nomadik-src-clock";
441 hclkhash: hclkhash@48M {
443 compatible = "st,nomadik-src-clock";
447 hclkcryp: hclkcryp@48M {
449 compatible = "st,nomadik-src-clock";
453 pclkmshc: pclkmshc@48M {
455 compatible = "st,nomadik-src-clock";
459 hclkusbm: hclkusbm@48M {
461 compatible = "st,nomadik-src-clock";
465 hclkrng: hclkrng@48M {
467 compatible = "st,nomadik-src-clock";
472 /* IP kernel clocks */
475 compatible = "st,nomadik-src-clock";
477 clocks = <&clk72 &clk48>;
479 irdaclk: irdaclk@48M {
481 compatible = "st,nomadik-src-clock";
485 sspiclk: sspiclk@48M {
487 compatible = "st,nomadik-src-clock";
491 uart0clk: uart0clk@48M {
493 compatible = "st,nomadik-src-clock";
498 /* Also called MCCLK in some documents */
500 compatible = "st,nomadik-src-clock";
504 i2c0clk: i2c0clk@48M {
506 compatible = "st,nomadik-src-clock";
510 i2c1clk: i2c1clk@48M {
512 compatible = "st,nomadik-src-clock";
516 uart1clk: uart1clk@48M {
518 compatible = "st,nomadik-src-clock";
522 mspclk0: mspclk0@48M {
524 compatible = "st,nomadik-src-clock";
530 compatible = "st,nomadik-src-clock";
532 clocks = <&clk48>; /* 48 MHz not ULPI */
536 compatible = "st,nomadik-src-clock";
540 ipi2cclk: ipi2cclk@48M {
542 compatible = "st,nomadik-src-clock";
544 clocks = <&clk48>; /* Guess */
546 ipbmcclk: ipbmcclk@48M {
548 compatible = "st,nomadik-src-clock";
550 clocks = <&clk48>; /* Guess */
552 hsiclkrx: hsiclkrx@216M {
554 compatible = "st,nomadik-src-clock";
558 hsiclktx: hsiclktx@108M {
560 compatible = "st,nomadik-src-clock";
564 uart2clk: uart2clk@48M {
566 compatible = "st,nomadik-src-clock";
570 mspclk1: mspclk1@48M {
572 compatible = "st,nomadik-src-clock";
576 mspclk2: mspclk2@48M {
578 compatible = "st,nomadik-src-clock";
584 compatible = "st,nomadik-src-clock";
586 clocks = <&clk48>; /* Guess */
590 compatible = "st,nomadik-src-clock";
592 clocks = <&clk48>; /* Guess */
596 compatible = "st,nomadik-src-clock";
598 clocks = <&clk48>; /* Guess */
600 pclkmsp3: pclkmsp3@48M {
602 compatible = "st,nomadik-src-clock";
606 mspclk3: mspclk3@48M {
608 compatible = "st,nomadik-src-clock";
612 mshcclk: mshcclk@48M {
614 compatible = "st,nomadik-src-clock";
616 clocks = <&clk48>; /* Guess */
618 usbmclk: usbmclk@48M {
620 compatible = "st,nomadik-src-clock";
622 /* Stated as "48 MHz not ULPI clock" */
625 rngcclk: rngcclk@48M {
627 compatible = "st,nomadik-src-clock";
629 clocks = <&clk48>; /* Guess */
633 /* A NAND flash of 128 MiB */
634 fsmc: flash@40000000 {
635 compatible = "stericsson,fsmc-nand";
636 #address-cells = <1>;
638 reg = <0x10100000 0x1000>, /* FSMC Register*/
639 <0x40000000 0x2000>, /* NAND Base DATA */
640 <0x41000000 0x2000>, /* NAND Base ADDR */
641 <0x40800000 0x2000>; /* NAND Base CMD */
642 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
645 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
648 label = "X-Loader(NAND)";
652 label = "MemInit(NAND)";
653 reg = <0x40000 0x40000>;
656 label = "BootLoader(NAND)";
657 reg = <0x80000 0x200000>;
660 label = "Kernel zImage(NAND)";
661 reg = <0x280000 0x300000>;
664 label = "Root Filesystem(NAND)";
665 reg = <0x580000 0x1600000>;
668 label = "User Filesystem(NAND)";
669 reg = <0x1b80000 0x6480000>;
673 /* I2C0 connected to the STw4811 power management chip */
675 compatible = "st,nomadik-i2c", "arm,primecell";
676 reg = <0x101f8000 0x1000>;
677 interrupt-parent = <&vica>;
679 clock-frequency = <100000>;
680 #address-cells = <1>;
682 clocks = <&i2c0clk>, <&pclki2c0>;
683 clock-names = "mclk", "apb_pclk";
684 pinctrl-names = "default";
685 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
688 compatible = "st,stw4811";
690 vmmc_regulator: vmmc {
691 compatible = "st,stw481x-vmmc";
692 regulator-name = "VMMC";
693 regulator-min-microvolt = <1800000>;
694 regulator-max-microvolt = <3300000>;
699 /* I2C1 connected to various sensors */
701 compatible = "st,nomadik-i2c", "arm,primecell";
702 reg = <0x101f7000 0x1000>;
703 interrupt-parent = <&vica>;
705 clock-frequency = <100000>;
706 #address-cells = <1>;
708 clocks = <&i2c1clk>, <&pclki2c1>;
709 clock-names = "mclk", "apb_pclk";
710 pinctrl-names = "default";
711 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
714 compatible = "st,camera";
718 compatible = "st,stw5095";
724 compatible = "simple-bus";
725 #address-cells = <1>;
729 vica: intc@10140000 {
730 compatible = "arm,versatile-vic";
731 interrupt-controller;
732 #interrupt-cells = <1>;
733 reg = <0x10140000 0x20>;
736 vicb: intc@10140020 {
737 compatible = "arm,versatile-vic";
738 interrupt-controller;
739 #interrupt-cells = <1>;
740 reg = <0x10140020 0x20>;
743 uart0: uart@101fd000 {
744 compatible = "arm,pl011", "arm,primecell";
745 reg = <0x101fd000 0x1000>;
746 interrupt-parent = <&vica>;
748 clocks = <&uart0clk>, <&pclkuart0>;
749 clock-names = "uartclk", "apb_pclk";
753 uart1: uart@101fb000 {
754 compatible = "arm,pl011", "arm,primecell";
755 reg = <0x101fb000 0x1000>;
756 interrupt-parent = <&vica>;
758 clocks = <&uart1clk>, <&pclkuart1>;
759 clock-names = "uartclk", "apb_pclk";
760 pinctrl-names = "default";
761 pinctrl-0 = <&uart1_default_mux>;
764 uart2: uart@101f2000 {
765 compatible = "arm,pl011", "arm,primecell";
766 reg = <0x101f2000 0x1000>;
767 interrupt-parent = <&vica>;
769 clocks = <&uart2clk>, <&pclkuart2>;
770 clock-names = "uartclk", "apb_pclk";
775 compatible = "arm,primecell";
776 reg = <0x101b0000 0x1000>;
777 clocks = <&rngcclk>, <&hclkrng>;
778 clock-names = "rng", "apb_pclk";
782 compatible = "arm,pl031", "arm,primecell";
783 reg = <0x101e8000 0x1000>;
785 clock-names = "apb_pclk";
786 interrupt-parent = <&vica>;
790 mmcsd: sdi@101f6000 {
791 compatible = "arm,pl18x", "arm,primecell";
792 reg = <0x101f6000 0x1000>;
793 clocks = <&sdiclk>, <&pclksdi>;
794 clock-names = "mclk", "apb_pclk";
795 interrupt-parent = <&vica>;
797 max-frequency = <400000>;
803 * The STw4811 circuit used with the Nomadik strictly
804 * requires that all of these signal direction pins be
805 * routed and used for its 4-bit levelshifter.
812 pinctrl-names = "default";
813 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
814 vmmc-supply = <&vmmc_regulator>;