2 * Copyright 2011 ST-Ericsson AB
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
13 #include "ste-dbx5x0.dtsi"
14 #include "ste-href-ab8500.dtsi"
15 #include "ste-href-family-pinctrl.dtsi"
18 model = "Calao Systems Snowball platform with device tree";
19 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
22 reg = <0x00000000 0x20000000>;
26 compatible = "regulator-fixed";
27 regulator-name = "en-3v3-fixed-supply";
28 regulator-min-microvolt = <3300000>;
29 regulator-max-microvolt = <3300000>;
30 /* AB8500 GPIOs start from 1 - offset 25 is GPIO26. */
31 gpio = <&ab8500_gpio 25 0x4>;
32 startup-delay-us = <5000>;
37 compatible = "gpio-keys";
42 debounce_interval = <50>;
46 gpios = <&gpio1 0 0x4>;
49 debounce_interval = <50>;
53 gpios = <&gpio4 23 0x4>;
56 debounce_interval = <50>;
60 gpios = <&gpio4 24 0x4>;
63 debounce_interval = <50>;
67 gpios = <&gpio5 1 0x4>;
70 debounce_interval = <50>;
74 gpios = <&gpio5 2 0x4>;
79 compatible = "gpio-leds";
80 pinctrl-names = "default";
81 pinctrl-0 = <&gpioled_snowball_mode>;
84 gpios = <&gpio4 14 0x4>;
86 linux,default-trigger = "heartbeat";
92 pinctrl-names = "default", "sleep";
93 pinctrl-0 = <&musb_default_mode>;
94 pinctrl-1 = <&musb_sleep_mode>;
98 compatible = "stericsson,snd-soc-mop500";
100 stericsson,cpu-dai = <&msp1 &msp3>;
101 stericsson,audio-codec = <&codec>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&msp0_default_mode>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&msp1_default_mode>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&msp2_default_mode>;
126 external-bus@50000000 {
130 compatible = "smsc,lan9115";
132 interrupts = <12 IRQ_TYPE_EDGE_RISING>;
133 interrupt-parent = <&gpio4>;
134 vdd33a-supply = <&en_3v3_reg>;
135 vddvario-supply = <&db8500_vape_reg>;
136 pinctrl-names = "default";
137 pinctrl-0 = <ð_snowball_mode>;
141 smsc,force-internal-phy;
142 smsc,irq-active-high;
145 clocks = <&prcc_pclk 3 0>;
149 vmmci: regulator-gpio {
150 gpios = <&gpio7 4 0x4>;
151 enable-gpio = <&gpio6 25 0x4>;
154 // External Micro SD slot
156 arm,primecell-periphid = <0x10480180>;
157 max-frequency = <100000000>;
160 vmmc-supply = <&ab8500_ldo_aux3_reg>;
161 vqmmc-supply = <&vmmci>;
162 pinctrl-names = "default", "sleep";
163 pinctrl-0 = <&sdi0_default_mode>;
164 pinctrl-1 = <&sdi0_sleep_mode>;
166 cd-gpios = <&gpio6 26 0x4>; // 218
174 arm,primecell-periphid = <0x10480180>;
175 max-frequency = <100000000>;
177 pinctrl-names = "default", "sleep";
178 pinctrl-0 = <&sdi1_default_mode>;
179 pinctrl-1 = <&sdi1_sleep_mode>;
184 // Unused PoP eMMC - register and put it to sleep by default */
186 arm,primecell-periphid = <0x10480180>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&sdi2_sleep_mode>;
195 arm,primecell-periphid = <0x10480180>;
196 max-frequency = <100000000>;
199 vmmc-supply = <&ab8500_ldo_aux2_reg>;
200 pinctrl-names = "default", "sleep";
201 pinctrl-0 = <&sdi4_default_mode>;
202 pinctrl-1 = <&sdi4_sleep_mode>;
208 pinctrl-names = "default", "sleep";
209 pinctrl-0 = <&uart0_default_mode>;
210 pinctrl-1 = <&uart0_sleep_mode>;
215 pinctrl-names = "default", "sleep";
216 pinctrl-0 = <&uart1_default_mode>;
217 pinctrl-1 = <&uart1_sleep_mode>;
222 pinctrl-names = "default", "sleep";
223 pinctrl-0 = <&uart2_default_mode>;
224 pinctrl-1 = <&uart2_sleep_mode>;
229 pinctrl-names = "default","sleep";
230 pinctrl-0 = <&i2c0_default_mode>;
231 pinctrl-1 = <&i2c0_sleep_mode>;
235 pinctrl-names = "default","sleep";
236 pinctrl-0 = <&i2c1_default_mode>;
237 pinctrl-1 = <&i2c1_sleep_mode>;
241 pinctrl-names = "default","sleep";
242 pinctrl-0 = <&i2c2_default_mode>;
243 pinctrl-1 = <&i2c2_sleep_mode>;
247 pinctrl-names = "default","sleep";
248 pinctrl-0 = <&i2c3_default_mode>;
249 pinctrl-1 = <&i2c3_sleep_mode>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&ssp0_snowball_mode>;
269 trip0-temp = <70000>;
270 trip0-type = "active";
271 trip0-cdev-num = <1>;
272 trip0-cdev-name0 = "thermal-cpufreq-0";
274 trip1-temp = <75000>;
275 trip1-type = "active";
276 trip1-cdev-num = <1>;
277 trip1-cdev-name0 = "thermal-cpufreq-0";
279 trip2-temp = <80000>;
280 trip2-type = "active";
281 trip2-cdev-num = <1>;
282 trip2-cdev-name0 = "thermal-cpufreq-0";
284 trip3-temp = <85000>;
285 trip3-type = "critical";
286 trip3-cdev-num = <0>;
293 compatible = "stericsson,ab8500-gpio";
296 ext_regulators: ab8500-ext-regulators {
297 ab8500_ext1_reg: ab8500_ext1 {
298 regulator-name = "ab8500-ext-supply1";
301 ab8500_ext2_reg_reg: ab8500_ext2 {
302 regulator-name = "ab8500-ext-supply2";
305 ab8500_ext3_reg_reg: ab8500_ext3 {
306 regulator-name = "ab8500-ext-supply3";
311 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
312 regulator-name = "V-DISPLAY";
315 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
316 regulator-name = "V-eMMC1";
319 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
320 regulator-name = "V-MMC-SD";
323 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
324 regulator-name = "V-INTCORE";
327 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
328 regulator-name = "V-TVOUT";
331 ab8500_ldo_usb_reg: ab8500_ldo_usb {
332 regulator-name = "dummy";
335 ab8500_ldo_audio_reg: ab8500_ldo_audio {
336 regulator-name = "V-AUD";
339 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
340 regulator-name = "V-AMIC1";
343 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
344 regulator-name = "V-AMIC2";
347 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
348 regulator-name = "V-DMIC";
351 ab8500_ldo_ana_reg: ab8500_ldo_ana {
352 regulator-name = "V-CSI/DSI";
360 * Set this up using hogs, as time goes by and as seems fit, these
361 * can be moved over to being controlled by respective device.
363 pinctrl-names = "default";
364 pinctrl-0 = <&accel_snowball_mode>,
365 <&magneto_snowball_mode>,
366 <&gbf_snowball_mode>,
367 <&wlan_snowball_mode>;
371 * Mux in "SM" which is used for the
372 * SMSC911x Ethernet adapter
374 eth_snowball_mode: eth_snowball {
381 ste,pins = "GPIO140_B11";
382 ste,config = <&in_nopull>;
386 ste,pins = "GPIO141_C12";
387 ste,config = <&gpio_out_hi>;
393 sdi0_default_mode: sdi0_default {
395 ste,function = "mc0";
396 ste,pins = "mc0dat31dir_a_1";
399 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
400 ste,config = <&out_hi>;
406 ssp0_snowball_mode: ssp0_snowball_default {
408 ste,function = "ssp0";
409 ste,pins = "ssp0_a_1";
412 ste,pins = "GPIO144_B13"; /* FRM */
413 ste,config = <&gpio_out_hi>;
416 ste,pins = "GPIO145_C13"; /* RXD */
417 ste,config = <&in_pd>;
421 "GPIO146_D13", /* TXD */
422 "GPIO143_D12"; /* CLK */
423 ste,config = <&out_lo>;
429 gpioled_snowball_mode: gpioled_default {
431 ste,pins = "GPIO142_C11";
432 ste,config = <&gpio_out_hi>;
438 accel_snowball_mode: accel_snowball {
439 /* Accelerometer lines */
442 "GPIO163_C20", /* ACCEL_IRQ1 */
443 "GPIO164_B21"; /* ACCEL_IRQ2 */
444 ste,config = <&gpio_in_pu>;
449 magneto_snowball_mode: magneto_snowball {
451 ste,pins = "GPIO165_C21"; /* MAG_DRDY */
452 ste,config = <&gpio_in_pu>;
457 gbf_snowball_mode: gbf_snowball {
459 * GBF (GPS, Bluetooth, FM-radio) interface,
460 * pull low to reset state
463 ste,pins = "GPIO171_D23"; /* GBF_ENA_RESET */
464 ste,config = <&gpio_out_lo>;
469 wlan_snowball_mode: wlan_snowball {
471 * Activate this mode with the WLAN chip.
472 * These are plain GPIO pins used by WLAN
476 "GPIO161_D21", /* WLAN_PMU_EN */
477 "GPIO215_AH13"; /* WLAN_ENA */
478 ste,config = <&gpio_out_lo>;
481 ste,pins = "GPIO216_AG12"; /* WLAN_IRQ */
482 ste,config = <&gpio_in_pu>;
489 pinctrl-names = "default", "sleep";
490 pinctrl-0 = <&lcd_default_mode>;
491 pinctrl-1 = <&lcd_sleep_mode>;