2 * Copyright (C) 2014 STMicroelectronics Limited.
3 * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 /* 10-19: PIO_FRONT0 */
41 /* 40-42: PIO_FLASH */
51 compatible = "st,stih407-sbc-pinctrl";
52 st,syscfg = <&syscfg_sbc>;
53 reg = <0x0961f080 0x4>;
55 interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>;
56 interrupts-names = "irqmux";
57 ranges = <0 0x09610000 0x6000>;
63 #interrupt-cells = <2>;
65 st,bank-name = "PIO0";
71 #interrupt-cells = <2>;
73 st,bank-name = "PIO1";
79 #interrupt-cells = <2>;
81 st,bank-name = "PIO2";
87 #interrupt-cells = <2>;
89 st,bank-name = "PIO3";
95 #interrupt-cells = <2>;
97 st,bank-name = "PIO4";
100 pio5: gpio@09615000 {
103 interrupt-controller;
104 #interrupt-cells = <2>;
105 reg = <0x5000 0x100>;
106 st,bank-name = "PIO5";
107 st,retime-pin-mask = <0x3f>;
111 pinctrl_cec0_default: cec0-default {
113 hdmi_cec = <&pio2 4 ALT1 BIDIR>;
121 ir = <&pio4 0 ALT2 IN>;
126 /* SBC_ASC0 - UART10 */
128 pinctrl_sbc_serial0: sbc_serial0-0 {
130 tx = <&pio3 4 ALT1 OUT>;
131 rx = <&pio3 5 ALT1 IN>;
135 /* SBC_ASC1 - UART11 */
137 pinctrl_sbc_serial1: sbc_serial1-0 {
139 tx = <&pio2 6 ALT3 OUT>;
140 rx = <&pio2 7 ALT3 IN>;
146 pinctrl_i2c10_default: i2c10-default {
148 sda = <&pio4 6 ALT1 BIDIR>;
149 scl = <&pio4 5 ALT1 BIDIR>;
155 pinctrl_i2c11_default: i2c11-default {
157 sda = <&pio5 1 ALT1 BIDIR>;
158 scl = <&pio5 0 ALT1 BIDIR>;
164 pinctrl_keyscan: keyscan {
166 keyin0 = <&pio4 0 ALT6 IN>;
167 keyin1 = <&pio4 5 ALT4 IN>;
168 keyin2 = <&pio0 4 ALT2 IN>;
169 keyin3 = <&pio2 6 ALT2 IN>;
171 keyout0 = <&pio4 6 ALT4 OUT>;
172 keyout1 = <&pio1 7 ALT2 OUT>;
173 keyout2 = <&pio0 6 ALT2 OUT>;
174 keyout3 = <&pio2 7 ALT2 OUT>;
181 * Almost all the boards based on STiH407 SoC have an embedded
182 * switch where the mdio/mdc have been used for managing the SMI
183 * iface via I2C. For this reason these lines can be allocated
184 * by using dedicated configuration (in case of there will be a
185 * standard PHY transceiver on-board).
187 pinctrl_rgmii1: rgmii1-0 {
190 txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>;
191 txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>;
192 txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>;
193 txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>;
194 txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>;
195 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
196 rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>;
197 rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>;
198 rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
199 rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
200 rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
201 rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;
202 clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
203 phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;
207 pinctrl_rgmii1_mdio: rgmii1-mdio {
209 mdio = <&pio1 0 ALT1 OUT BYPASS 0>;
210 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
211 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
217 txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
218 txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
219 txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
220 txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
221 txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
222 txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
223 txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>;
224 col = <&pio0 7 ALT1 IN BYPASS 1000>;
226 mdio = <&pio1 0 ALT1 OUT BYPASS 1500>;
227 mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>;
228 crs = <&pio1 2 ALT1 IN BYPASS 1000>;
229 mdint = <&pio1 3 ALT1 IN BYPASS 0>;
230 rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
231 rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
232 rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
233 rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
235 rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
236 rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
237 rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
238 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
244 pinctrl_pwm1_chan0_default: pwm1-0-default {
246 pwm-out = <&pio3 0 ALT1 OUT>;
249 pinctrl_pwm1_chan1_default: pwm1-1-default {
251 pwm-out = <&pio4 4 ALT1 OUT>;
254 pinctrl_pwm1_chan2_default: pwm1-2-default {
256 pwm-out = <&pio4 6 ALT3 OUT>;
259 pinctrl_pwm1_chan3_default: pwm1-3-default {
261 pwm-out = <&pio4 7 ALT3 OUT>;
267 pinctrl_spi10_default: spi10-4w-alt1-0 {
269 mtsr = <&pio4 6 ALT1 OUT>;
270 mrst = <&pio4 7 ALT1 IN>;
271 scl = <&pio4 5 ALT1 OUT>;
275 pinctrl_spi10_3w_alt1_0: spi10-3w-alt1-0 {
277 mtsr = <&pio4 6 ALT1 BIDIR_PU>;
278 scl = <&pio4 5 ALT1 OUT>;
284 pinctrl_spi11_default: spi11-4w-alt2-0 {
286 mtsr = <&pio3 1 ALT2 OUT>;
287 mrst = <&pio3 0 ALT2 IN>;
288 scl = <&pio3 2 ALT2 OUT>;
292 pinctrl_spi11_3w_alt2_0: spi11-3w-alt2-0 {
294 mtsr = <&pio3 1 ALT2 BIDIR_PU>;
295 scl = <&pio3 2 ALT2 OUT>;
301 pinctrl_spi12_default: spi12-4w-alt2-0 {
303 mtsr = <&pio3 6 ALT2 OUT>;
304 mrst = <&pio3 4 ALT2 IN>;
305 scl = <&pio3 7 ALT2 OUT>;
309 pinctrl_spi12_3w_alt2_0: spi12-3w-alt2-0 {
311 mtsr = <&pio3 6 ALT2 BIDIR_PU>;
312 scl = <&pio3 7 ALT2 OUT>;
318 pin-controller-front0 {
319 #address-cells = <1>;
321 compatible = "st,stih407-front-pinctrl";
322 st,syscfg = <&syscfg_front>;
323 reg = <0x0920f080 0x4>;
324 reg-names = "irqmux";
325 interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>;
326 interrupts-names = "irqmux";
327 ranges = <0 0x09200000 0x10000>;
329 pio10: pio@09200000 {
332 interrupt-controller;
333 #interrupt-cells = <2>;
335 st,bank-name = "PIO10";
337 pio11: pio@09201000 {
340 interrupt-controller;
341 #interrupt-cells = <2>;
342 reg = <0x1000 0x100>;
343 st,bank-name = "PIO11";
345 pio12: pio@09202000 {
348 interrupt-controller;
349 #interrupt-cells = <2>;
350 reg = <0x2000 0x100>;
351 st,bank-name = "PIO12";
353 pio13: pio@09203000 {
356 interrupt-controller;
357 #interrupt-cells = <2>;
358 reg = <0x3000 0x100>;
359 st,bank-name = "PIO13";
361 pio14: pio@09204000 {
364 interrupt-controller;
365 #interrupt-cells = <2>;
366 reg = <0x4000 0x100>;
367 st,bank-name = "PIO14";
369 pio15: pio@09205000 {
372 interrupt-controller;
373 #interrupt-cells = <2>;
374 reg = <0x5000 0x100>;
375 st,bank-name = "PIO15";
377 pio16: pio@09206000 {
380 interrupt-controller;
381 #interrupt-cells = <2>;
382 reg = <0x6000 0x100>;
383 st,bank-name = "PIO16";
385 pio17: pio@09207000 {
388 interrupt-controller;
389 #interrupt-cells = <2>;
390 reg = <0x7000 0x100>;
391 st,bank-name = "PIO17";
393 pio18: pio@09208000 {
396 interrupt-controller;
397 #interrupt-cells = <2>;
398 reg = <0x8000 0x100>;
399 st,bank-name = "PIO18";
401 pio19: pio@09209000 {
404 interrupt-controller;
405 #interrupt-cells = <2>;
406 reg = <0x9000 0x100>;
407 st,bank-name = "PIO19";
412 pinctrl_serial0: serial0-0 {
414 tx = <&pio17 0 ALT1 OUT>;
415 rx = <&pio17 1 ALT1 IN>;
421 pinctrl_serial1: serial1-0 {
423 tx = <&pio16 0 ALT1 OUT>;
424 rx = <&pio16 1 ALT1 IN>;
430 pinctrl_serial2: serial2-0 {
432 tx = <&pio15 0 ALT1 OUT>;
433 rx = <&pio15 1 ALT1 IN>;
441 sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>;
442 sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>;
443 sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>;
444 sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>;
445 sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>;
446 sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>;
447 sd_led = <&pio16 6 ALT6 OUT>;
448 sd_pwren = <&pio16 7 ALT6 OUT>;
449 sd_cd = <&pio19 0 ALT6 IN>;
450 sd_wp = <&pio19 1 ALT6 IN>;
457 pinctrl_i2c0_default: i2c0-default {
459 sda = <&pio10 6 ALT2 BIDIR>;
460 scl = <&pio10 5 ALT2 BIDIR>;
466 pinctrl_i2c1_default: i2c1-default {
468 sda = <&pio11 1 ALT2 BIDIR>;
469 scl = <&pio11 0 ALT2 BIDIR>;
475 pinctrl_i2c2_default: i2c2-default {
477 sda = <&pio15 6 ALT2 BIDIR>;
478 scl = <&pio15 5 ALT2 BIDIR>;
484 pinctrl_i2c3_default: i2c3-alt1-0 {
486 sda = <&pio18 6 ALT1 BIDIR>;
487 scl = <&pio18 5 ALT1 BIDIR>;
490 pinctrl_i2c3_alt1_1: i2c3-alt1-1 {
492 sda = <&pio17 7 ALT1 BIDIR>;
493 scl = <&pio17 6 ALT1 BIDIR>;
496 pinctrl_i2c3_alt3_0: i2c3-alt3-0 {
498 sda = <&pio13 6 ALT3 BIDIR>;
499 scl = <&pio13 5 ALT3 BIDIR>;
505 pinctrl_spi0_default: spi0-4w-alt2-0 {
507 mtsr = <&pio10 6 ALT2 OUT>;
508 mrst = <&pio10 7 ALT2 IN>;
509 scl = <&pio10 5 ALT2 OUT>;
513 pinctrl_spi0_3w_alt2_0: spi0-3w-alt2-0 {
515 mtsr = <&pio10 6 ALT2 BIDIR_PU>;
516 scl = <&pio10 5 ALT2 OUT>;
520 pinctrl_spi0_4w_alt1_0: spi0-4w-alt1-0 {
522 mtsr = <&pio19 7 ALT1 OUT>;
523 mrst = <&pio19 5 ALT1 IN>;
524 scl = <&pio19 6 ALT1 OUT>;
528 pinctrl_spi0_3w_alt1_0: spi0-3w-alt1-0 {
530 mtsr = <&pio19 7 ALT1 BIDIR_PU>;
531 scl = <&pio19 6 ALT1 OUT>;
537 pinctrl_spi1_default: spi1-4w-alt2-0 {
539 mtsr = <&pio11 1 ALT2 OUT>;
540 mrst = <&pio11 2 ALT2 IN>;
541 scl = <&pio11 0 ALT2 OUT>;
545 pinctrl_spi1_3w_alt2_0: spi1-3w-alt2-0 {
547 mtsr = <&pio11 1 ALT2 BIDIR_PU>;
548 scl = <&pio11 0 ALT2 OUT>;
552 pinctrl_spi1_4w_alt1_0: spi1-4w-alt1-0 {
554 mtsr = <&pio14 3 ALT1 OUT>;
555 mrst = <&pio14 4 ALT1 IN>;
556 scl = <&pio14 2 ALT1 OUT>;
560 pinctrl_spi1_3w_alt1_0: spi1-3w-alt1-0 {
562 mtsr = <&pio14 3 ALT1 BIDIR_PU>;
563 scl = <&pio14 2 ALT1 OUT>;
569 pinctrl_spi2_default: spi2-4w-alt2-0 {
571 mtsr = <&pio12 6 ALT2 OUT>;
572 mrst = <&pio12 7 ALT2 IN>;
573 scl = <&pio12 5 ALT2 OUT>;
577 pinctrl_spi2_3w_alt2_0: spi2-3w-alt2-0 {
579 mtsr = <&pio12 6 ALT2 BIDIR_PU>;
580 scl = <&pio12 5 ALT2 OUT>;
584 pinctrl_spi2_4w_alt1_0: spi2-4w-alt1-0 {
586 mtsr = <&pio14 6 ALT1 OUT>;
587 mrst = <&pio14 7 ALT1 IN>;
588 scl = <&pio14 5 ALT1 OUT>;
592 pinctrl_spi2_3w_alt1_0: spi2-3w-alt1-0 {
594 mtsr = <&pio14 6 ALT1 BIDIR_PU>;
595 scl = <&pio14 5 ALT1 OUT>;
599 pinctrl_spi2_4w_alt2_1: spi2-4w-alt2-1 {
601 mtsr = <&pio15 6 ALT2 OUT>;
602 mrst = <&pio15 7 ALT2 IN>;
603 scl = <&pio15 5 ALT2 OUT>;
607 pinctrl_spi2_3w_alt2_1: spi2-3w-alt2-1 {
609 mtsr = <&pio15 6 ALT2 BIDIR_PU>;
610 scl = <&pio15 5 ALT2 OUT>;
616 pinctrl_spi3_default: spi3-4w-alt3-0 {
618 mtsr = <&pio13 6 ALT3 OUT>;
619 mrst = <&pio13 7 ALT3 IN>;
620 scl = <&pio13 5 ALT3 OUT>;
624 pinctrl_spi3_3w_alt3_0: spi3-3w-alt3-0 {
626 mtsr = <&pio13 6 ALT3 BIDIR_PU>;
627 scl = <&pio13 5 ALT3 OUT>;
631 pinctrl_spi3_4w_alt1_0: spi3-4w-alt1-0 {
633 mtsr = <&pio17 7 ALT1 OUT>;
634 mrst = <&pio17 5 ALT1 IN>;
635 scl = <&pio17 6 ALT1 OUT>;
639 pinctrl_spi3_3w_alt1_0: spi3-3w-alt1-0 {
641 mtsr = <&pio17 7 ALT1 BIDIR_PU>;
642 scl = <&pio17 6 ALT1 OUT>;
646 pinctrl_spi3_4w_alt1_1: spi3-4w-alt1-1 {
648 mtsr = <&pio18 6 ALT1 OUT>;
649 mrst = <&pio18 7 ALT1 IN>;
650 scl = <&pio18 5 ALT1 OUT>;
654 pinctrl_spi3_3w_alt1_1: spi3-3w-alt1-1 {
656 mtsr = <&pio18 6 ALT1 BIDIR_PU>;
657 scl = <&pio18 5 ALT1 OUT>;
663 pinctrl_tsin0_parallel: tsin0_parallel {
665 DATA7 = <&pio10 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
666 DATA6 = <&pio10 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
667 DATA5 = <&pio10 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
668 DATA4 = <&pio10 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
669 DATA3 = <&pio11 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
670 DATA2 = <&pio11 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
671 DATA1 = <&pio11 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
672 DATA0 = <&pio11 3 ALT1 IN SE_NICLK_IO 0 CLK_A>;
673 CLKIN = <&pio10 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
674 VALID = <&pio10 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
675 ERROR = <&pio10 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
676 PKCLK = <&pio10 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
679 pinctrl_tsin0_serial: tsin0_serial {
681 DATA7 = <&pio10 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
682 CLKIN = <&pio10 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
683 VALID = <&pio10 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
684 ERROR = <&pio10 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
685 PKCLK = <&pio10 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
691 pinctrl_tsin1_parallel: tsin1_parallel {
693 DATA7 = <&pio12 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
694 DATA6 = <&pio12 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
695 DATA5 = <&pio12 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
696 DATA4 = <&pio12 3 ALT1 IN SE_NICLK_IO 0 CLK_A>;
697 DATA3 = <&pio12 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
698 DATA2 = <&pio12 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
699 DATA1 = <&pio12 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
700 DATA0 = <&pio12 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
701 CLKIN = <&pio11 7 ALT1 IN CLKNOTDATA 0 CLK_A>;
702 VALID = <&pio11 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
703 ERROR = <&pio11 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
704 PKCLK = <&pio11 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
707 pinctrl_tsin1_serial: tsin1_serial {
709 DATA7 = <&pio12 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
710 CLKIN = <&pio11 7 ALT1 IN CLKNOTDATA 0 CLK_A>;
711 VALID = <&pio11 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
712 ERROR = <&pio11 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
713 PKCLK = <&pio11 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
719 pinctrl_tsin2_parallel: tsin2_parallel {
721 DATA7 = <&pio13 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
722 DATA6 = <&pio13 5 ALT2 IN SE_NICLK_IO 0 CLK_B>;
723 DATA5 = <&pio13 6 ALT2 IN SE_NICLK_IO 0 CLK_B>;
724 DATA4 = <&pio13 7 ALT2 IN SE_NICLK_IO 0 CLK_B>;
725 DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
726 DATA2 = <&pio14 1 ALT2 IN SE_NICLK_IO 0 CLK_B>;
727 DATA1 = <&pio14 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
728 DATA0 = <&pio14 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
729 CLKIN = <&pio13 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
730 VALID = <&pio13 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
731 ERROR = <&pio13 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
732 PKCLK = <&pio13 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
735 pinctrl_tsin2_serial: tsin2_serial {
737 DATA7 = <&pio13 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
738 CLKIN = <&pio13 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
739 VALID = <&pio13 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
740 ERROR = <&pio13 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
741 PKCLK = <&pio13 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
747 pinctrl_tsin3_serial: tsin3_serial {
749 DATA7 = <&pio14 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
750 CLKIN = <&pio14 0 ALT1 IN CLKNOTDATA 0 CLK_A>;
751 VALID = <&pio13 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
752 ERROR = <&pio13 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
753 PKCLK = <&pio13 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
759 pinctrl_tsin4_serial_alt3: tsin4_serial_alt3 {
761 DATA7 = <&pio14 6 ALT3 IN SE_NICLK_IO 0 CLK_A>;
762 CLKIN = <&pio14 5 ALT3 IN CLKNOTDATA 0 CLK_A>;
763 VALID = <&pio14 3 ALT3 IN SE_NICLK_IO 0 CLK_B>;
764 ERROR = <&pio14 2 ALT3 IN SE_NICLK_IO 0 CLK_B>;
765 PKCLK = <&pio14 4 ALT3 IN SE_NICLK_IO 0 CLK_A>;
771 pinctrl_tsin5_serial_alt1: tsin5_serial_alt1 {
773 DATA7 = <&pio18 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
774 CLKIN = <&pio18 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
775 VALID = <&pio18 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
776 ERROR = <&pio18 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
777 PKCLK = <&pio18 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
780 pinctrl_tsin5_serial_alt2: tsin5_serial_alt2 {
782 DATA7 = <&pio19 4 ALT2 IN SE_NICLK_IO 0 CLK_A>;
783 CLKIN = <&pio19 3 ALT2 IN CLKNOTDATA 0 CLK_A>;
784 VALID = <&pio19 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
785 ERROR = <&pio19 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
786 PKCLK = <&pio19 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
792 pinctrl_tsout0_parallel: tsout0_parallel {
794 DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
795 DATA6 = <&pio12 1 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
796 DATA5 = <&pio12 2 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
797 DATA4 = <&pio12 3 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
798 DATA3 = <&pio12 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
799 DATA2 = <&pio12 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
800 DATA1 = <&pio12 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
801 DATA0 = <&pio12 7 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
802 CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>;
803 VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
804 ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
805 PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
808 pinctrl_tsout0_serial: tsout0_serial {
810 DATA7 = <&pio12 0 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
811 CLKIN = <&pio11 7 ALT3 OUT NICLK 0 CLK_A>;
812 VALID = <&pio11 5 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
813 ERROR = <&pio11 4 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
814 PKCLK = <&pio11 6 ALT3 OUT SE_NICLK_IO 0 CLK_A>;
820 pinctrl_tsout1_serial: tsout1_serial {
822 DATA7 = <&pio19 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
823 CLKIN = <&pio19 3 ALT1 OUT NICLK 0 CLK_A>;
824 VALID = <&pio19 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
825 ERROR = <&pio19 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
826 PKCLK = <&pio19 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>;
832 pinctrl_mtsin0_parallel: mtsin0_parallel {
834 DATA7 = <&pio10 4 ALT3 IN SE_NICLK_IO 0 CLK_A>;
835 DATA6 = <&pio10 5 ALT3 IN SE_NICLK_IO 0 CLK_A>;
836 DATA5 = <&pio10 6 ALT3 IN SE_NICLK_IO 0 CLK_A>;
837 DATA4 = <&pio10 7 ALT3 IN SE_NICLK_IO 0 CLK_A>;
838 DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
839 DATA2 = <&pio11 1 ALT3 IN SE_NICLK_IO 0 CLK_A>;
840 DATA1 = <&pio11 2 ALT3 IN SE_NICLK_IO 0 CLK_A>;
841 DATA0 = <&pio11 3 ALT3 IN SE_NICLK_IO 0 CLK_A>;
842 CLKIN = <&pio10 3 ALT3 IN CLKNOTDATA 0 CLK_A>;
843 VALID = <&pio10 1 ALT3 IN SE_NICLK_IO 0 CLK_A>;
844 ERROR = <&pio10 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
845 PKCLK = <&pio10 2 ALT3 IN SE_NICLK_IO 0 CLK_A>;
851 pin-controller-front1 {
852 #address-cells = <1>;
854 compatible = "st,stih407-front-pinctrl";
855 st,syscfg = <&syscfg_front>;
856 reg = <0x0921f080 0x4>;
857 reg-names = "irqmux";
858 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
859 interrupts-names = "irqmux";
860 ranges = <0 0x09210000 0x10000>;
863 pinctrl_tsin4_serial_alt1: tsin4_serial_alt1 {
865 DATA7 = <&pio20 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
866 CLKIN = <&pio20 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
867 VALID = <&pio20 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
868 ERROR = <&pio20 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
869 PKCLK = <&pio20 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
874 pio20: pio@09210000 {
877 interrupt-controller;
878 #interrupt-cells = <2>;
880 st,bank-name = "PIO20";
884 pin-controller-rear {
885 #address-cells = <1>;
887 compatible = "st,stih407-rear-pinctrl";
888 st,syscfg = <&syscfg_rear>;
889 reg = <0x0922f080 0x4>;
890 reg-names = "irqmux";
891 interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>;
892 interrupts-names = "irqmux";
893 ranges = <0 0x09220000 0x6000>;
895 pio30: gpio@09220000 {
898 interrupt-controller;
899 #interrupt-cells = <2>;
901 st,bank-name = "PIO30";
903 pio31: gpio@09221000 {
906 interrupt-controller;
907 #interrupt-cells = <2>;
908 reg = <0x1000 0x100>;
909 st,bank-name = "PIO31";
911 pio32: gpio@09222000 {
914 interrupt-controller;
915 #interrupt-cells = <2>;
916 reg = <0x2000 0x100>;
917 st,bank-name = "PIO32";
919 pio33: gpio@09223000 {
922 interrupt-controller;
923 #interrupt-cells = <2>;
924 reg = <0x3000 0x100>;
925 st,bank-name = "PIO33";
927 pio34: gpio@09224000 {
930 interrupt-controller;
931 #interrupt-cells = <2>;
932 reg = <0x4000 0x100>;
933 st,bank-name = "PIO34";
935 pio35: gpio@09225000 {
938 interrupt-controller;
939 #interrupt-cells = <2>;
940 reg = <0x5000 0x100>;
941 st,bank-name = "PIO35";
942 st,retime-pin-mask = <0x7f>;
946 pinctrl_i2c4_default: i2c4-default {
948 sda = <&pio30 1 ALT1 BIDIR>;
949 scl = <&pio30 0 ALT1 BIDIR>;
955 pinctrl_i2c5_default: i2c5-default {
957 sda = <&pio34 4 ALT1 BIDIR>;
958 scl = <&pio34 3 ALT1 BIDIR>;
964 pinctrl_usb3: usb3-2 {
966 usb-oc-detect = <&pio35 4 ALT1 IN>;
967 usb-pwr-enable = <&pio35 5 ALT1 OUT>;
968 usb-vbus-valid = <&pio35 6 ALT1 IN>;
974 pinctrl_pwm0_chan0_default: pwm0-0-default {
976 pwm-out = <&pio31 1 ALT1 OUT>;
982 pinctrl_spi4_default: spi4-4w-alt1-0 {
984 mtsr = <&pio30 1 ALT1 OUT>;
985 mrst = <&pio30 2 ALT1 IN>;
986 scl = <&pio30 0 ALT1 OUT>;
990 pinctrl_spi4_3w_alt1_0: spi4-3w-alt1-0 {
992 mtsr = <&pio30 1 ALT1 BIDIR_PU>;
993 scl = <&pio30 0 ALT1 OUT>;
997 pinctrl_spi4_4w_alt3_0: spi4-4w-alt3-0 {
999 mtsr = <&pio34 1 ALT3 OUT>;
1000 mrst = <&pio34 2 ALT3 IN>;
1001 scl = <&pio34 0 ALT3 OUT>;
1005 pinctrl_spi4_3w_alt3_0: spi4-3w-alt3-0 {
1007 mtsr = <&pio34 1 ALT3 BIDIR_PU>;
1008 scl = <&pio34 0 ALT3 OUT>;
1014 pinctrl_serial3: serial3-0 {
1016 tx = <&pio31 3 ALT1 OUT>;
1017 rx = <&pio31 4 ALT1 IN>;
1023 pin-controller-flash {
1024 #address-cells = <1>;
1026 compatible = "st,stih407-flash-pinctrl";
1027 st,syscfg = <&syscfg_flash>;
1028 reg = <0x0923f080 0x4>;
1029 reg-names = "irqmux";
1030 interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>;
1031 interrupts-names = "irqmux";
1032 ranges = <0 0x09230000 0x3000>;
1034 pio40: gpio@09230000 {
1037 interrupt-controller;
1038 #interrupt-cells = <2>;
1040 st,bank-name = "PIO40";
1042 pio41: gpio@09231000 {
1045 interrupt-controller;
1046 #interrupt-cells = <2>;
1047 reg = <0x1000 0x100>;
1048 st,bank-name = "PIO41";
1050 pio42: gpio@09232000 {
1053 interrupt-controller;
1054 #interrupt-cells = <2>;
1055 reg = <0x2000 0x100>;
1056 st,bank-name = "PIO42";
1060 pinctrl_mmc0: mmc0-0 {
1062 emmc_clk = <&pio40 6 ALT1 BIDIR>;
1063 emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>;
1064 emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>;
1065 emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>;
1066 emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>;
1067 emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>;
1068 emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>;
1069 emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>;
1070 emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>;
1071 emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>;