2 * Copyright (C) 2013 STMicroelectronics (R&D) Limited.
3 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
46 compatible = "st,stih415-sbc-pinctrl";
47 st,syscfg = <&syscfg_sbc>;
48 ranges = <0 0xfe610000 0x5000>;
54 st,bank-name = "PIO0";
60 st,bank-name = "PIO1";
66 st,bank-name = "PIO2";
72 st,bank-name = "PIO3";
78 st,bank-name = "PIO4";
82 pinctrl_sbc_serial1:sbc_serial1 {
84 tx = <&PIO2 6 ALT3 OUT>;
85 rx = <&PIO2 7 ALT3 IN>;
91 pinctrl_sbc_i2c0_default: sbc_i2c0-default {
93 sda = <&PIO4 6 ALT1 BIDIR>;
94 scl = <&PIO4 5 ALT1 BIDIR>;
100 pinctrl_sbc_i2c1_default: sbc_i2c1-default {
102 sda = <&PIO3 2 ALT2 BIDIR>;
103 scl = <&PIO3 1 ALT2 BIDIR>;
109 pin-controller-front {
110 #address-cells = <1>;
112 compatible = "st,stih415-front-pinctrl";
113 st,syscfg = <&syscfg_front>;
114 ranges = <0 0xfee00000 0x8000>;
116 PIO5: gpio@fee00000 {
120 st,bank-name = "PIO5";
122 PIO6: gpio@fee01000 {
125 reg = <0x1000 0x100>;
126 st,bank-name = "PIO6";
128 PIO7: gpio@fee02000 {
131 reg = <0x2000 0x100>;
132 st,bank-name = "PIO7";
134 PIO8: gpio@fee03000 {
137 reg = <0x3000 0x100>;
138 st,bank-name = "PIO8";
140 PIO9: gpio@fee04000 {
143 reg = <0x4000 0x100>;
144 st,bank-name = "PIO9";
146 PIO10: gpio@fee05000 {
149 reg = <0x5000 0x100>;
150 st,bank-name = "PIO10";
152 PIO11: gpio@fee06000 {
155 reg = <0x6000 0x100>;
156 st,bank-name = "PIO11";
158 PIO12: gpio@fee07000 {
161 reg = <0x7000 0x100>;
162 st,bank-name = "PIO12";
166 pinctrl_i2c0_default: i2c0-default {
168 sda = <&PIO9 3 ALT1 BIDIR>;
169 scl = <&PIO9 2 ALT1 BIDIR>;
175 pinctrl_i2c1_default: i2c1-default {
177 sda = <&PIO12 1 ALT1 BIDIR>;
178 scl = <&PIO12 0 ALT1 BIDIR>;
184 pin-controller-rear {
185 #address-cells = <1>;
187 compatible = "st,stih415-rear-pinctrl";
188 st,syscfg = <&syscfg_rear>;
189 ranges = <0 0xfe820000 0x8000>;
191 PIO13: gpio@fe820000 {
195 st,bank-name = "PIO13";
197 PIO14: gpio@fe821000 {
200 reg = <0x1000 0x100>;
201 st,bank-name = "PIO14";
203 PIO15: gpio@fe822000 {
206 reg = <0x2000 0x100>;
207 st,bank-name = "PIO15";
209 PIO16: gpio@fe823000 {
212 reg = <0x3000 0x100>;
213 st,bank-name = "PIO16";
215 PIO17: gpio@fe824000 {
218 reg = <0x4000 0x100>;
219 st,bank-name = "PIO17";
221 PIO18: gpio@fe825000 {
224 reg = <0x5000 0x100>;
225 st,bank-name = "PIO18";
229 pinctrl_serial2: serial2-0 {
231 tx = <&PIO17 4 ALT2 OUT>;
232 rx = <&PIO17 5 ALT2 IN>;
238 pin-controller-left {
239 #address-cells = <1>;
241 compatible = "st,stih415-left-pinctrl";
242 st,syscfg = <&syscfg_left>;
243 ranges = <0 0xfd6b0000 0x3000>;
245 PIO100: gpio@fd6b0000 {
249 st,bank-name = "PIO100";
251 PIO101: gpio@fd6b1000 {
254 reg = <0x1000 0x100>;
255 st,bank-name = "PIO101";
257 PIO102: gpio@fd6b2000 {
260 reg = <0x2000 0x100>;
261 st,bank-name = "PIO102";
265 pin-controller-right {
266 #address-cells = <1>;
268 compatible = "st,stih415-right-pinctrl";
269 st,syscfg = <&syscfg_right>;
270 ranges = <0 0xfd330000 0x5000>;
272 PIO103: gpio@fd330000 {
276 st,bank-name = "PIO103";
278 PIO104: gpio@fd331000 {
281 reg = <0x1000 0x100>;
282 st,bank-name = "PIO104";
284 PIO105: gpio@fd332000 {
287 reg = <0x2000 0x100>;
288 st,bank-name = "PIO105";
290 PIO106: gpio@fd333000 {
293 reg = <0x3000 0x100>;
294 st,bank-name = "PIO106";
296 PIO107: gpio@fd334000 {
299 reg = <0x4000 0x100>;
300 st,bank-name = "PIO107";