3 * Copyright (C) 2013 STMicroelectronics Limited.
4 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
10 #include "st-pincfg.h"
50 compatible = "st,stih416-sbc-pinctrl";
51 st,syscfg = <&syscfg_sbc>;
52 ranges = <0 0xfe610000 0x6000>;
58 st,bank-name = "PIO0";
64 st,bank-name = "PIO1";
70 st,bank-name = "PIO2";
76 st,bank-name = "PIO3";
82 st,bank-name = "PIO4";
84 PIO40: gpio@fe615000 {
88 st,bank-name = "PIO40";
89 st,retime-pin-mask = <0x7f>;
93 pinctrl_sbc_serial1: sbc_serial1 {
95 tx = <&PIO2 6 ALT3 OUT>;
96 rx = <&PIO2 7 ALT3 IN>;
102 pinctrl_sbc_i2c0_default: sbc_i2c0-default {
104 sda = <&PIO4 6 ALT1 BIDIR>;
105 scl = <&PIO4 5 ALT1 BIDIR>;
111 pinctrl_sbc_i2c1_default: sbc_i2c1-default {
113 sda = <&PIO3 2 ALT2 BIDIR>;
114 scl = <&PIO3 1 ALT2 BIDIR>;
120 pin-controller-front {
121 #address-cells = <1>;
123 compatible = "st,stih416-front-pinctrl";
124 st,syscfg = <&syscfg_front>;
125 ranges = <0 0xfee00000 0x10000>;
127 PIO5: gpio@fee00000 {
131 st,bank-name = "PIO5";
133 PIO6: gpio@fee01000 {
136 reg = <0x1000 0x100>;
137 st,bank-name = "PIO6";
139 PIO7: gpio@fee02000 {
142 reg = <0x2000 0x100>;
143 st,bank-name = "PIO7";
145 PIO8: gpio@fee03000 {
148 reg = <0x3000 0x100>;
149 st,bank-name = "PIO8";
151 PIO9: gpio@fee04000 {
154 reg = <0x4000 0x100>;
155 st,bank-name = "PIO9";
157 PIO10: gpio@fee05000 {
160 reg = <0x5000 0x100>;
161 st,bank-name = "PIO10";
163 PIO11: gpio@fee06000 {
166 reg = <0x6000 0x100>;
167 st,bank-name = "PIO11";
169 PIO12: gpio@fee07000 {
172 reg = <0x7000 0x100>;
173 st,bank-name = "PIO12";
175 PIO30: gpio@fee08000 {
178 reg = <0x8000 0x100>;
179 st,bank-name = "PIO30";
181 PIO31: gpio@fee09000 {
184 reg = <0x9000 0x100>;
185 st,bank-name = "PIO31";
189 pinctrl_serial2_oe: serial2-1 {
191 output-enable = <&PIO11 3 ALT2 OUT>;
197 pinctrl_i2c0_default: i2c0-default {
199 sda = <&PIO9 3 ALT1 BIDIR>;
200 scl = <&PIO9 2 ALT1 BIDIR>;
206 pinctrl_i2c1_default: i2c1-default {
208 sda = <&PIO12 1 ALT1 BIDIR>;
209 scl = <&PIO12 0 ALT1 BIDIR>;
215 pin-controller-rear {
216 #address-cells = <1>;
218 compatible = "st,stih416-rear-pinctrl";
219 st,syscfg = <&syscfg_rear>;
220 ranges = <0 0xfe820000 0x6000>;
222 PIO13: gpio@fe820000 {
226 st,bank-name = "PIO13";
228 PIO14: gpio@fe821000 {
231 reg = <0x1000 0x100>;
232 st,bank-name = "PIO14";
234 PIO15: gpio@fe822000 {
237 reg = <0x2000 0x100>;
238 st,bank-name = "PIO15";
240 PIO16: gpio@fe823000 {
243 reg = <0x3000 0x100>;
244 st,bank-name = "PIO16";
246 PIO17: gpio@fe824000 {
249 reg = <0x4000 0x100>;
250 st,bank-name = "PIO17";
252 PIO18: gpio@fe825000 {
255 reg = <0x5000 0x100>;
256 st,bank-name = "PIO18";
257 st,retime-pin-mask = <0xf>;
261 pinctrl_serial2: serial2-0 {
263 tx = <&PIO17 4 ALT2 OUT>;
264 rx = <&PIO17 5 ALT2 IN>;
270 pin-controller-fvdp-fe {
271 #address-cells = <1>;
273 compatible = "st,stih416-fvdp-fe-pinctrl";
274 st,syscfg = <&syscfg_fvdp_fe>;
275 ranges = <0 0xfd6b0000 0x3000>;
277 PIO100: gpio@fd6b0000 {
281 st,bank-name = "PIO100";
283 PIO101: gpio@fd6b1000 {
286 reg = <0x1000 0x100>;
287 st,bank-name = "PIO101";
289 PIO102: gpio@fd6b2000 {
292 reg = <0x2000 0x100>;
293 st,bank-name = "PIO102";
297 pin-controller-fvdp-lite {
298 #address-cells = <1>;
300 compatible = "st,stih416-fvdp-lite-pinctrl";
301 st,syscfg = <&syscfg_fvdp_lite>;
302 ranges = <0 0xfd330000 0x5000>;
304 PIO103: gpio@fd330000 {
308 st,bank-name = "PIO103";
310 PIO104: gpio@fd331000 {
313 reg = <0x1000 0x100>;
314 st,bank-name = "PIO104";
316 PIO105: gpio@fd332000 {
319 reg = <0x2000 0x100>;
320 st,bank-name = "PIO105";
322 PIO106: gpio@fd333000 {
325 reg = <0x3000 0x100>;
326 st,bank-name = "PIO106";
329 PIO107: gpio@fd334000 {
332 reg = <0x4000 0x100>;
333 st,bank-name = "PIO107";
334 st,retime-pin-mask = <0xf>;