1 #include "tegra30.dtsi"
4 * This file contains common DT entry for all fab version of Cardhu.
5 * There is multiple fab version of Cardhu starting from A01 to A07.
6 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
7 * A02 will have different sets of GPIOs for fixed regulator compare to
8 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
9 * compatible with fab version A04. Based on Cardhu fab version, the
10 * related dts file need to be chosen like for Cardhu fab version A02,
11 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
12 * tegra30-cardhu-a04.dts.
13 * The identification of board is done in two ways, by looking the sticker
14 * on PCB and by reading board id eeprom.
15 * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
16 * number is the fab version like here it is 002 and hence fab version A02.
17 * The (downstream internal) U-Boot of Cardhu display the board-id as
19 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
20 * In this Fab version is 02 i.e. A02.
21 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
22 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
27 model = "NVIDIA Tegra30 Cardhu evaluation board";
28 compatible = "nvidia,cardhu", "nvidia,tegra30";
31 rtc0 = "/i2c@7000d000/tps65911@2d";
32 rtc1 = "/rtc@7000e000";
36 reg = <0x80000000 0x40000000>;
39 pcie-controller@00003000 {
42 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
43 avdd-pexb-supply = <&ldo1_reg>;
44 vdd-pexb-supply = <&ldo1_reg>;
45 avdd-pex-pll-supply = <&ldo1_reg>;
46 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
47 vddio-pex-ctl-supply = <&sys_3v3_reg>;
48 avdd-plle-supply = <&ldo2_reg>;
51 nvidia,num-lanes = <4>;
55 nvidia,num-lanes = <1>;
60 nvidia,num-lanes = <1>;
69 nvidia,panel = <&panel>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&state_default>;
78 state_default: pinmux {
80 nvidia,pins = "sdmmc1_clk_pz0";
81 nvidia,function = "sdmmc1";
82 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83 nvidia,tristate = <TEGRA_PIN_DISABLE>;
86 nvidia,pins = "sdmmc1_cmd_pz1",
91 nvidia,function = "sdmmc1";
92 nvidia,pull = <TEGRA_PIN_PULL_UP>;
93 nvidia,tristate = <TEGRA_PIN_DISABLE>;
96 nvidia,pins = "sdmmc3_clk_pa6";
97 nvidia,function = "sdmmc3";
98 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
99 nvidia,tristate = <TEGRA_PIN_DISABLE>;
102 nvidia,pins = "sdmmc3_cmd_pa7",
107 nvidia,function = "sdmmc3";
108 nvidia,pull = <TEGRA_PIN_PULL_UP>;
109 nvidia,tristate = <TEGRA_PIN_DISABLE>;
112 nvidia,pins = "sdmmc4_clk_pcc4",
114 nvidia,function = "sdmmc4";
115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 nvidia,pins = "sdmmc4_dat0_paa0",
127 nvidia,function = "sdmmc4";
128 nvidia,pull = <TEGRA_PIN_PULL_UP>;
129 nvidia,tristate = <TEGRA_PIN_DISABLE>;
132 nvidia,pins = "dap2_fs_pa2",
136 nvidia,function = "i2s1";
137 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
138 nvidia,tristate = <TEGRA_PIN_DISABLE>;
141 nvidia,pins = "drive_sdio3";
142 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
143 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
144 nvidia,pull-down-strength = <46>;
145 nvidia,pull-up-strength = <42>;
146 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
147 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
150 nvidia,pins = "uart3_txd_pw6",
154 nvidia,function = "uartc";
155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
166 compatible = "nvidia,tegra30-hsuart";
174 panelddc: i2c@7000c000 {
176 clock-frequency = <100000>;
181 clock-frequency = <100000>;
186 clock-frequency = <100000>;
188 /* ALS and Proximity sensor */
190 compatible = "isil,isl29028";
192 interrupt-parent = <&gpio>;
193 interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
197 compatible = "nxp,pca9546";
198 #address-cells = <1>;
206 clock-frequency = <100000>;
211 clock-frequency = <100000>;
214 compatible = "wlf,wm8903";
216 interrupt-parent = <&gpio>;
217 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
223 micdet-delay = <100>;
224 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
228 compatible = "ti,tps65911";
231 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
232 #interrupt-cells = <2>;
233 interrupt-controller;
235 ti,system-power-controller;
240 vcc1-supply = <&vdd_ac_bat_reg>;
241 vcc2-supply = <&vdd_ac_bat_reg>;
242 vcc3-supply = <&vio_reg>;
243 vcc4-supply = <&vdd_5v0_reg>;
244 vcc5-supply = <&vdd_ac_bat_reg>;
245 vcc6-supply = <&vdd2_reg>;
246 vcc7-supply = <&vdd_ac_bat_reg>;
247 vccio-supply = <&vdd_ac_bat_reg>;
251 regulator-name = "vddio_ddr_1v2";
252 regulator-min-microvolt = <1200000>;
253 regulator-max-microvolt = <1200000>;
258 regulator-name = "vdd_1v5_gen";
259 regulator-min-microvolt = <1500000>;
260 regulator-max-microvolt = <1500000>;
264 vddctrl_reg: vddctrl {
265 regulator-name = "vdd_cpu,vdd_sys";
266 regulator-min-microvolt = <1000000>;
267 regulator-max-microvolt = <1000000>;
272 regulator-name = "vdd_1v8_gen";
273 regulator-min-microvolt = <1800000>;
274 regulator-max-microvolt = <1800000>;
279 regulator-name = "vdd_pexa,vdd_pexb";
280 regulator-min-microvolt = <1050000>;
281 regulator-max-microvolt = <1050000>;
285 regulator-name = "vdd_sata,avdd_plle";
286 regulator-min-microvolt = <1050000>;
287 regulator-max-microvolt = <1050000>;
290 /* LDO3 is not connected to anything */
293 regulator-name = "vdd_rtc";
294 regulator-min-microvolt = <1200000>;
295 regulator-max-microvolt = <1200000>;
300 regulator-name = "vddio_sdmmc,avdd_vdac";
301 regulator-min-microvolt = <3300000>;
302 regulator-max-microvolt = <3300000>;
307 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
308 regulator-min-microvolt = <1200000>;
309 regulator-max-microvolt = <1200000>;
313 regulator-name = "vdd_pllm,x,u,a_p_c_s";
314 regulator-min-microvolt = <1200000>;
315 regulator-max-microvolt = <1200000>;
320 regulator-name = "vdd_ddr_hs";
321 regulator-min-microvolt = <1000000>;
322 regulator-max-microvolt = <1000000>;
328 temperature-sensor@4c {
329 compatible = "onnn,nct1008";
331 vcc-supply = <&sys_3v3_reg>;
332 interrupt-parent = <&gpio>;
333 interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
337 compatible = "ti,tps62361";
340 regulator-name = "tps62361-vout";
341 regulator-min-microvolt = <500000>;
342 regulator-max-microvolt = <1500000>;
352 spi-max-frequency = <25000000>;
354 compatible = "winbond,w25q32";
356 spi-max-frequency = <20000000>;
362 nvidia,invert-interrupt;
363 nvidia,suspend-mode = <1>;
364 nvidia,cpu-pwr-good-time = <2000>;
365 nvidia,cpu-pwr-off-time = <200>;
366 nvidia,core-pwr-good-time = <3845 3845>;
367 nvidia,core-pwr-off-time = <0>;
368 nvidia,core-power-req-active-high;
369 nvidia,sys-clock-req-active-high;
380 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
381 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
382 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
397 vbus-supply = <&usb3_vbus_reg>;
401 backlight: backlight {
402 compatible = "pwm-backlight";
404 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
405 power-supply = <&vdd_bl_reg>;
406 pwms = <&pwm 0 5000000>;
408 brightness-levels = <0 4 8 16 32 64 128 255>;
409 default-brightness-level = <6>;
413 compatible = "simple-bus";
414 #address-cells = <1>;
418 compatible = "fixed-clock";
421 clock-frequency = <32768>;
426 compatible = "chunghwa,claa101wb01", "simple-panel";
427 ddc-i2c-bus = <&panelddc>;
429 power-supply = <&vdd_pnl1_reg>;
430 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
432 backlight = <&backlight>;
436 compatible = "simple-bus";
437 #address-cells = <1>;
440 vdd_ac_bat_reg: regulator@0 {
441 compatible = "regulator-fixed";
443 regulator-name = "vdd_ac_bat";
444 regulator-min-microvolt = <5000000>;
445 regulator-max-microvolt = <5000000>;
449 cam_1v8_reg: regulator@1 {
450 compatible = "regulator-fixed";
452 regulator-name = "cam_1v8";
453 regulator-min-microvolt = <1800000>;
454 regulator-max-microvolt = <1800000>;
456 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
457 vin-supply = <&vio_reg>;
460 cp_5v_reg: regulator@2 {
461 compatible = "regulator-fixed";
463 regulator-name = "cp_5v";
464 regulator-min-microvolt = <5000000>;
465 regulator-max-microvolt = <5000000>;
469 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
472 emmc_3v3_reg: regulator@3 {
473 compatible = "regulator-fixed";
475 regulator-name = "emmc_3v3";
476 regulator-min-microvolt = <3300000>;
477 regulator-max-microvolt = <3300000>;
481 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
482 vin-supply = <&sys_3v3_reg>;
485 modem_3v3_reg: regulator@4 {
486 compatible = "regulator-fixed";
488 regulator-name = "modem_3v3";
489 regulator-min-microvolt = <3300000>;
490 regulator-max-microvolt = <3300000>;
492 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
495 pex_hvdd_3v3_reg: regulator@5 {
496 compatible = "regulator-fixed";
498 regulator-name = "pex_hvdd_3v3";
499 regulator-min-microvolt = <3300000>;
500 regulator-max-microvolt = <3300000>;
502 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
503 vin-supply = <&sys_3v3_reg>;
506 vdd_cam1_ldo_reg: regulator@6 {
507 compatible = "regulator-fixed";
509 regulator-name = "vdd_cam1_ldo";
510 regulator-min-microvolt = <2800000>;
511 regulator-max-microvolt = <2800000>;
513 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
514 vin-supply = <&sys_3v3_reg>;
517 vdd_cam2_ldo_reg: regulator@7 {
518 compatible = "regulator-fixed";
520 regulator-name = "vdd_cam2_ldo";
521 regulator-min-microvolt = <2800000>;
522 regulator-max-microvolt = <2800000>;
524 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
525 vin-supply = <&sys_3v3_reg>;
528 vdd_cam3_ldo_reg: regulator@8 {
529 compatible = "regulator-fixed";
531 regulator-name = "vdd_cam3_ldo";
532 regulator-min-microvolt = <3300000>;
533 regulator-max-microvolt = <3300000>;
535 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
536 vin-supply = <&sys_3v3_reg>;
539 vdd_com_reg: regulator@9 {
540 compatible = "regulator-fixed";
542 regulator-name = "vdd_com";
543 regulator-min-microvolt = <3300000>;
544 regulator-max-microvolt = <3300000>;
548 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
549 vin-supply = <&sys_3v3_reg>;
552 vdd_fuse_3v3_reg: regulator@10 {
553 compatible = "regulator-fixed";
555 regulator-name = "vdd_fuse_3v3";
556 regulator-min-microvolt = <3300000>;
557 regulator-max-microvolt = <3300000>;
559 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
560 vin-supply = <&sys_3v3_reg>;
563 vdd_pnl1_reg: regulator@11 {
564 compatible = "regulator-fixed";
566 regulator-name = "vdd_pnl1";
567 regulator-min-microvolt = <3300000>;
568 regulator-max-microvolt = <3300000>;
572 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
573 vin-supply = <&sys_3v3_reg>;
576 vdd_vid_reg: regulator@12 {
577 compatible = "regulator-fixed";
579 regulator-name = "vddio_vid";
580 regulator-min-microvolt = <5000000>;
581 regulator-max-microvolt = <5000000>;
583 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
585 vin-supply = <&vdd_5v0_reg>;
590 compatible = "nvidia,tegra-audio-wm8903-cardhu",
591 "nvidia,tegra-audio-wm8903";
592 nvidia,model = "NVIDIA Tegra Cardhu";
594 nvidia,audio-routing =
595 "Headphone Jack", "HPOUTR",
596 "Headphone Jack", "HPOUTL",
601 "Mic Jack", "MICBIAS",
604 nvidia,i2s-controller = <&tegra_i2s1>;
605 nvidia,audio-codec = <&wm8903>;
607 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
608 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
611 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
612 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
613 <&tegra_car TEGRA30_CLK_EXTERN1>;
614 clock-names = "pll_a", "pll_a_out0", "mclk";