2 * Device Tree Source for UniPhier PH1-sLD3 SoC
4 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
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45 /include/ "skeleton.dtsi"
48 compatible = "socionext,ph1-sld3";
53 enable-method = "socionext,uniphier-smp";
57 compatible = "arm,cortex-a9";
63 compatible = "arm,cortex-a9";
69 arm_timer_clk: arm_timer_clk {
71 compatible = "fixed-clock";
72 clock-frequency = <50000000>;
77 compatible = "fixed-clock";
78 clock-frequency = <36864000>;
83 compatible = "simple-bus";
87 interrupt-parent = <&intc>;
90 compatible = "simple-bus";
96 compatible = "arm,cortex-a9-global-timer";
97 reg = <0x20000200 0x20>;
98 interrupts = <1 11 0x304>;
99 clocks = <&arm_timer_clk>;
103 compatible = "arm,cortex-a9-twd-timer";
104 reg = <0x20000600 0x20>;
105 interrupts = <1 13 0x304>;
106 clocks = <&arm_timer_clk>;
109 intc: interrupt-controller@20001000 {
110 compatible = "arm,cortex-a9-gic";
111 #interrupt-cells = <3>;
112 interrupt-controller;
113 reg = <0x20001000 0x1000>,
117 serial0: serial@54006800 {
118 compatible = "socionext,uniphier-uart";
120 reg = <0x54006800 0x40>;
121 interrupts = <0 33 4>;
122 clocks = <&uart_clk>;
126 serial1: serial@54006900 {
127 compatible = "socionext,uniphier-uart";
129 reg = <0x54006900 0x40>;
130 interrupts = <0 35 4>;
131 clocks = <&uart_clk>;
135 serial2: serial@54006a00 {
136 compatible = "socionext,uniphier-uart";
138 reg = <0x54006a00 0x40>;
139 interrupts = <0 37 4>;
140 clocks = <&uart_clk>;
144 system-bus-controller-misc@59800000 {
145 compatible = "socionext,uniphier-system-bus-controller-misc",
147 reg = <0x59800000 0x2000>;
151 compatible = "socionext,uniphier-ehci", "generic-ehci";
153 reg = <0x5a800100 0x100>;
154 interrupts = <0 80 4>;
158 compatible = "socionext,uniphier-ehci", "generic-ehci";
160 reg = <0x5a810100 0x100>;
161 interrupts = <0 81 4>;
165 compatible = "socionext,uniphier-ehci", "generic-ehci";
167 reg = <0x5a820100 0x100>;
168 interrupts = <0 82 4>;
172 compatible = "socionext,uniphier-ehci", "generic-ehci";
174 reg = <0x5a830100 0x100>;
175 interrupts = <0 83 4>;